Chapter 4. Combinational: Circuits with logic gates whose outputs depend on the present combination of the inputs. elements. Dr.
|
|
- Whitney Chapman
- 5 years ago
- Views:
Transcription
1 Chapter 4 Dr. Panos Nasiopoulos Combinational: Circuits with logic gates whose outputs depend on the present combination of the inputs. Sequential: In addition, they include storage elements Combinational Logic 1
2 Design Procedure 1. Determine the number of inputs and outputs 2. Assign symbols 3. Derive the truth table 4. Obtain simplified functions for each output 5. Draw the logic diagram ADDERS The most basic arithmetic operation os the addition of two binary digits. Combinational Logic 2
3 Design Procedure Half-Adder - Needs 2 inputs and 2 outputs. - x,y: inputs; S,C outputs. X Y C S Combinational Logic 3
4 Full Adder Consists of 3 inputs and two outputs: x,y: two significant bits z: carry x y z Use K maps for the two outputs Combinational Logic 4
5 Full Adder S = C = xy+xz+yz S = z (x y) C =m 3 + m 5 + m 6 + m 7 = Combinational Logic 5
6 Code Conversion Convert code A to B: BCD A? B Excess-3 code BCD Excess-3 (self complementing) A B C D w x y z Combinational Logic 6
7 A B C D w x y z Dr. Panos Nasiopoulos Combinational Logic 7
8 z = y = x = w = Combinational Logic 8
9 Analysis Procedure Dr. Panos Nasiopoulos Given: a logic diagram We want to derive the output Boolean function(s) Procedure: Combinational Logic 9
10 Analysis Procedure Dr. Panos Nasiopoulos T2 = ABC T1 = A+B+C F2 = AB + AC + BC T3 = F2 T1 F1 = T3 + T2 F1= Combinational Logic 10
11 Analysis Procedure TRUTH TABLE: Determine the number of input variables Label the outputs Obtain the truth table T2 = ABC T1 = A+B+C F2 = AB + AC + BC T3 = F2 T1 F1 = T3 + T2 A B C F2 F 2 T1 T2 T3 F Combinational Logic 11
12 Binary Parallel Adder Two binary numbers of n bits can be added by using FAs. The sum of two n bit binary numbers, A and B, can be generated in serial or in parallel. Serial: Combinational Logic 12
13 Binary Parallel Adder Parallel adder: Uses n FAs. Combinational Logic 13
14 Example: BCD to excess 3 code converter Dr. Panos Nasiopoulos Recall that we needed 11 gates for this design. 1 BCD input IC FA Excess-3 output Combinational Logic 14
15 Carry Propagation Recall that for the design of the parallel adder to work, the signal must propagate through the gates before the correct output sum is available. Total propagation time = propagation delay of a typical gate x the number of gates Let s look at S3. Inputs A3 and B3 are available immediately. However, C3 is available only after C2 is available. C2 has to wait for C1, etc. C4 The number of gate levels for the carry to propagate is found from the FA circuit 2 gates Combinational Logic 15
16 Combinational Logic 16
17 Carry lookahead: Pi = Gi = Si = Gi : called a carry generate; it produces a carry of 1 when both Ai and Bi are 1, regardless of the input carry Ci. Pi : called carry propagate because it is the term associated with the propagation of the carry from Ci to C i+ 1. C0 = input carry C1 = C2 = C3 = Combinational Logic 17
18 C0 = input carry C1 = C2 = C3 = Dr. Panos Nasiopoulos Combinational Logic 18
19 A 4-bit adder using a carry lookahead scheme: Dr. Panos Nasiopoulos Note that all output carries are generated after a delay of two levels of gates. S1 to S3 have equal propagation delay times Combinational Logic 19
20 Binary Subtractor Recall that the subtraction of two numbers (A-B) is done by taking 2 s complement of the ve number and then we add the 2 numbers. 2 s complement is 1 s complement + 1 B3 A3 B2 A2 B1 A1 B0 A0 We want to figure out how to complement the ve number (e.g., B). Combinational Logic 20
21 Overflow Two n-bit numbers added result in n+1 It may result in overflow Example (4-bits) Note that overflow occurs when So, if we want to detect the overflow, we can use Combinational Logic 21
22 Design of a BCD Adder Add two BCD numbers; show output in BCD format If we add two BCD numbers, the maximum output will be: carry (if 1) = 19 decimal. Using FAs, we get binary representation. We MUST convert it to BCD using two BCDs Combinational Logic 22
23 Design of a BCD Adder Dr. Panos Nasiopoulos Combinational Logic 23
24 Decoders A binary code of n bits can represent 2 n distinct combinations (or unique cases ). Decoder: a combinational circuit that converts n binary lines into 2 n unique output lines Example: a 3-to-8 line decoder 3 inputs are decoded to 8 outputs representing the 8 minterms Combinational Logic 24
25 Decoders Truth table for a decoder: Inputs Outputs x y z D0 D1 D2 D3 D4 D5 D6 D Decoder with NAND gates: Combinational Logic 25
26 Decoders Decoder with NAND gates and enable: Decoders with enable can be connected together to form larger decoders. Example: Design a 4-to-16 decoder Combinational Logic 26
27 Decoders: Implementing Boolean functions Dr. Panos Nasiopoulos Implement a FA using a decoder: Recall that the full adder has 3 inputs and two outputs: S(x,y,z) = Σ(1,2,4,7) C(x,y,z) = Σ(3,5,6,7) Combinational Logic 27
28 Encoders Inverse operation of a decoder It has 2 n inputs and generates n codewords Example: Design a 4 x 2 encoder E N C O D E R D0 D1 D2 D3 x y Problems: Combinational Logic 28
29 Design: Priority encoder Dr. Panos Nasiopoulos D0 D1 D2 D3 x y Combinational Logic 29
30 Multiplexers Dr. Panos Nasiopoulos A multiplexer selects one of many inputs and directs it to the output. ch1 ch2 Transmission line chn The selection may be controlled by select lines Normally 2 n lines: n select lines Example: 2 x 1 multiplexer x y MUX out How can we design this? Let s consider a 4 x 1 multiplexer MUX out Use code to direct input Combinational Logic 30
31 Multiplexers Dr. Panos Nasiopoulos Combinational Logic 31
32 Multiplexers used to implement Boolean functions Use a multiplexer to implement the following function: F = x y z + x yz + xy z + xyz z Z 1 z 0 Design a Full-adder S(x,y,z) = Σ(1,2,4,7); C(x,y,z) = Σ(1,2,4,7) x y z S Combinational Logic 32
Combina-onal Logic Chapter 4. Topics. Combina-on Circuit 10/13/10. EECE 256 Dr. Sidney Fels Steven Oldridge
Combina-onal Logic Chapter 4 EECE 256 Dr. Sidney Fels Steven Oldridge Topics Combina-onal circuits Combina-onal analysis Design procedure simple combined to make complex adders, subtractors, converters
More informationSystems I: Computer Organization and Architecture
Systems I: Computer Organization and Architecture Lecture 6 - Combinational Logic Introduction A combinational circuit consists of input variables, logic gates, and output variables. The logic gates accept
More informationCombinational Logic. By : Ali Mustafa
Combinational Logic By : Ali Mustafa Contents Adder Subtractor Multiplier Comparator Decoder Encoder Multiplexer How to Analyze any combinational circuit like this? Analysis Procedure To obtain the output
More informationCombinational Logic. Lan-Da Van ( 范倫達 ), Ph. D. Department of Computer Science National Chiao Tung University Taiwan, R.O.C.
Combinational Logic ( 范倫達 ), Ph. D. Department of Computer Science National Chiao Tung University Taiwan, R.O.C. Fall, 2010 ldvan@cs.nctu.edu.tw http://www.cs.nctu.edu.tw/~ldvan/ Combinational Circuits
More informationCombinational Logic. Lan-Da Van ( 范倫達 ), Ph. D. Department of Computer Science National Chiao Tung University Taiwan, R.O.C.
Combinational Logic ( 范倫達 ), Ph. D. Department of Computer Science National Chiao Tung University Taiwan, R.O.C. Fall, 2017 ldvan@cs.nctu.edu.tw http://www.cs.nctu.edu.tw/~ldvan/ Combinational Circuits
More informationLogic. Combinational. inputs. outputs. the result. system can
Digital Electronics Combinational Logic Functions Digital logic circuits can be classified as either combinational or sequential circuits. A combinational circuit is one where the output at any time depends
More informationCombinational Logic. Mantıksal Tasarım BBM231. section instructor: Ufuk Çelikcan
Combinational Logic Mantıksal Tasarım BBM23 section instructor: Ufuk Çelikcan Classification. Combinational no memory outputs depends on only the present inputs expressed by Boolean functions 2. Sequential
More informationChapter 4: Combinational Logic Solutions to Problems: [1, 5, 9, 12, 19, 23, 30, 33]
Chapter 4: Combinational Logic Solutions to Problems: [, 5, 9, 2, 9, 23, 3, 33] Problem: 4- Consider the combinational circuit shown in Fig. P4-. (a) Derive the Boolean expressions for T through T 4. Evaluate
More informationSample Test Paper - I
Scheme G Sample Test Paper - I Course Name : Computer Engineering Group Marks : 25 Hours: 1 Hrs. Q.1) Attempt any THREE: 09 Marks a) Define i) Propagation delay ii) Fan-in iii) Fan-out b) Convert the following:
More informationCOMBINATIONAL LOGIC FUNCTIONS
COMBINATIONAL LOGIC FUNCTIONS Digital logic circuits can be classified as either combinational or sequential circuits. A combinational circuit is one where the output at any time depends only on the present
More informationChapter 5 Arithmetic Circuits
Chapter 5 Arithmetic Circuits SKEE2263 Digital Systems Mun im/ismahani/izam {munim@utm.my,e-izam@utm.my,ismahani@fke.utm.my} February 11, 2016 Table of Contents 1 Iterative Designs 2 Adders 3 High-Speed
More informationDigital System Design Combinational Logic. Assoc. Prof. Pradondet Nilagupta
Digital System Design Combinational Logic Assoc. Prof. Pradondet Nilagupta pom@ku.ac.th Acknowledgement This lecture note is modified from Engin112: Digital Design by Prof. Maciej Ciesielski, Prof. Tilman
More informationCarry Look Ahead Adders
Carry Look Ahead Adders Lesson Objectives: The objectives of this lesson are to learn about: 1. Carry Look Ahead Adder circuit. 2. Binary Parallel Adder/Subtractor circuit. 3. BCD adder circuit. 4. Binary
More informationCSEE 3827: Fundamentals of Computer Systems. Combinational Circuits
CSEE 3827: Fundamentals of Computer Systems Combinational Circuits Outline (M&K 3., 3.3, 3.6-3.9, 4.-4.2, 4.5, 9.4) Combinational Circuit Design Standard combinational circuits enabler decoder encoder
More informationNumber System. Decimal to binary Binary to Decimal Binary to octal Binary to hexadecimal Hexadecimal to binary Octal to binary
Number System Decimal to binary Binary to Decimal Binary to octal Binary to hexadecimal Hexadecimal to binary Octal to binary BOOLEAN ALGEBRA BOOLEAN LOGIC OPERATIONS Logical AND Logical OR Logical COMPLEMENTATION
More informationMidterm Exam Two is scheduled on April 8 in class. On March 27 I will help you prepare Midterm Exam Two.
Announcements Midterm Exam Two is scheduled on April 8 in class. On March 27 I will help you prepare Midterm Exam Two. Chapter 5 1 Chapter 3: Part 3 Arithmetic Functions Iterative combinational circuits
More informationDIGITAL TECHNICS. Dr. Bálint Pődör. Óbuda University, Microelectronics and Technology Institute
DIGITAL TECHNICS Dr. Bálint Pődör Óbuda University, Microelectronics and Technology Institute 4. LECTURE: COMBINATIONAL LOGIC DESIGN: ARITHMETICS (THROUGH EXAMPLES) 2016/2017 COMBINATIONAL LOGIC DESIGN:
More informationUNIT II COMBINATIONAL CIRCUITS:
UNIT II COMBINATIONAL CIRCUITS: INTRODUCTION: The digital system consists of two types of circuits, namely (i) (ii) Combinational circuits Sequential circuits Combinational circuit consists of logic gates
More informationZ = F(X) Combinational circuit. A combinational circuit can be specified either by a truth table. Truth Table
Lesson Objectives In this lesson, you will learn about What are combinational circuits Design procedure of combinational circuits Examples of combinational circuit design Combinational Circuits Logic circuit
More informationDigital Logic Design ENEE x. Lecture 14
Digital Logic Design ENEE 244-010x Lecture 14 Announcements Homework 6 due today Agenda Last time: Binary Adders and Subtracters (5.1, 5.1.1) Carry Lookahead Adders (5.1.2, 5.1.3) This time: Decimal Adders
More informationCombinational Logic. Jee-Hwan Ryu. School of Mechanical Engineering Korea University of Technology and Education
MEC5 디지털공학 Combinational Logic Jee-Hwan Ryu School of Mechanical Engineering Combinational circuits Outputs are determined from the present inputs Consist of input/output variables and logic gates inary
More informationClass Website:
ECE 20B, Winter 2003 Introduction to Electrical Engineering, II LECTURE NOTES #5 Instructor: Andrew B. Kahng (lecture) Email: abk@ece.ucsd.edu Telephone: 858-822-4884 office, 858-353-0550 cell Office:
More informationELCT201: DIGITAL LOGIC DESIGN
ELCT201: DIGITAL LOGIC DESIGN Dr. Eng. Haitham Omran, haitham.omran@guc.edu.eg Dr. Eng. Wassim Alexan, wassim.joseph@guc.edu.eg Lecture 5 Following the slides of Dr. Ahmed H. Madian ذو الحجة 1438 ه Winter
More informationIT T35 Digital system desigm y - ii /s - iii
UNIT - II Combinational Logic Adders subtractors code converters binary parallel adder decimal adder magnitude comparator encoders decoders multiplexers demultiplexers-binarymultiplier Parity generator
More informationCSE140: Components and Design Techniques for Digital Systems. Decoders, adders, comparators, multipliers and other ALU elements. Tajana Simunic Rosing
CSE4: Components and Design Techniques for Digital Systems Decoders, adders, comparators, multipliers and other ALU elements Tajana Simunic Rosing Mux, Demux Encoder, Decoder 2 Transmission Gate: Mux/Tristate
More informationReview: Additional Boolean operations
Review: Additional Boolean operations Operation: NAND (NOT-AND) NOR (NOT-OR) XOR (exclusive OR) Expressions: (xy) = x + y (x + y) = x y x y = x y + xy Truth table: x y (xy) x y (x+y) x y x y 0 0 1 0 1
More informationCHAPTER1: Digital Logic Circuits Combination Circuits
CS224: Computer Organization S.KHABET CHAPTER1: Digital Logic Circuits Combination Circuits 1 PRIMITIVE LOGIC GATES Each of our basic operations can be implemented in hardware using a primitive logic gate.
More informationCOMBINATIONAL LOGIC CIRCUITS. Dr. Mudathir A. Fagiri
COMBINATIONAL LOGIC CIRCUITS Dr. Mudathir A. Fagiri Standard Combinational Modules Decoder: Decode address Encoder: Encode address Multiplexer (Mux): Select data by address Demultiplexier (DeMux): Direct
More informationCOE 202: Digital Logic Design Combinational Circuits Part 2. Dr. Ahmad Almulhem ahmadsm AT kfupm Phone: Office:
COE 202: Digital Logic Design Combinational Circuits Part 2 Dr. Ahmad Almulhem Email: ahmadsm AT kfupm Phone: 860-7554 Office: 22-324 Objectives Arithmetic Circuits Adder Subtractor Carry Look Ahead Adder
More information3. Combinational Circuit Design
CSEE 3827: Fundamentals of Computer Systems, Spring 2 3. Combinational Circuit Design Prof. Martha Kim (martha@cs.columbia.edu) Web: http://www.cs.columbia.edu/~martha/courses/3827/sp/ Outline (H&H 2.8,
More informationPG - TRB UNIT-X- DIGITAL ELECTRONICS. POLYTECHNIC-TRB MATERIALS
SRIMAAN COACHING CENTRE-PG-TRB-PHYSICS- DIGITAL ELECTRONICS-STUDY MATERIAL-CONTACT: 8072230063 SRIMAAN PG - TRB PHYSICS UNIT-X- DIGITAL ELECTRONICS POLYTECHNIC-TRB MATERIALS MATHS/COMPUTER SCIENCE/IT/ECE/EEE
More informationAdders, subtractors comparators, multipliers and other ALU elements
CSE4: Components and Design Techniques for Digital Systems Adders, subtractors comparators, multipliers and other ALU elements Instructor: Mohsen Imani UC San Diego Slides from: Prof.Tajana Simunic Rosing
More informationAdders, subtractors comparators, multipliers and other ALU elements
CSE4: Components and Design Techniques for Digital Systems Adders, subtractors comparators, multipliers and other ALU elements Adders 2 Circuit Delay Transistors have instrinsic resistance and capacitance
More informationReview for Test 1 : Ch1 5
Review for Test 1 : Ch1 5 October 5, 2006 Typeset by FoilTEX Positional Numbers 527.46 10 = (5 10 2 )+(2 10 1 )+(7 10 0 )+(4 10 1 )+(6 10 2 ) 527.46 8 = (5 8 2 ) + (2 8 1 ) + (7 8 0 ) + (4 8 1 ) + (6 8
More informationUNIVERSITI TENAGA NASIONAL. College of Information Technology
UNIVERSITI TENAGA NASIONAL College of Information Technology BACHELOR OF COMPUTER SCIENCE (HONS.) FINAL EXAMINATION SEMESTER 2 2012/2013 DIGITAL SYSTEMS DESIGN (CSNB163) January 2013 Time allowed: 3 hours
More informationCombinational Logic. Course Instructor Mohammed Abdul kader
Combinational Logic Contents: Combinational and Sequential digital circuits. Design Procedure of combinational circuit. Adders: Half adder and Full adder. Subtractors: Half Subtractor and Full Subtractor.
More informationBinary addition by hand. Adding two bits
Chapter 3 Arithmetic is the most basic thing you can do with a computer We focus on addition, subtraction, multiplication and arithmetic-logic units, or ALUs, which are the heart of CPUs. ALU design Bit
More informationFundamentals of Digital Design
Fundamentals of Digital Design Digital Radiation Measurement and Spectroscopy NE/RHP 537 1 Binary Number System The binary numeral system, or base-2 number system, is a numeral system that represents numeric
More informationLogic and Computer Design Fundamentals. Chapter 5 Arithmetic Functions and Circuits
Logic and Computer Design Fundamentals Chapter 5 Arithmetic Functions and Circuits Arithmetic functions Operate on binary vectors Use the same subfunction in each bit position Can design functional block
More informationKUMARAGURU COLLEGE OF TECHNOLOGY COIMBATORE
Estd-1984 KUMARAGURU COLLEGE OF TECHNOLOGY COIMBATORE 641 006 QUESTION BANK UNIT I PART A ISO 9001:2000 Certified 1. Convert (100001110.010) 2 to a decimal number. 2. Find the canonical SOP for the function
More informationELECTRONICS & COMMUNICATION ENGINEERING PROFESSIONAL ETHICS AND HUMAN VALUES
EC 216(R-15) Total No. of Questions :09] [Total No. of Pages : 02 II/IV B.Tech. DEGREE EXAMINATIONS, DECEMBER- 2016 First Semester ELECTRONICS & COMMUNICATION ENGINEERING PROFESSIONAL ETHICS AND HUMAN
More informationELCT201: DIGITAL LOGIC DESIGN
ELCT2: DIGITAL LOGIC DESIGN Dr. Eng. Haitham Omran, haitham.omran@guc.edu.eg Dr. Eng. Wassim Alexan, wassim.joseph@guc.edu.eg Lecture 4 Following the slides of Dr. Ahmed H. Madian محرم 439 ه Winter 28
More informationvidyarthiplus.com vidyarthiplus.com vidyarthiplus.com ANNA UNIVERSITY- COMBATORE B.E./ B.TECH. DEGREE EXAMINATION - JUNE 2009. ELECTRICAL & ELECTONICS ENGG. - FOURTH SEMESTER DIGITAL LOGIC CIRCUITS PART-A
More informationCombinational Logic Design Combinational Functions and Circuits
Combinational Logic Design Combinational Functions and Circuits Overview Combinational Circuits Design Procedure Generic Example Example with don t cares: BCD-to-SevenSegment converter Binary Decoders
More informationMODULAR CIRCUITS CHAPTER 7
CHAPTER 7 MODULAR CIRCUITS A modular circuit is a digital circuit that performs a specific function or has certain usage. The modular circuits to be introduced in this chapter are decoders, encoders, multiplexers,
More informationReg. No. Question Paper Code : B.E./B.Tech. DEGREE EXAMINATION, NOVEMBER/DECEMBER Second Semester. Computer Science and Engineering
Sp 6 Reg. No. Question Paper Code : 27156 B.E./B.Tech. DEGREE EXAMINATION, NOVEMBER/DECEMBER 2015. Second Semester Computer Science and Engineering CS 6201 DIGITAL PRINCIPLES AND SYSTEM DESIGN (Common
More information211: Computer Architecture Summer 2016
211: Computer Architecture Summer 2016 Liu Liu Topic: Storage Project3 Digital Logic - Storage: Recap - Review: cache hit rate - Project3 - Digital Logic: - truth table => SOP - simplification: Boolean
More informationECE 545 Digital System Design with VHDL Lecture 1. Digital Logic Refresher Part A Combinational Logic Building Blocks
ECE 545 Digital System Design with VHDL Lecture Digital Logic Refresher Part A Combinational Logic Building Blocks Lecture Roadmap Combinational Logic Basic Logic Review Basic Gates De Morgan s Law Combinational
More informationCSE 140L Spring 2010 Lab 1 Assignment Due beginning of the class on 14 th April
CSE 140L Spring 2010 Lab 1 Assignment Due beginning of the class on 14 th April Objective - Get familiar with the Xilinx ISE webpack tool - Learn how to design basic combinational digital components -
More informationCMSC 313 Lecture 18 Midterm Exam returned Assign Homework 3 Circuits for Addition Digital Logic Components Programmable Logic Arrays
MS 33 Lecture 8 Midterm Exam returned Assign Homework 3 ircuits for Addition Digital Logic omponents Programmable Logic Arrays UMB, MS33, Richard hang MS 33, omputer Organization & Assembly
More informationDepartment of Electrical & Electronics EE-333 DIGITAL SYSTEMS
Department of Electrical & Electronics EE-333 DIGITAL SYSTEMS 1) Given the two binary numbers X = 1010100 and Y = 1000011, perform the subtraction (a) X -Y and (b) Y - X using 2's complements. a) X = 1010100
More informationMODEL ANSWER SUMMER 17 EXAMINATION Subject Title: Principles of Digital Techniques
MODEL ANSWER SUMMER 17 EXAMINATION Subject Title: Principles of Digital Techniques Subject Code: Important Instructions to examiners: 1) The answers should be examined by key words and not as word-to-word
More informationChapter 3 Ctd: Combinational Functions and Circuits
Chapter 3 Ctd: Combinational Functions and Circuits 1 Value Fixing, Transferring, and Inverting Four different functions are possible as a function of single Boolean variable Transferring Inverting Value
More informationENGIN 112 Intro to Electrical and Computer Engineering
ENGIN 112 Intro to Electrical and Computer Engineering Lecture 17 Encoders and Decoders Overview Binary decoders Converts an n-bit code to a single active output Can be developed using AND/OR gates Can
More informationUnit 3 Session - 9 Data-Processing Circuits
Objectives Unit 3 Session - 9 Data-Processing Design of multiplexer circuits Discuss multiplexer applications Realization of higher order multiplexers using lower orders (multiplexer trees) Introduction
More informationCMSC 313 Lecture 17. Focus Groups. Announcement: in-class lab Thu 10/30 Homework 3 Questions Circuits for Addition Midterm Exam returned
Focus Groups CMSC 33 Lecture 7 Need good sample of all types of CS students Mon /7 & Thu /2, 2:3p-2:p & 6:p-7:3p Announcement: in-class lab Thu /3 Homework 3 Questions Circuits for Addition Midterm Exam
More informationCSE140: Components and Design Techniques for Digital Systems. Logic minimization algorithm summary. Instructor: Mohsen Imani UC San Diego
CSE4: Components and Design Techniques for Digital Systems Logic minimization algorithm summary Instructor: Mohsen Imani UC San Diego Slides from: Prof.Tajana Simunic Rosing & Dr.Pietro Mercati Definition
More informationCMSC 313 Lecture 18 Midterm Exam returned Assign Homework 3 Circuits for Addition Digital Logic Components Programmable Logic Arrays
CMSC 33 Lecture 8 Midterm Exam returned ssign Homework 3 Circuits for ddition Digital Logic Components Programmable Logic rrays UMC, CMSC33, Richard Chang Half dder Inputs: and Outputs:
More information14:332:231 DIGITAL LOGIC DESIGN
4:332:23 DIGITAL LOGIC DEIGN Ivan Marsic, Rutgers University Electrical & Computer Engineering Fall 23 Lecture #4: Adders, ubtracters, and ALUs Vector Binary Adder [Wakerly 4 th Ed., ec. 6., p. 474] ingle
More information( c) Give logic symbol, Truth table and circuit diagram for a clocked SR flip-flop. A combinational circuit is defined by the function
Question Paper Digital Electronics (EE-204-F) MDU Examination May 2015 1. (a) represent (32)10 in (i) BCD 8421 code (ii) Excess-3 code (iii) ASCII code (b) Design half adder using only NAND gates. ( c)
More informationOverview. Arithmetic circuits. Binary half adder. Binary full adder. Last lecture PLDs ROMs Tristates Design examples
Overview rithmetic circuits Last lecture PLDs ROMs Tristates Design examples Today dders Ripple-carry Carry-lookahead Carry-select The conclusion of combinational logic!!! General-purpose building blocks
More informationCS221: Digital Design. Dr. A. Sahu. Indian Institute of Technology Guwahati
CS221: Digital Design QMLogicMinimization Minimization Dr. A. Sahu DeptofComp.Sc.&Engg. Indian Institute of Technology Guwahati 1 Outline Study of Components Logic Implementation Using MUX & Decoder 4
More informationUNIT III Design of Combinational Logic Circuits. Department of Computer Science SRM UNIVERSITY
UNIT III Design of ombinational Logic ircuits Department of omputer Science SRM UNIVERSITY Introduction to ombinational ircuits Logic circuits for digital systems may be ombinational Sequential combinational
More information/ M Morris Mano Digital Design Ahmad_911@hotmailcom / / / / wwwuqucscom Binary Systems Introduction - Digital Systems - The Conversion Between Numbering Systems - From Binary To Decimal - Octet To Decimal
More informationChapter 7 Logic Circuits
Chapter 7 Logic Circuits Goal. Advantages of digital technology compared to analog technology. 2. Terminology of Digital Circuits. 3. Convert Numbers between Decimal, Binary and Other forms. 5. Binary
More informationSection 3: Combinational Logic Design. Department of Electrical Engineering, University of Waterloo. Combinational Logic
Section 3: Combinational Logic Design Major Topics Design Procedure Multilevel circuits Design with XOR gates Adders and Subtractors Binary parallel adder Decoders Encoders Multiplexers Programmed Logic
More informationAdders - Subtractors
Adders - Subtractors Lesson Objectives: The objectives of this lesson are to learn about: 1. Half adder circuit. 2. Full adder circuit. 3. Binary parallel adder circuit. 4. Half subtractor circuit. 5.
More informationECE 545 Digital System Design with VHDL Lecture 1A. Digital Logic Refresher Part A Combinational Logic Building Blocks
ECE 545 Digital System Design with VHDL Lecture A Digital Logic Refresher Part A Combinational Logic Building Blocks Lecture Roadmap Combinational Logic Basic Logic Review Basic Gates De Morgan s Laws
More informationDepartment of Electrical and Computer Engineering University of Wisconsin - Madison. ECE/CS 352 Digital System Fundamentals
Department of Electrical and Computer Engineering Universit of Wisconsin - Madison ECE/C 352 Digital stem Fundamentals Quiz #2 olution Thursda, Octoer 26, 2000, 7:15--8:30PM 1. (15 points) (a). (5 points)
More informationLecture 2 Review on Digital Logic (Part 1)
Lecture 2 Review on Digital Logic (Part 1) Xuan Silvia Zhang Washington University in St. Louis http://classes.engineering.wustl.edu/ese461/ Grading Engagement 5% Review Quiz 10% Homework 10% Labs 40%
More informationDesign of Sequential Circuits
Design of Sequential Circuits Seven Steps: Construct a state diagram (showing contents of flip flop and inputs with next state) Assign letter variables to each flip flop and each input and output variable
More informationChapter 5. Digital Design and Computer Architecture, 2 nd Edition. David Money Harris and Sarah L. Harris. Chapter 5 <1>
Chapter 5 Digital Design and Computer Architecture, 2 nd Edition David Money Harris and Sarah L. Harris Chapter 5 Chapter 5 :: Topics Introduction Arithmetic Circuits umber Systems Sequential Building
More informationBOOLEAN ALGEBRA. Introduction. 1854: Logical algebra was published by George Boole known today as Boolean Algebra
BOOLEAN ALGEBRA Introduction 1854: Logical algebra was published by George Boole known today as Boolean Algebra It s a convenient way and systematic way of expressing and analyzing the operation of logic
More informationUNIT 4 MINTERM AND MAXTERM EXPANSIONS
UNIT 4 MINTERM AND MAXTERM EXPANSIONS Spring 2 Minterm and Maxterm Expansions 2 Contents Conversion of English sentences to Boolean equations Combinational logic design using a truth table Minterm and
More informationDigital Electronics Circuits 2017
JSS SCIENCE AND TECHNOLOGY UNIVERSITY Digital Electronics Circuits (EC37L) Lab in-charge: Dr. Shankraiah Course outcomes: After the completion of laboratory the student will be able to, 1. Simplify, design
More informationHardware Design I Chap. 4 Representative combinational logic
Hardware Design I Chap. 4 Representative combinational logic E-mail: shimada@is.naist.jp Already optimized circuits There are many optimized circuits which are well used You can reduce your design workload
More informationChap 2. Combinational Logic Circuits
Overview 2 Chap 2. Combinational Logic Circuits Spring 24 Part Gate Circuits and Boolean Equations Binary Logic and Gates Boolean Algebra Standard Forms Part 2 Circuit Optimization Two-Level Optimization
More informationFunction of Combinational Logic ENT263
Function of Combinational Logic ENT263 Chapter Objectives Distinguish between half-adder and full-adder Use BCD-to-7-segment decoders in display systems Apply multiplexer in data selection Use decoders
More informationDE58/DC58 LOGIC DESIGN DEC 2014
Q.2 a. In a base-5 number system, 3 digit representations is used. Find out (i) Number of distinct quantities that can be represented.(ii) Representation of highest decimal number in base-5. Since, r=5
More informationARITHMETIC COMBINATIONAL MODULES AND NETWORKS
ARITHMETIC COMBINATIONAL MODULES AND NETWORKS 1 SPECIFICATION OF ADDER MODULES FOR POSITIVE INTEGERS HALF-ADDER AND FULL-ADDER MODULES CARRY-RIPPLE AND CARRY-LOOKAHEAD ADDER MODULES NETWORKS OF ADDER MODULES
More informationChapter 4: Designing Combinational Systems Uchechukwu Ofoegbu
Chapter 4: Designing Combinational Systems Uchechukwu Ofoegbu Temple University Gate Delay ((1.1).1) ((1.0).0) ((0.1).1) ((0.1).0) ((1.1) = 1 0 s = sum c out carry-out a, b = added bits C = carry in a
More informationว ตถ ประสงค ของบทเร ยน
Logic Design with MSI Circuits ว ตถ ประสงค ของบทเร ยน ร จ กวงจรประเภท MSI เข าใจการทำงานของวงจร MSI ท ม ใช อย ท วไป สามารถประย กต ใช วงจร MSI ในการออกแบบวงจรลอจ กแบบต างๆ ได A. Yaicharoen 1 Type of Circuits
More informationDesign of Combinational Logic
Pune Vidyarthi Griha s COLLEGE OF ENGINEERING, NASHIK 3. Design of Combinational Logic By Prof. Anand N. Gharu (Assistant Professor) PVGCOE Computer Dept.. 30 th June 2017 CONTENTS :- 1. Code Converter
More informationBoolean Algebra, Gates and Circuits
Boolean Algebra, Gates and Circuits Kasper Brink November 21, 2017 (Images taken from Tanenbaum, Structured Computer Organization, Fifth Edition, (c) 2006 Pearson Education, Inc.) Outline Last week: Von
More informationModule 2. Basic Digital Building Blocks. Binary Arithmetic & Arithmetic Circuits Comparators, Decoders, Encoders, Multiplexors Flip-Flops
Module 2 asic Digital uilding locks Lecturer: Dr. Yongsheng Gao Office: Tech 3.25 Email: Web: Structure: Textbook: yongsheng.gao@griffith.edu.au maxwell.me.gu.edu.au 6 lecturers 1 tutorial 1 laboratory
More informationBoolean Algebra and Digital Logic 2009, University of Colombo School of Computing
IT 204 Section 3.0 Boolean Algebra and Digital Logic Boolean Algebra 2 Logic Equations to Truth Tables X = A. B + A. B + AB A B X 0 0 0 0 3 Sum of Products The OR operation performed on the products of
More informationELEN Electronique numérique
ELEN0040 - Electronique numérique Patricia ROUSSEAUX Année académique 2014-2015 CHAPITRE 3 Combinational Logic Circuits ELEN0040 3-4 1 Combinational Functional Blocks 1.1 Rudimentary Functions 1.2 Functions
More informationCSE 140 Lecture 11 Standard Combinational Modules. CK Cheng and Diba Mirza CSE Dept. UC San Diego
CSE 4 Lecture Standard Combinational Modules CK Cheng and Diba Mirza CSE Dept. UC San Diego Part III - Standard Combinational Modules (Harris: 2.8, 5) Signal Transport Decoder: Decode address Encoder:
More informationWe are here. Assembly Language. Processors Arithmetic Logic Units. Finite State Machines. Circuits Gates. Transistors
CSC258 Week 3 1 Logistics If you cannot login to MarkUs, email me your UTORID and name. Check lab marks on MarkUs, if it s recorded wrong, contact Larry within a week after the lab. Quiz 1 average: 86%
More informationDHANALAKSHMI COLLEGE OF ENGINEERING, CHENNAI DEPARTMENT OF COMPUTER SCIENCE AND ENGINEERING CS6201 DIGITAL PRINCIPLES AND SYSTEM DESIGN
DHANALAKSHMI COLLEGE OF ENGINEERING, CHENNAI DEPARTMENT OF COMPUTER SCIENCE AND ENGINEERING CS6201 DIGITAL PRINCIPLES AND SYSTEM DESIGN UNIT I : BOOLEAN ALGEBRA AND LOGIC GATES PART - A (2 MARKS) Number
More informationMC9211 Computer Organization
MC92 Computer Organization Unit : Digital Fundamentals Lesson2 : Boolean Algebra and Simplification (KSB) (MCA) (29-2/ODD) (29 - / A&B) Coverage Lesson2 Introduces the basic postulates of Boolean Algebra
More informationKP/Worksheets: Propositional Logic, Boolean Algebra and Computer Hardware Page 1 of 8
KP/Worksheets: Propositional Logic, Boolean Algebra and Computer Hardware Page 1 of 8 Q1. What is a Proposition? Q2. What are Simple and Compound Propositions? Q3. What is a Connective? Q4. What are Sentential
More informationNumbers and Arithmetic
Numbers and Arithmetic See: P&H Chapter 2.4 2.6, 3.2, C.5 C.6 Hakim Weatherspoon CS 3410, Spring 2013 Computer Science Cornell University Big Picture: Building a Processor memory inst register file alu
More informationContents. Chapter 3 Combinational Circuits Page 1 of 36
Chapter 3 Combinational Circuits Page of 36 Contents Combinational Circuits...2 3. Analysis of Combinational Circuits...3 3.. Using a Truth Table...3 3..2 Using a Boolean Function...6 3.2 Synthesis of
More informationSave from: cs. Logic design 1 st Class أستاذ المادة: د. عماد
Save from: www.uotiq.org/dep cs Logic design 1 st Class أستاذ المادة: د. عماد استاذة المادة: م.م ميساء Contents Lectured One: Number system operation 1- Decimal numbers. 2- Binary numbers. 3- Octal numbers.
More informationXI STANDARD [ COMPUTER SCIENCE ] 5 MARKS STUDY MATERIAL.
2017-18 XI STANDARD [ COMPUTER SCIENCE ] 5 MARKS STUDY MATERIAL HALF ADDER 1. The circuit that performs addition within the Arithmetic and Logic Unit of the CPU are called adders. 2. A unit that adds two
More informationECE 341. Lecture # 3
ECE 341 Lecture # 3 Instructor: Zeshan Chishti zeshan@ece.pdx.edu October 7, 2013 Portland State University Lecture Topics Counters Finite State Machines Decoders Multiplexers Reference: Appendix A of
More informationCPE100: Digital Logic Design I
Professor Brendan Morris, SEB 3216, brendan.morris@unlv.edu CPE100: Digital Logic Design I Final Review http://www.ee.unlv.edu/~b1morris/cpe100/ 2 Logistics Tuesday Dec 12 th 13:00-15:00 (1-3pm) 2 hour
More informationHakim Weatherspoon CS 3410 Computer Science Cornell University
Hakim Weatherspoon CS 3410 Computer Science Cornell University The slides are the product of many rounds of teaching CS 3410 by Professors Weatherspoon, Bala, Bracy, and Sirer. memory inst 32 register
More informationCMPUT 329. Circuits for binary addition
CMPUT 329 Parallel Adder with Carry Lookahead and ALU Ioanis Nikolaidis (Katz & Borriello) rcuits for binary addition Full adder (carry-in to cascade for multi-bit adders) Sum = xor A xor B Cout = B +
More information