IN4R21. Real-Time Specification for Java (RTSJ) Damien MASSON January 20, 2014

Size: px
Start display at page:

Download "IN4R21. Real-Time Specification for Java (RTSJ) Damien MASSON January 20, 2014"

Transcription

1 IN4R21 Real-Time Specification for Java (RTSJ) Damien MASSON January 20, 2014

2 References Concurrent and Real-Time Programming in Java, Andy Wellings Real-Time Java Programming: With Java RTS, Eric J. Bruno et Greg Bollella 2/26

3 Thread Permits concurrent execution of several sequential codes to execute within the same process (so share memory) method main = new thread, 1 process: the VM the programmer can start new threads, modeled by the Thread class. Thread t = new Thread ( ) ; t. s t a r t ( ) ; execute method run() in a new Thread the method run() must be overridden Thread t = new Thread ( ) O v e r r i d e p u b l i c v o i d run ( ) { // h e l l o t. s t a r t ( ) ; 3/26

4 Runnable But direct redefinition of run() in Thread is a bad idea for a lot of good reasons: no multiple heritage with Java, field exists in Thread, the name space is not empty (e.g. Thread.name exists), no semantic separation between logic to execute and shell that model it for parallelism/concurrency. So there is the Runnable interface: Runnable l o g i c = new Runnable ( ) O v e r r i d e p u b l i c v o i d run ( ) { // h e l l o Thread t = new Thread ( l o g i c ) ; t. s t a r t ( ) ; Thread t2 = new Thread ( l o g i c ) ; t2. s t a r t ( ) ; 4/26

5 Priorities method setpriority(); 5/26

6 Threads Gesture suspend / stop() / destroy() / resume(): deprecated (must not be use) interrupt() yield() sleep() 6/26

7 Timer Permits to program executions 7/26

8 java.util.concurrent Contains a lot of tools to easily handle concurrency inherent issues, i.e without explicitly manipulate Thread: lesser chances to make mistakes. 8/26

9 Synchronisations permit to control/prevent the concurrent access to a piece of code (so to memory or other ressources) rendez-vous The more easy (but not recommanded!) p u b l i c c l a s s MyClass { p u b l i c s y n c h r o n i z e d v o i d mymethod ( ) { // code to p r o t e c t is equivalent to: p u b l i c v o i d mymethod ( ) { s y n c h r o n i z e d ( t h i s ) { // code to p r o t e c t (replace this by MyClass.getClass() for static methodes) 9/26

10 Synchronizations The good way: p u b l i c c l a s s MyClass { p r i v a t e f i n a l O b j e c t l o c k = new O b j e c t ( ) ; p u b l i c v o i d mymethod ( ) { s y n c h r o n i z e d ( l o c k ) { // code to p r o t e c t any Object can serve as lock the block structure prohibit to keep a lock beyond the method scope java 1.5 add the Lock object in order to address this limitation (does not concern this class) 10/26

11 Synchronizations This is not magic!! Warning: p u b l i c c l a s s MyClass { p r i v a t e f i n a l O b j e c t l o c k = new O b j e c t ( ) ; p u b l i c v o i d mymethod ( ) { // code p u b l i c v o i d myothermethod ( ) { s y n c h r o n i z e d ( l o c k ) { mymethod ( ) ; p u b l i c v o i d mysecondothermethod ( ) { mymethod ( ) ; Synchronized is only a wait to acquire a lock, it does permit to block an other piece of code to execute if this other piece of code does not ask the same lock. 11/26

12 rendez-vous Object.wait() Object.wait(timeout) Object.notify() Object.notifyAll(); 12/26

13 RTSJ philosophy No restriction to a specific version of Java RTSJ VM should be able to run any Java application Based on J2SE No syntax extension Does not require specific hardware Deterministic timing behavior 13/26

14 RTSJ Scope: Thread scheduling Memory Gesture Synchronization and resources sharing Asynchronous event handling Asynchronous transfer of control Timing and Clock System Functions 14/26

15 RTSJ one package: javax.realtime one spec for an rt-jvm one reference implementation: RI (tjvm) many other implementations: Java RTS, JamaïcaVM... 15/26

16 Scheduling (I) Runnable (I) Schedulable (C) Thread (C) AsyncEventHandler (C) RealtimeThread (C) BoundAsyncEventHandler (C) NoHeapRealtimeThread 16/26

17 Scheduling (C) Scheduler (C) PriorityScheduler (AC) SchedulingParameters (AC) ReleaseParameters (C) PriorityParameters (C) PeriodicParameters (C)... 16/26

18 Scheduling (C) Scheduler (I) Runnable (C) PriorityScheduler (I) Schedulable (C) Thread (AC) SchedulingParameters (AC) ReleaseParameters (C) AsyncEventHandler (C) RealtimeThread (C) PriorityParameters (C) PeriodicParameters (C)... (C) BoundAsyncEventHandler (C) NoHeapRealtimeThread 16/26

19 Simple Traffic Runnable l o g i c = new Runnable ( ) O v e r r i d e p u b l i c v o i d run ( ) { System. out. p r i n t l n ( "real - time hello " ) ; R e a l t i m e T h r e a d t = new R e a l t i m e T h r e a d ( l o g i c ) ; t. s t a r t ( ) ; Priority assignment with setschedulingparameters() (pretty much the same as setpriority(), but warning: the spec is the spec, implementations are implementations...), or directly to the constructor new R e a l t i m e T h r e a d ( new P r i o r i t y P a r a m e t e r s ( 1 5 ) ) ; Priority segementation between non RT (from 1 to 10) and RT (from 11 to at least 30) 17/26

20 Periodic traffic - RealtimeThread Runnable l o g i c = new Runnable ( ) O v e r r i d e p u b l i c v o i d run ( ) { do{ System. out. p r i n t l n ( " periodic hello in real - time " ) ; w h i l e ( w a i t F o r N e x t P e r i o d ( ) ) ; R e l a t i v e T i m e s t a r t = new R e l a t i v e T i m e ( ) ; R e l a t i v e T i m e p e r i o d = new R e l a t i v e T i m e ( , 0 ) ; P e r i o d i c P a r a m e t e r s param = new P e r i o d i c P a r a m e t e r s ( s t a r t, p e r i o d ) ; R e a l t i m e T h r e a d t = new R e a l t i m e T h r e a d ( param, l o g i c ) ; t. s t a r t ( ) ; waitfornextperiod returns false when the deadline is missed (implicit deadline is the default) 18/26

21 Absolute/Relative Time Date/duration: two subclasses of HighResolutionTime Permits to encode precise time (but does not mean this is the system granularity!!) Warning: most of these object s methods create objects p r i v a t e f i n a l AbsoluteTime abs = new AbsoluteTime ( ) ; p r i v a t e f i n a l R e l a t i v e T i m e r e l 1 = new R e l a t i v e T i m e ( ) ; p r i v a t e f i n a l R e l a t i v e T i m e r e l 2 = new R e l a t i v e T i m e ( ) ; v o i d mymethod ( ) { Clock. g e t R e a l t i m e C l o c k ( ). gettime ( abs ) ; r e l 1. s e t ( 1 0, 5 ) ; abs. s u b t r a c t ( r e l 1, r e l 2 ) ; p r i v a t e f i n a l R e l a t i v e T i m e r e l 1 = new R e l a t i v e T i m e ( ) ; p r i v a t e f i n a l R e l a t i v e T i m e r e l 2 = new R e l a t i v e T i m e ( ) ; v o i d methode ( ) { AbsoluteTime abs = Clock. g e t R e a l t i m e C l o c k ( ). gettime ( ) ; R e l a t i v e T i m e r e l 1 = new R e l a t i v e T i m e ( 1 0, 5 ) ; R e l a t i v e T i m e r e l 2 = abs. s u b t r a c t ( r e l 1 ) ; 19/26

22 Periodic Traffic - RealtimeThread Runnable l o g i c = new Runnable ( ) O v e r r i d e p u b l i c v o i d run ( ) { do{ System. out. p r i n t l n ( " periodic hello in real - time " ) ; w h i l e ( w a i t F o r N e x t P e r i o d ( ) ) ; R e l a t i v e T i m e s t a r t = new R e l a t i v e T i m e ( ) ; R e l a t i v e T i m e p e r i o d = new R e l a t i v e T i m e ( , 0 ) ; R e l a t i v e T i m e d e a d l i n e = new R e l a t i v e T i m e ( 5 0 0, 0 ) ; R e l a t i v e T i m e wcet = new R e l a t i v e T i m e ( 2 0 0, 0 ) ; P e r i o d i c P a r a m e t e r s param = new P e r i o d i c P a r a m e t e r s ( s t a r t, p e r i o d, wcet, d e a d l i n e, n u l l, n u l l ) ; R e a l t i m e T h r e a d t = new R e a l t i m e T h r e a d ( param, l o g i c ) ; t. s t a r t ( ) ; 20/26

23 Sporadic Traffic Runnable l o g i c = new Runnable ( ) O v e r r i d e p u b l i c v o i d run ( ) { System. out. p r i n t l n ( " Sporadic Hello " ) ; AsyncEventHandler h a n d l e r = new AsyncEventHandler ( l o g i c ) ; AsyncEvent e v e n t = new AsyncEvent ( ) ; e v e n t. addhandler ( h a n d l e r ) ; //... e v e n t. f i r e ( ) ; 21/26

24 Sporadic Traffic Runnable l o g i c = new Runnable ( ) O v e r r i d e p u b l i c v o i d run ( ) { System. out. p r i n t l n ( " Hey " ) ; AsyncEventHandler h a n d l e r = new AsyncEventHandler ( l o g i c ) ; AsyncEvent e v e n t = new AsyncEvent ( ) ; e v e n t. addhandler ( h a n d l e r ) ; AsyncEventHandler h a n d l e r 2 = new AsyncEventHandler ( l o g i c ) ; e v e n t. addhandler ( h a n d l e r 2 ) ; //... e v e n t. f i r e ( ) ; 22/26

25 Periodic Traffic - AE/AEH Runnable l o g i c = new Runnable ( ) O v e r r i d e p u b l i c v o i d run ( ) { System. out. p r i n t l n ( " Periodic Hello " ) ; AsyncEventHandler h a n d l e r = new AsyncEventHandler ( l o g i c ) ; R e l a t i v e T i m e s t a r t = new R e l a t i v e T i m e ( ) ; R e l a t i v e T i m e p e r i o d = new R e l a t i v e T i m e ( , 0 ) ; P e r i o d i c T i m e r t i m e r = new P e r i o d i c T i m e r ( s t a r t, p e r i o d, h a n d l e r ) ; AsyncEventHandler encapsulates Release/Scheduling Parameters, as RealtimeThread 23/26

26 Periodic Traffic - RealtimeThread Runnable l o g i c = new Runnable ( ) O v e r r i d e p u b l i c v o i d run ( ) { do{ System. out. p r i n t l n ( " periodic hello " ) ; w h i l e ( w a i t F o r N e x t P e r i o d ( ) ) ; R e l a t i v e T i m e s t a r t = new R e l a t i v e T i m e ( ) ; R e l a t i v e T i m e p e r i o d = new R e l a t i v e T i m e ( , 0 ) ; R e l a t i v e T i m e d e a d l i n e = new R e l a t i v e T i m e ( 5 0 0, 0 ) ; R e l a t i v e T i m e wcet = new R e l a t i v e T i m e ( 2 0 0, 0 ) ; AsyncEventHandler wcethand = new AsyncEventHandler ( /... / ) ; AsyncEventHandler deadhand = new AsyncEventHandler ( /... / ) ; P e r i o d i c P a r a m e t e r s param = new P e r i o d i c P a r a m e t e r s ( s t a r t, p e r i o d, wcet, d e a d l i n e, wcethand, deadhand ) ; R e a l t i m e T h r e a d t = new R e a l t i m e T h r e a d ( param, l o g i c ) ; t. s t a r t ( ) ; If the VM is able to detect faults, it call fire() method of encapsulated Event Beware of handlers priorities... 24/26

27 RTSJ : FA Delegated to the Scheduler addtofeasibility() isfeasible() bad idea! 25/26

28 Asynchronous transfer of control (interruption) Brings the possibility to stop an other thread Only if this thread executes a piece of code that has been explicitly marked as interruptable Use Exception AsynchronouslyInterruptedException Timed interruptible interrupt(); 26/26

Time & Space. Time & Space. Time & Space. What is time? Time & Space. Interfacing with time. Specifying timing requirements

Time & Space. Time & Space. Time & Space. What is time? Time & Space. Interfacing with time. Specifying timing requirements 380 Real-Time & Embedded 4 Systems 2015 Uwe R. Zimmer - The Australian National University 382 The big topics: What is time? / What is embodiment? Satisfying timing requirements 2017 Uwe R. Zimmer, The

More information

INF Models of concurrency

INF Models of concurrency INF4140 - Models of concurrency RPC and Rendezvous INF4140 Lecture 15. Nov. 2017 RPC and Rendezvous Outline More on asynchronous message passing interacting processes with different patterns of communication

More information

Userland Approximate Slack Stealer with Low Time Complexity

Userland Approximate Slack Stealer with Low Time Complexity Userland Approximate Slack Stealer with Low Time Complexity Damien Masson and Serge Midonnet Université Paris-Est Laboratoire d Informatique Gaspard-Monge UMR 849 IGM-LabInfo 77454 Marne-la-Vallée Cedex

More information

Real-Time Scheduling. Real Time Operating Systems and Middleware. Luca Abeni

Real-Time Scheduling. Real Time Operating Systems and Middleware. Luca Abeni Real Time Operating Systems and Middleware Luca Abeni luca.abeni@unitn.it Definitions Algorithm logical procedure used to solve a problem Program formal description of an algorithm, using a programming

More information

Process Scheduling for RTS. RTS Scheduling Approach. Cyclic Executive Approach

Process Scheduling for RTS. RTS Scheduling Approach. Cyclic Executive Approach Process Scheduling for RTS Dr. Hugh Melvin, Dept. of IT, NUI,G RTS Scheduling Approach RTS typically control multiple parameters concurrently Eg. Flight Control System Speed, altitude, inclination etc..

More information

Embedded Systems Development

Embedded Systems Development Embedded Systems Development Lecture 3 Real-Time Scheduling Dr. Daniel Kästner AbsInt Angewandte Informatik GmbH kaestner@absint.com Model-based Software Development Generator Lustre programs Esterel programs

More information

Lecture 13. Real-Time Scheduling. Daniel Kästner AbsInt GmbH 2013

Lecture 13. Real-Time Scheduling. Daniel Kästner AbsInt GmbH 2013 Lecture 3 Real-Time Scheduling Daniel Kästner AbsInt GmbH 203 Model-based Software Development 2 SCADE Suite Application Model in SCADE (data flow + SSM) System Model (tasks, interrupts, buses, ) SymTA/S

More information

Real Time Operating Systems

Real Time Operating Systems Real Time Operating ystems Luca Abeni luca.abeni@unitn.it Interacting Tasks Until now, only independent tasks... A job never blocks or suspends A task only blocks on job termination In real world, jobs

More information

Task Models and Scheduling

Task Models and Scheduling Task Models and Scheduling Jan Reineke Saarland University June 27 th, 2013 With thanks to Jian-Jia Chen at KIT! Jan Reineke Task Models and Scheduling June 27 th, 2013 1 / 36 Task Models and Scheduling

More information

INF Models of concurrency

INF Models of concurrency Monitors INF4140 - Models of concurrency Monitors, lecture 4 Fall 2017 27. September 2017 2 / 49 Overview Concurrent execution of different processes Communication by shared variables Processes may interfere

More information

CIS 4930/6930: Principles of Cyber-Physical Systems

CIS 4930/6930: Principles of Cyber-Physical Systems CIS 4930/6930: Principles of Cyber-Physical Systems Chapter 11 Scheduling Hao Zheng Department of Computer Science and Engineering University of South Florida H. Zheng (CSE USF) CIS 4930/6930: Principles

More information

Real Time Operating Systems

Real Time Operating Systems Real Time Operating ystems hared Resources Luca Abeni Credits: Luigi Palopoli, Giuseppe Lipari, and Marco Di Natale cuola uperiore ant Anna Pisa -Italy Real Time Operating ystems p. 1 Interacting Tasks

More information

Lab Course: distributed data analytics

Lab Course: distributed data analytics Lab Course: distributed data analytics 01. Threading and Parallelism Nghia Duong-Trung, Mohsan Jameel Information Systems and Machine Learning Lab (ISMLL) University of Hildesheim, Germany International

More information

Design of Real-Time Software

Design of Real-Time Software Design of Real-Time Software Reference model Reinder J. Bril Technische Universiteit Eindhoven Department of Mathematics and Computer Science System Architecture and Networking Group P.O. Box 513, 5600

More information

Actors for Reactive Programming. Actors Origins

Actors for Reactive Programming. Actors Origins Actors Origins Hewitt, early 1970s (1973 paper) Around the same time as Smalltalk Concurrency plus Scheme Agha, early 1980s (1986 book) Erlang (Ericsson), 1990s Akka, 2010s Munindar P. Singh (NCSU) Service-Oriented

More information

Design Patterns and Refactoring

Design Patterns and Refactoring Singleton Oliver Haase HTWG Konstanz 1 / 19 Description I Classification: object based creational pattern Puropse: ensure that a class can be instantiated exactly once provide global access point to single

More information

Abstractions and Decision Procedures for Effective Software Model Checking

Abstractions and Decision Procedures for Effective Software Model Checking Abstractions and Decision Procedures for Effective Software Model Checking Prof. Natasha Sharygina The University of Lugano, Carnegie Mellon University Microsoft Summer School, Moscow, July 2011 Lecture

More information

Real-time Scheduling of Periodic Tasks (1) Advanced Operating Systems Lecture 2

Real-time Scheduling of Periodic Tasks (1) Advanced Operating Systems Lecture 2 Real-time Scheduling of Periodic Tasks (1) Advanced Operating Systems Lecture 2 Lecture Outline Scheduling periodic tasks The rate monotonic algorithm Definition Non-optimality Time-demand analysis...!2

More information

Maps performance tips On server: Maintain DB connections, prepared statements (per thread/request!)

Maps performance tips On server: Maintain DB connections, prepared statements (per thread/request!) Announcements Maps performance tips On server: Maintain DB connections, prepared statements (per thread/request!) Use Spark.before, Spark.after to open and close. Use ThreadLocal, or pass the connection

More information

CSE 380 Computer Operating Systems

CSE 380 Computer Operating Systems CSE 380 Computer Operating Systems Instructor: Insup Lee & Dianna Xu University of Pennsylvania, Fall 2003 Lecture Note 3: CPU Scheduling 1 CPU SCHEDULING q How can OS schedule the allocation of CPU cycles

More information

Slack-Time Computation for Temporal Robustness in Embedded Systems

Slack-Time Computation for Temporal Robustness in Embedded Systems Slack-Time Computation for Temporal Robustness in Embedded Systems Serge Midonnet, Damien Masson, Rémi Lassalle To cite this version: Serge Midonnet, Damien Masson, Rémi Lassalle. Slack-Time Computation

More information

The conceptual view. by Gerrit Muller University of Southeast Norway-NISE

The conceptual view. by Gerrit Muller University of Southeast Norway-NISE by Gerrit Muller University of Southeast Norway-NISE e-mail: gaudisite@gmail.com www.gaudisite.nl Abstract The purpose of the conceptual view is described. A number of methods or models is given to use

More information

Outline. PeerSim: Informal introduction. Resources. What is PeerSim? Alberto Montresor Gianluca Ciccarelli

Outline. PeerSim: Informal introduction. Resources. What is PeerSim? Alberto Montresor Gianluca Ciccarelli Outline PeerSim: Informal introduction Alberto Montresor Gianluca Ciccarelli Networking group - University of Trento April 3, 2009 1 2 files structure 3 1 / 45 2 / 45 Resources What is PeerSim? These slides

More information

ECE 407 Computer Aided Design for Electronic Systems. Simulation. Instructor: Maria K. Michael. Overview

ECE 407 Computer Aided Design for Electronic Systems. Simulation. Instructor: Maria K. Michael. Overview 407 Computer Aided Design for Electronic Systems Simulation Instructor: Maria K. Michael Overview What is simulation? Design verification Modeling Levels Modeling circuits for simulation True-value simulation

More information

Cyclic Schedules: General Structure. Frame Size Constraints

Cyclic Schedules: General Structure. Frame Size Constraints CPSC-663: Real-ime Systems Cyclic Schedules: General Structure Scheduling decision is made periodically: Frame Scheduling decision is made periodically: choose which job to execute perorm monitoring and

More information

LSN 15 Processor Scheduling

LSN 15 Processor Scheduling LSN 15 Processor Scheduling ECT362 Operating Systems Department of Engineering Technology LSN 15 Processor Scheduling LSN 15 FCFS/FIFO Scheduling Each process joins the Ready queue When the current process

More information

The AADL behavior annex - experiments and roadmap

The AADL behavior annex - experiments and roadmap The AADL behavior annex - experiments and roadmap R. B. França 1 J-P. Bodeveix 1 M. Filali 1 J-F. Rolland 1 D. Chemouil 2 D. Thomas 3 1 Institut de Recherche en Informatique de Toulouse Université Paul

More information

Clock-driven scheduling

Clock-driven scheduling Clock-driven scheduling Also known as static or off-line scheduling Michal Sojka Czech Technical University in Prague, Faculty of Electrical Engineering, Department of Control Engineering November 8, 2017

More information

EXPERIMENT Traffic Light Controller

EXPERIMENT Traffic Light Controller 11.1 Objectives EXPERIMENT 11 11. Traffic Light Controller Practice on the design of clocked sequential circuits. Applications of sequential circuits. 11.2 Overview In this lab you are going to develop

More information

Outline F eria AADL behavior 1/ 78

Outline F eria AADL behavior 1/ 78 Outline AADL behavior Annex Jean-Paul Bodeveix 2 Pierre Dissaux 3 Mamoun Filali 2 Pierre Gaufillet 1 François Vernadat 2 1 AIRBUS-FRANCE 2 FéRIA 3 ELLIDIS SAE AS2C Detroit Michigan April 2006 FéRIA AADL

More information

Real-Time Systems. LS 12, TU Dortmund

Real-Time Systems. LS 12, TU Dortmund Real-Time Systems Prof. Dr. Jian-Jia Chen LS 12, TU Dortmund April 24, 2014 Prof. Dr. Jian-Jia Chen (LS 12, TU Dortmund) 1 / 57 Organization Instructor: Jian-Jia Chen, jian-jia.chen@cs.uni-dortmund.de

More information

Scheduling Slack Time in Fixed Priority Pre-emptive Systems

Scheduling Slack Time in Fixed Priority Pre-emptive Systems Scheduling Slack Time in Fixed Priority Pre-emptive Systems R.I.Davis Real-Time Systems Research Group, Department of Computer Science, University of York, England. ABSTRACT This report addresses the problem

More information

Che-Wei Chang Department of Computer Science and Information Engineering, Chang Gung University

Che-Wei Chang Department of Computer Science and Information Engineering, Chang Gung University Che-Wei Chang chewei@mail.cgu.edu.tw Department of Computer Science and Information Engineering, Chang Gung University } 2017/11/15 Midterm } 2017/11/22 Final Project Announcement 2 1. Introduction 2.

More information

CS-206 Concurrency. Lecture 8 Concurrent. Data structures. a b c d. Spring 2015 Prof. Babak Falsafi parsa.epfl.ch/courses/cs206/ remove(c) remove(b)

CS-206 Concurrency. Lecture 8 Concurrent. Data structures. a b c d. Spring 2015 Prof. Babak Falsafi parsa.epfl.ch/courses/cs206/ remove(c) remove(b) CS-206 Concurrency Lecture 8 Concurrent a b c d Data structures Spring 2015 Prof. Babak Falsafi parsa.epfl.ch/courses/cs206/ remove(b) remove(c) Adapted from slides originally developed by Maurice Herlihy

More information

Scheduling Periodic Real-Time Tasks on Uniprocessor Systems. LS 12, TU Dortmund

Scheduling Periodic Real-Time Tasks on Uniprocessor Systems. LS 12, TU Dortmund Scheduling Periodic Real-Time Tasks on Uniprocessor Systems Prof. Dr. Jian-Jia Chen LS 12, TU Dortmund 08, Dec., 2015 Prof. Dr. Jian-Jia Chen (LS 12, TU Dortmund) 1 / 38 Periodic Control System Pseudo-code

More information

INF Models of concurrency

INF Models of concurrency INF4140 - Models of concurrency Fall 2017 October 17, 2017 Abstract This is the handout version of the slides for the lecture (i.e., it s a rendering of the content of the slides in a way that does not

More information

Scheduling. Uwe R. Zimmer & Alistair Rendell The Australian National University

Scheduling. Uwe R. Zimmer & Alistair Rendell The Australian National University 6 Scheduling Uwe R. Zimmer & Alistair Rendell The Australian National University References for this chapter [Bacon98] J. Bacon Concurrent Systems 1998 (2nd Edition) Addison Wesley Longman Ltd, ISBN 0-201-17767-6

More information

The Discrete EVent System specification (DEVS) formalism

The Discrete EVent System specification (DEVS) formalism The Discrete EVent System specification (DEVS) formalism Hans Vangheluwe The DEVS formalism was conceived by Zeigler [Zei84a, Zei84b] to provide a rigourous common basis for discrete-event modelling and

More information

Thread Specific Storage

Thread Specific Storage Thread Specific Storage The behavioural pattern explained Huib van den Brink Utrecht University hjbrink@cs.uu.nl Abstract While multi-threading can improve the performance of an application, this is not

More information

Embedded Systems Development

Embedded Systems Development Embedded Systems Development Lecture 2 Finite Automata & SyncCharts Daniel Kästner AbsInt Angewandte Informatik GmbH kaestner@absint.com Some things I forgot to mention 2 Remember the HISPOS registration

More information

A framework for simulation and symbolic state space analysis of non-markovian models

A framework for simulation and symbolic state space analysis of non-markovian models A framework for simulation and symbolic state space analysis of non-markovian models Laura Carnevali, Lorenzo Ridi, Enrico Vicario SW Technologies Lab (STLab) - Dip. Sistemi e Informatica (DSI) - Univ.

More information

Embedded Systems. Embedded Systems

Embedded Systems. Embedded Systems Embedded Systems - 1 - Embedded Systems Bernd Finkbeiner (finkbeiner@cs.uni-sb.de) Rüdiger Ehlers (ehlers@cs.uni-sb.de) Hans-Jörg Peter (peter@cs.uni-sb.de) Michael Gerke (micge@hotmail.com) Lectures:

More information

Simple Instruction-Pipelining (cont.) Pipelining Jumps

Simple Instruction-Pipelining (cont.) Pipelining Jumps 6.823, L9--1 Simple ruction-pipelining (cont.) + Interrupts Updated March 6, 2000 Laboratory for Computer Science M.I.T. http://www.csg.lcs.mit.edu/6.823 Src1 ( j / ~j ) Src2 ( / Ind) Pipelining Jumps

More information

CycleTandem: Energy-Saving Scheduling for Real-Time Systems with Hardware Accelerators

CycleTandem: Energy-Saving Scheduling for Real-Time Systems with Hardware Accelerators CycleTandem: Energy-Saving Scheduling for Real-Time Systems with Hardware Accelerators Sandeep D souza and Ragunathan (Raj) Rajkumar Carnegie Mellon University High (Energy) Cost of Accelerators Modern-day

More information

Real-Time Scheduling

Real-Time Scheduling 1 Real-Time Scheduling Formal Model [Some parts of this lecture are based on a real-time systems course of Colin Perkins http://csperkins.org/teaching/rtes/index.html] Real-Time Scheduling Formal Model

More information

Exercise 1: Formal Tools and Techniques (10 points)

Exercise 1: Formal Tools and Techniques (10 points) EXAM System Validation (191401) 13:45-17:15 0-07-01 The exercises are worth a total of 100 points. The final grade for the course is (hw 1+hw )/+exam/10, provided that you obtain at least 50 points for

More information

Time. Today. l Physical clocks l Logical clocks

Time. Today. l Physical clocks l Logical clocks Time Today l Physical clocks l Logical clocks Events, process states and clocks " A distributed system a collection P of N singlethreaded processes without shared memory Each process p i has a state s

More information

Operating Systems. VII. Synchronization

Operating Systems. VII. Synchronization Operating Systems VII. Synchronization Ludovic Apvrille ludovic.apvrille@telecom-paristech.fr Eurecom, office 470 http://soc.eurecom.fr/os/ @OS Eurecom Outline Synchronization issues 2/22 Fall 2017 Institut

More information

CEC 450 Real-Time Systems

CEC 450 Real-Time Systems CEC 450 Real-Time Systems Lecture 3 Real-Time Services Part 2 (Rate Monotonic Theory - Policy and Feasibility for RT Services) September 7, 2018 Sam Siewert Quick Review Service Utility RM Policy, Feasibility,

More information

Schedulability Analysis for the Abort-and-Restart Model

Schedulability Analysis for the Abort-and-Restart Model Schedulability Analysis for the Abort-and-Restart Model Hing Choi Wong Doctor of Philosophy University of York Computer Science December 2014 Abstract In real-time systems, a schedulable task-set guarantees

More information

Two Generalisations of Roşu and Chen s Trace Slicing Algorithm A

Two Generalisations of Roşu and Chen s Trace Slicing Algorithm A Two Generalisations of Roşu and Chen s Trace Slicing Algorithm A Clemens Ballarin aicas GmbH Haid-und-Neu-Straße 18 76131 Karlsruhe, Germany ballarin@aicas.com Abstract. Roşu and Chen s trace analysis

More information

Aperiodic Task Scheduling

Aperiodic Task Scheduling Aperiodic Task Scheduling Jian-Jia Chen (slides are based on Peter Marwedel) TU Dortmund, Informatik 12 Germany Springer, 2010 2017 年 11 月 29 日 These slides use Microsoft clip arts. Microsoft copyright

More information

Time. To do. q Physical clocks q Logical clocks

Time. To do. q Physical clocks q Logical clocks Time To do q Physical clocks q Logical clocks Events, process states and clocks A distributed system A collection P of N single-threaded processes (p i, i = 1,, N) without shared memory The processes in

More information

Modern Functional Programming and Actors With Scala and Akka

Modern Functional Programming and Actors With Scala and Akka Modern Functional Programming and Actors With Scala and Akka Aaron Kosmatin Computer Science Department San Jose State University San Jose, CA 95192 707-508-9143 akosmatin@gmail.com Abstract For many years,

More information

A Multi-Periodic Synchronous Data-Flow Language

A Multi-Periodic Synchronous Data-Flow Language Julien Forget 1 Frédéric Boniol 1 David Lesens 2 Claire Pagetti 1 firstname.lastname@onera.fr 1 ONERA - Toulouse, FRANCE 2 EADS Astrium Space Transportation - Les Mureaux, FRANCE November 19, 2008 1 /

More information

Digital Control of Electric Drives

Digital Control of Electric Drives Digital Control of Electric Drives Logic Circuits - equential Description Form, Finite tate Machine (FM) Czech Technical University in Prague Faculty of Electrical Engineering Ver.. J. Zdenek 27 Logic

More information

Specifying and Analysing Networks of Processes in CSP T (or In Search of Associativity)

Specifying and Analysing Networks of Processes in CSP T (or In Search of Associativity) Specifying and Analysing Networks of Processes in CSP T (or In Search of Associativity) Paul Howells University of Westminster Mark d Inverno Goldsmiths, University of London Communicating Process Architectures

More information

The STATEMATE Semantics of Statecharts. Presentation by: John Finn October 5, by David Harel

The STATEMATE Semantics of Statecharts. Presentation by: John Finn October 5, by David Harel The STATEMATE Semantics of Statecharts Presentation by: John Finn October 5, 2010 by David Harel Outline Introduction The Basics System Reactions Compound Transitions History Scope of Transitions Conflicting

More information

Expressing Dynamics of Mobile Programs by Typing

Expressing Dynamics of Mobile Programs by Typing 5 th Slovakian-Hungarian Joint Symposium on Applied Machine Intelligence and Informatics January 25-26, 2007 Poprad, Slovakia Expressing Dynamics of Mobile Programs by Typing Martin Tomášek Department

More information

Real-Time Scheduling and Resource Management

Real-Time Scheduling and Resource Management ARTIST2 Summer School 2008 in Europe Autrans (near Grenoble), France September 8-12, 2008 Real-Time Scheduling and Resource Management Lecturer: Giorgio Buttazzo Full Professor Scuola Superiore Sant Anna

More information

CHAPTER 5 - PROCESS SCHEDULING

CHAPTER 5 - PROCESS SCHEDULING CHAPTER 5 - PROCESS SCHEDULING OBJECTIVES To introduce CPU scheduling, which is the basis for multiprogrammed operating systems To describe various CPU-scheduling algorithms To discuss evaluation criteria

More information

Verification, Refinement and Scheduling of Real-time Programs

Verification, Refinement and Scheduling of Real-time Programs Verification, Refinement and Scheduling of Real-time Programs Zhiming Liu Department of Maths & Computer Science Universisty of Leicester Leicester LE1 7RH, UK. E-mail: Z.Liu@mcs.le.ac.uk Mathai Joseph

More information

Scheduling of Concurrent Reactive Objects for Embedded Real-Time Systems

Scheduling of Concurrent Reactive Objects for Embedded Real-Time Systems Scheduling of Concurrent Reactive Objects for Embedded Real-Time Systems Per Lindgren, Professor Embedded Systems Luleå University of Technology Sweden using Microsoft Powerpoint EISLAB Luleå University

More information

Administrivia. Course Objectives. Overview. Lecture Notes Week markem/cs333/ 2. Staff. 3. Prerequisites. 4. Grading. 1. Theory and application

Administrivia. Course Objectives. Overview. Lecture Notes Week markem/cs333/ 2. Staff. 3. Prerequisites. 4. Grading. 1. Theory and application Administrivia 1. markem/cs333/ 2. Staff 3. Prerequisites 4. Grading Course Objectives 1. Theory and application 2. Benefits 3. Labs TAs Overview 1. What is a computer system? CPU PC ALU System bus Memory

More information

Embedded Systems 5. Synchronous Composition. Lee/Seshia Section 6.2

Embedded Systems 5. Synchronous Composition. Lee/Seshia Section 6.2 Embedded Systems 5-1 - Synchronous Composition Lee/Seshia Section 6.2 Important semantic model for concurrent composition Here: composition of actors Foundation of Statecharts, Simulink, synchronous programming

More information

Shared resources. Sistemi in tempo reale. Giuseppe Lipari. Scuola Superiore Sant Anna Pisa -Italy

Shared resources. Sistemi in tempo reale. Giuseppe Lipari. Scuola Superiore Sant Anna Pisa -Italy istemi in tempo reale hared resources Giuseppe Lipari cuola uperiore ant Anna Pisa -Italy inher.tex istemi in tempo reale Giuseppe Lipari 7/6/2005 12:35 p. 1/21 Interacting tasks Until now, we have considered

More information

CS162 Operating Systems and Systems Programming Lecture 7 Semaphores, Conditional Variables, Deadlocks"

CS162 Operating Systems and Systems Programming Lecture 7 Semaphores, Conditional Variables, Deadlocks CS162 Operating Systems and Systems Programming Lecture 7 Semaphores, Conditional Variables, Deadlocks" September 19, 2012! Ion Stoica! http://inst.eecs.berkeley.edu/~cs162! Recap: Monitors" Monitors represent

More information

Multicore Semantics and Programming

Multicore Semantics and Programming Multicore Semantics and Programming Peter Sewell Tim Harris University of Cambridge Oracle October November, 2015 p. 1 These Lectures Part 1: Multicore Semantics: the concurrency of multiprocessors and

More information

Real-Time Systems. Event-Driven Scheduling

Real-Time Systems. Event-Driven Scheduling Real-Time Systems Event-Driven Scheduling Hermann Härtig WS 2018/19 Outline mostly following Jane Liu, Real-Time Systems Principles Scheduling EDF and LST as dynamic scheduling methods Fixed Priority schedulers

More information

More on Methods and Encapsulation

More on Methods and Encapsulation More on Methods and Encapsulation Hsuan-Tien Lin Deptartment of CSIE, NTU OOP Class, March 31, 2009 H.-T. Lin (NTU CSIE) More on Methods and Encapsulation OOP(even) 03/31/2009 0 / 38 Local Variables Local

More information

Towards a Practical Secure Concurrent Language

Towards a Practical Secure Concurrent Language Towards a Practical Secure Concurrent Language Stefan Muller and Stephen Chong TR-05-12 Computer Science Group Harvard University Cambridge, Massachusetts Towards a Practical Secure Concurrent Language

More information

How do PLC look like? What s special about PLC? What is a PLC? /50 2/50 5/50 6/50 3/ Splc main

How do PLC look like? What s special about PLC? What is a PLC? /50 2/50 5/50 6/50 3/ Splc main http://wikimedia.org (public domain) How do PLC look like? Albert-Ludwigs-Universität Freiburg, Germany Dr. Bernd Westphal 2013-05-29 Lecture 09: PLC Automata Real-ime Systems 4/50 http://wikimedia.org

More information

Trace semantics: towards a unification of parallel paradigms Stephen Brookes. Department of Computer Science Carnegie Mellon University

Trace semantics: towards a unification of parallel paradigms Stephen Brookes. Department of Computer Science Carnegie Mellon University Trace semantics: towards a unification of parallel paradigms Stephen Brookes Department of Computer Science Carnegie Mellon University MFCSIT 2002 1 PARALLEL PARADIGMS State-based Shared-memory global

More information

A Theory of Rate-Based Execution. A Theory of Rate-Based Execution

A Theory of Rate-Based Execution. A Theory of Rate-Based Execution Kevin Jeffay Department of Computer Science University of North Carolina at Chapel Hill jeffay@cs cs.unc.edu Steve Goddard Computer Science & Engineering University of Nebraska Ð Lincoln goddard@cse cse.unl.edu

More information

Shedding the Shackles of Time-Division Multiplexing

Shedding the Shackles of Time-Division Multiplexing Shedding the Shackles of Time-Division Multiplexing Farouk Hebbache with Florian Brandner, 2 Mathieu Jan, Laurent Pautet 2 CEA List, LS 2 LTCI, Télécom ParisTech, Université Paris-Saclay Multi-core Architectures

More information

Let s now begin to formalize our analysis of sequential machines Powerful methods for designing machines for System control Pattern recognition Etc.

Let s now begin to formalize our analysis of sequential machines Powerful methods for designing machines for System control Pattern recognition Etc. Finite State Machines Introduction Let s now begin to formalize our analysis of sequential machines Powerful methods for designing machines for System control Pattern recognition Etc. Such devices form

More information

Random Number Generator Digital Design - Demo

Random Number Generator Digital Design - Demo Understanding Digital Design The Digital Electronics 2014 Digital Design - Demo This presentation will Review the oard Game Counter block diagram. Review the circuit design of the sequential logic section

More information

Digital Electronics Sequential Logic

Digital Electronics Sequential Logic /5/27 igital Electronics Sequential Logic r. I. J. Wassell Sequential Logic The logic circuits discussed previously are known as combinational, in that the output depends only on the condition of the latest

More information

The Concurrent Consideration of Uncertainty in WCETs and Processor Speeds in Mixed Criticality Systems

The Concurrent Consideration of Uncertainty in WCETs and Processor Speeds in Mixed Criticality Systems The Concurrent Consideration of Uncertainty in WCETs and Processor Speeds in Mixed Criticality Systems Zhishan Guo and Sanjoy Baruah Department of Computer Science University of North Carolina at Chapel

More information

Simulation & Modeling Event-Oriented Simulations

Simulation & Modeling Event-Oriented Simulations Simulation & Modeling Event-Oriented Simulations Outline Simulation modeling characteristics Concept of Time A DES Simulation (Computation) DES System = model + simulation execution Data Structures Program

More information

Improved Priority Assignment for the Abort-and-Restart (AR) Model

Improved Priority Assignment for the Abort-and-Restart (AR) Model Improved Priority Assignment for the Abort-and-Restart (AR) Model H.C. Wong and A. Burns Department of Computer Science, University of York, UK. February 1, 2013 Abstract This paper addresses the scheduling

More information

The Quasi-Synchronous Approach to Distributed Control Systems

The Quasi-Synchronous Approach to Distributed Control Systems The Quasi-Synchronous Approach to Distributed Control Systems Paul Caspi caspi@imag.fr Verimag Laboratory http://www-verimag.imag.fr Crisys Esprit Project http://borneo.gmd.de/ ap/crisys/ The Quasi-Synchronous

More information

T Reactive Systems: Temporal Logic LTL

T Reactive Systems: Temporal Logic LTL Tik-79.186 Reactive Systems 1 T-79.186 Reactive Systems: Temporal Logic LTL Spring 2005, Lecture 4 January 31, 2005 Tik-79.186 Reactive Systems 2 Temporal Logics Temporal logics are currently the most

More information

public void run ( ) { i f ( this. id == 0) System. out. p r i n t ( 3 ) ; bro. j o i n ( ) ; else System. out. p r i n t ( 2 ) ;

public void run ( ) { i f ( this. id == 0) System. out. p r i n t ( 3 ) ; bro. j o i n ( ) ; else System. out. p r i n t ( 2 ) ; 1 Unusual programs 1. Consider the following Java program : public c l a s s Thread2 extends Thread { public int id ; public Thread2 bro ; public Thread2 ( int id, Thread2 bro ) { this. id = id ; this.

More information

Periodic scheduling 05/06/

Periodic scheduling 05/06/ Periodic scheduling T T or eriodic scheduling, the best that we can do is to design an algorithm which will always find a schedule if one exists. A scheduler is defined to be otimal iff it will find a

More information

An object-oriented design process. Weather system description. Layered architecture. Process stages. System context and models of use

An object-oriented design process. Weather system description. Layered architecture. Process stages. System context and models of use An object-oriented design process Process stages Structured design processes involve developing a number of different system models. They require a lot of effort for development and maintenance of these

More information

Blocking Synchronization: Streams Vijay Saraswat (Dec 10, 2012)

Blocking Synchronization: Streams Vijay Saraswat (Dec 10, 2012) 1 Streams Blocking Synchronization: Streams Vijay Saraswat (Dec 10, 2012) Streams provide a very simple abstraction for determinate parallel computation. The intuition for streams is already present in

More information

Clojure Concurrency Constructs, Part Two. CSCI 5828: Foundations of Software Engineering Lecture 13 10/07/2014

Clojure Concurrency Constructs, Part Two. CSCI 5828: Foundations of Software Engineering Lecture 13 10/07/2014 Clojure Concurrency Constructs, Part Two CSCI 5828: Foundations of Software Engineering Lecture 13 10/07/2014 1 Goals Cover the material presented in Chapter 4, of our concurrency textbook In particular,

More information

Counters. We ll look at different kinds of counters and discuss how to build them

Counters. We ll look at different kinds of counters and discuss how to build them Counters We ll look at different kinds of counters and discuss how to build them These are not only examples of sequential analysis and design, but also real devices used in larger circuits 1 Introducing

More information

Model Checking, Theorem Proving, and Abstract Interpretation: The Convergence of Formal Verification Technologies

Model Checking, Theorem Proving, and Abstract Interpretation: The Convergence of Formal Verification Technologies Model Checking, Theorem Proving, and Abstract Interpretation: The Convergence of Formal Verification Technologies Tom Henzinger EPFL Three Verification Communities Model checking: -automatic, but inefficient

More information

EDF Feasibility and Hardware Accelerators

EDF Feasibility and Hardware Accelerators EDF Feasibility and Hardware Accelerators Andrew Morton University of Waterloo, Waterloo, Canada, arrmorton@uwaterloo.ca Wayne M. Loucks University of Waterloo, Waterloo, Canada, wmloucks@pads.uwaterloo.ca

More information

MICROPROCESSOR REPORT. THE INSIDER S GUIDE TO MICROPROCESSOR HARDWARE

MICROPROCESSOR REPORT.   THE INSIDER S GUIDE TO MICROPROCESSOR HARDWARE MICROPROCESSOR www.mpronline.com REPORT THE INSIDER S GUIDE TO MICROPROCESSOR HARDWARE ENERGY COROLLARIES TO AMDAHL S LAW Analyzing the Interactions Between Parallel Execution and Energy Consumption By

More information

DMP. Deterministic Shared Memory Multiprocessing. Presenter: Wu, Weiyi Yale University

DMP. Deterministic Shared Memory Multiprocessing. Presenter: Wu, Weiyi Yale University DMP Deterministic Shared Memory Multiprocessing 1 Presenter: Wu, Weiyi Yale University Outline What is determinism? How to make execution deterministic? What s the overhead of determinism? 2 What Is Determinism?

More information

Future Trends in Computing X10 Basics Parallel Programming

Future Trends in Computing X10 Basics Parallel Programming Future Trends in Computing X10 Basics Parallel Programming Alexander Pöppl, Emily Ao Mo-Hellenbrand Chair of Scientific Computing in Computer Science Activities In X10, the fundamental unit of parallelism

More information

Compile-Time Analysis and Specialization of Clocks in Concurrent Programs

Compile-Time Analysis and Specialization of Clocks in Concurrent Programs Complile-Time Analysis and Specialization of Clocks in Concurrent Programs p. 1/23 Compile-Time Analysis and Specialization of Clocks in Concurrent Programs Nalini Vasudevan (Columbia University) Olivier

More information

Synchronous Sequential Circuit Design

Synchronous Sequential Circuit Design Synchronous Sequential Circuit Design 1 Sequential circuit design In sequential circuit design, we turn some description into a working circuit We first make a state table or diagram to express the computation

More information

Basic Computer Organization and Design Part 3/3

Basic Computer Organization and Design Part 3/3 Basic Computer Organization and Design Part 3/3 Adapted by Dr. Adel Ammar Computer Organization Interrupt Initiated Input/Output Open communication only when some data has to be passed --> interrupt. The

More information

From Sequential Circuits to Real Computers

From Sequential Circuits to Real Computers 1 / 36 From Sequential Circuits to Real Computers Lecturer: Guillaume Beslon Original Author: Lionel Morel Computer Science and Information Technologies - INSA Lyon Fall 2017 2 / 36 Introduction What we

More information

Binary Decision Diagrams and Symbolic Model Checking

Binary Decision Diagrams and Symbolic Model Checking Binary Decision Diagrams and Symbolic Model Checking Randy Bryant Ed Clarke Ken McMillan Allen Emerson CMU CMU Cadence U Texas http://www.cs.cmu.edu/~bryant Binary Decision Diagrams Restricted Form of

More information

TDDB68 Concurrent programming and operating systems. Lecture: CPU Scheduling II

TDDB68 Concurrent programming and operating systems. Lecture: CPU Scheduling II TDDB68 Concurrent programming and operating systems Lecture: CPU Scheduling II Mikael Asplund, Senior Lecturer Real-time Systems Laboratory Department of Computer and Information Science Copyright Notice:

More information