MICROWAVE FREQUENCY THIN BST FILM BASED TUNABLE SHUNT AND SERIES INTERDIGITAL CAPACITOR DEVICE DESIGN

Transcription

1 MICROWAVE FREQUENCY THIN BST FILM BASED TUNABLE SHUNT AND SERIES INTERDIGITAL CAPACITOR DEVICE DESIGN Thesis Submitted to The School of Engineering of the UNIVERSITY OF DAYTON In Partial Fulfillment of the Requirements for The Degree Master of Science in Electrical Engineering By Andargachew Desta Alemayehu UNIVERSITY OF DAYTON Dayton, Ohio May, 2011

2 MICROWAVE FREQUENCY THIN BST FILM BASED TUNABLE SHUNT AND SERIES INTERDIGITAL CAPACITOR DEVICE DESIGN Name: Alemayehu, Andargachew D. APPROVED BY: Guru Subramanyam, Ph.D. Professor and Department Chairperson Electrical and Computer Engineering Research and Thesis Advisor Advisory Committee Chairman Monish Chatterjee, Ph.D. Professor Electrical and Computer Engineering Committee Member Robert Penno, Ph.D. Associate Professor Electrical and Computer Engineering Committee Member John G. Weber, Ph.D. Associate Dean School of Engineering Tony E. Saliba, Ph.D. Dean School of Engineering ii

3 Copyright by Andargachew D. Alemayehu All rights reserved 2011

4 ABSTRACT MICROWAVE FREQUENCY THIN BST FILM BASED TUNABLE SHUNT AND SERIES INTERDIGITAL CAPACITOR DEVICE DESIGN Name: Alemayehu, Andargachew, Desta University of Dayton Advisor: Professor Guru Subramanyam This research covers novel interdigital capacitor designs and explores the different parameters affecting the electrical characteristics of the devices. Interdigitated capacitors were designed using parallel electrodes in series and in shunt configurations. The main purpose of these devices is to enhance the tunability as compared to conventional IDCs while retaining the high voltage bias capability. The new devices were designed and simulated using Advance Wireless Research (AWR) software, fabricated using PLD technique, tested and analyzed using HP8720 Network analyzer and AWR software respectively. During this thesis, we successfully demonstrated the new parallel plate IDC devices with higher tunability and high voltage bias capability. iv

5 ACKNOWLEDGEMENTS My special thanks are in order to Professor Guru Subramanyam, my advisor, for providing the time and equipment necessary for the work contained herein, and for directing this thesis and bringing it to its conclusion with patience and expertise. I would also like to express my appreciation to everyone who has helped with the work. This includes Mark Patterson, who shared his ideas and new concepts on this work and fabricates the devices; Henry Zhang, who helped test these devices. And last but not least, I am very grateful for the support of my parents, Fenta Kassie and Desta Alemayehu, my wife, Tigist Lemji, and my brothers and sisters who always gave me spiritual support and encouragement to accomplish this task. Above all God must be praised! v

6 PREFACE A lot of studies has been done on ferroelectric material based interdigital capacitors on how to gain higher tunability, higher operating voltage and better quality capacitor applicable in microwave devices. All the researches work on these devices were based on a coplanar structure and different composition BST material. A research at the University of Dayton has been performed on developing an interdigital capacitor with better tunable, with stand higher operating voltage with a better quality BST material. This work introduces a novel way of designing interdigital capacitors with higher tunability and higher quality factor. New designs have been designed, simulated, fabricated, tested and analyzed and demonstrated a series of new devices. vi

7 TABLE OF CONTENTS ABSTRACT... iv ACKNOWLEDGEMENTS... v PREFACE... vi LIST OF FIGURES... x LIST OF TABLES... xiii CHAPTER I 1 INTRODUCTION Ferroelectric Material Important Properties of Barium Strontium Titanate (BST) Capacitance DC Voltage (C-V or ε-v) Relationship Hysteresis Loop Current vs. Voltage (I-V) Review of Applications of BST Material Objective of the Study Accomplishments in the Study Plan of Study vii

8 1.7 Organization of the Thesis CHAPTER II 14 LITERATURE REVIEW ON BST THIN FILM DEVICES AND APPLICATIONS Frequency and Phase Agile Circuits Frequency Agile Circuits Phase Agile Circuits Varactors of Different Form Parallel Plate Capacitors (Varactors) Coplanar Interdigital Capacitor Non Coplanar Interdigital Capacitor Application of Varactors in Microwave Devices Phase Shifter Filters Switches CHAPTER III 31 DESIGN, FABRICATION AND EXPERIMENTAL SET UP Design of Series High Voltage Interdigital Capacitor (HV IDC) Introduction Device structure Design of a Series Interdigital Capacitor (Series IDC) Design of Shunt Interdigital Capacitor (Shunt IDC) Introduction Device Structure Design Fabrication viii

9 3.4 Theoretical Analysis / Simulation Electrical Equivalent Circuit Model Simulation Experimental Setup CHAPTER IV 63 RESULTS AND DISCUSSION Experimental test results Explanation Discussion and Analysis of Test Results CHAPTER V 78 SUMMARY AND RECOMMENDATION REFERENCES APPENDIX Thin BST Film Based Notch Filter Design ix

10 LIST OF FIGURES Figure 1 Hysteresis loop and phases of ferroelectric materials... 3 Figure 2 Hysteresis loop Er vs. Applied electric field E... 8 Figure 3 BST based parallel plate varactor design top view Figure 4 Coplanar interdigital capacitor design Figure 5 Non coplanar interdigital capacitor Figure 6 Front end receiver circuit model Figure 7 Two port phase shifter device Figure 8 Lumped element transmission line model Figure 9 Tunable third order combine band pass filter using BST varactor Figure 10 Cross-sectional view of different layers of capacitive switch Figure 11 Top view (ground-signal-ground) of a capacitive shunt switch Figure 12 Cross sectional view of a non-coplanar series IDC Figure 13 Non coplanar series IDC EM structure top view Figure 14 Non coplanar series IDC EM structure 3D view Figure 15 Shunt interdigital capacitor EM structure top view Figure 16 Shunt interdigital capacitor EM structure, top layer x

11 Figure 17 Shunt interdigital capacitor EM structure bottom layer view Figure 18 View of a shunt interdigital capacitor EM structure Figure 19 Automated in-situ, real-time, process control pulse laser deposition system. Real -time control based on feedback from emission spectra (ES)[13]. 45 Figure 20 Series interdigital capacitor design dimension Figure 21 Series interdigital capacitor electrical model Figure 22 Shunt interdigital capacitor equivalent electrical circuit model Figure 23 Complete experimental test setup (HP8720 network analyzer (left), microscope probe station (middle), cooling source to the probe station (right) and a DC biasing voltage source (top left)) Figure 24 Probe station Figure 25 Two port probes Figure 26 External low and high DC voltage source Figure 27 HP8720 Network analyzer Figure 28 Series IDC experimental result S21 (db) vs. Frequency (GHZ) plot Figure 29 Shunt IDC experimental test result plot Figure 30 Series IDC AWR simulation result S-parameter plot Figure 31 Series IDC AWR simulation result plot Figure 32 Tuning of a shunt IDC simulation (biased by changing the dielectric constant of a thin BST film) plot Figure 33 Tuning of a series IDC simulation over plot Figure 34 Data matching plot of a shunt IDC experimental data with equivalent electrical model xi

12 Figure 35 Tuning of an electrical model with experimental test result of a series IDC Figure 36 Capacitance vs. Voltage plot for shunt IDC 1 μm lateral gap Figure 37 Capacitance vs. Voltage plot for 5μm lateral gap shunt IDC Figure 38 Series IDC experimental data CV plot Figure 39 Series IDC experimental data CV plot Figure 40 Notch filter S21(dB) plot Figure 41 Equivalent circuit model Figure 42 Notch filter EM structure design xii

13 LIST OF TABLES Table 1 Ferroelectric and similar technology comparison table... 5 Table 2 Series IDC design matrix Table 3 Experimental test results for series IDC devices (L=400, N=8, W=20μm) Table 4 Percent tuning of the tested series IDC's Table 5 Series IDC experimental test data values Table 6 Percent tuning for the array of series IDC s fabricated xiii

14 CHAPTER I INTRODUCTION 1.1 Ferroelectric Material Electrically tunable materials based microwave devices have been demonstrated and attracted attentions in late 1960 and beginning of 1970 s. In late 1970 s till sometime in 1980s microwave devices have been regarded as devices only used in military applications, it is after breakthrough and very inclusive research done at the Electrictrotechnical Institute of named after Lenin, Leningrad. In this research institute a considerable amount of research work has been done and many publications were published encompassing the physics, devices design and experiment analysis of these materials. Despite this tremendous research work on ferroelectric materials, the practical applications of these materials in microwave devices were very limited as they have high dielectric losses. It is generally assumed that for applications in electrically tunable microwave devices ferroelectric thin films should be in paraelectric phase[2] Mostly ferroelectrics in polar phase haven t been considered for tunable microwave devices because the ferroelectric material in polar phase has large losses at relatively low microwave frequencies usually less than 10GHz. The reasons for these losses were: 1

15 piezoelectric transformations, domain wall movements, hysteresis due to the DC field dependence of permittivity. Due to the above constraints there were very limited attempts to utilize these materials in microwave devices in their ferroelectric phase. Apparently recent research works have tried to overcome these losses in polar form ferroelectric material through compensating electrically for the hysteresis losses and other techniques and making use of the substantial tune-ability of these materials. Recent requirements on microwave communication systems developments have been very tough on cost/performance of new devices and components used, paving the way for a number of new materials, devices and system architectures. Some of the results from this push for cost/performance improvements are: high speed (microwave) transistors and ICs (MMICs, RFICs) from silicon industry pushed the gate-lengths and feature sizes below 100nm. MEMs, micro machined devices, TFBARs, tunable ferroelectric devices, meta materials and electromagnetic band gap (EBG) structure etc., type promising results have been demonstrated and showed cost/performance improvement and enhanced functionality, creating opportunities for reconfigurable and adaptable microwave systems. Based on the temperature on ferroelectric material, there are two phases a ferroelectric material may exist: 1. Paraelectric: non-polar phase 2. Ferroelectric: polar phase 2

16 Figure 1 Hysteresis loop and phases of ferroelectric materials The paraelectric phase of ferroelectric material occurs when the material is heated above the Curie temperature, right side of figure 1.1. Curie temperature (Tc), or Curie point, is the temperature at which a ferromagnetic material becomes paraelectric on heating and this effect is reversible. The left part of the figure 1.1 is the electric field effect on ferroelectric material which is below the Curie temperature, polar phase. Ferroelectric materials have sensitive physical properties, like permittivity, polarization, refractive index, magnetic permeability etc., to temperature, biasing electrical field, magnetic and mechanical stress. This cause effect relationship of the properties and external forces made them a very suitable choice for applications in optical devices, microwave devices and electronics. 3

17 Brief description of Ferroelectric materials paraelectric and ferroelectric phase properties is given below: Stable spontaneous polarization in the polar phase that can be controlled by an external electric field Non polar phase materials have a randomly arranged dipole moments which cancels each other As ferroelectric materials are piezoelectric, they change in strain and polarization when an electric field is applied and the relationship between the applied stress and the polarization created is linear. The dielectric parameters are very dependent on temperature and the properties are observed only with in a definite range of temperature [3]. Here is a quick summary of the comparison between ferroelectric and other competing materials. 4

18 Table 1 Ferroelectric and similar technology comparison table Technology Power consumption Bias Speed Semiconductor Shottky (GaAs) <1mW <5V <1ns 200 HBV (GaAs) <1mW <20V <5ns 40 Abrupt p-n junction(si) <5mW <30V <10ns 30 PIN diode <0.1mW <10V <1micros FET 1ns Q- factor at 10GHz Magnetic YTG (Variable permeability, ferromagnetic resonance) High Current(coil) <5ms >3000 Remnant magnetization Low Current(coil) <5mS Magneto-static wave Low <5ms low Ferroelectric Thin film Negligible <30V <1ns >100 Thick film Negligible <1000V <10ns <100 Bulk Negligible <15kV <1micros >500 Liquid crystal Negligible <40 V <10 msec <20 Current(LD, Optical Photoconductivity <10 mw LED) 10fs-10ms <10 Current(LD, Fiber-optical <10mW LED) 10fs-10ms Mechanical Bulk High Current (motor/coil) >1ms >1000 MEM Varactor Negligible <50V >10 microns >200 Piezo-transducer Negligible >100V >100 microns >500 5

19 1.2 Important Properties of Barium Strontium Titanate (BST) Barium strontium titanate (Ba1-xSrxTiO3) abbreviated as BST, is a solid solution of barium titanate (BaTiO3 or BTO) and strontium titanate (SrTiO3 or STO) and it can be formed over the entire range of concentration x while BaTiO3 and SrTiO3 are two simple-pervoskite oxides, BST is usually called a complex pervoskite oxide because both Ba2+ and Sr2+ occupy the A-site in the ABO3 crystal structure [4]. Depending on the specific composition, temperature, BST can exhibit both paraelectric and ferroelectric behavior as they are ferroelectric materials. BST is by far the most researched and utilized in microwave devices, ferroelectric material for a long time. As BST is a ferroelectric material it inherits the properties of ferroelectric materials. To clearly understand the design, fabrication and usage of microwave devices build based on these materials, it is crucial to know the electrical properties of these materials like polarization with an externally applied electric field, capacitance vs. voltage, current vs. voltage etc. as these and other properties help characterize and design the most critical part of a device based on these materials. 6

20 1.2.1 Capacitance DC Voltage (C-V or ε-v) Relationship Capacitance voltage measurement is a small signal capacitance measurement compared to hysteresis measurement that can be described where amplitude of the applied voltage is small to turn on the remnant polarization in a ferroelectric capacitor. As the response of a non-linear sample changes with the absolute value of the voltage applied and the remnant polarization state, the small signal measurement must also have a steady state voltage component as well as remnant polarization pre-set procedure to put the sample in the appropriate state hence the small signal measurement captures and integrates only those changes the sample experiences during a small amplitude simulation of the sample at a specified voltage and polarization state [4]. The word small signal is to mean signal created when the dipole switches from one direction to another Hysteresis Loop One of the properties of ferroelectric in non-polar phase is the high dielectric permittivity that heavily depends on temperature, applied external electric field and mechanical stress. Ferroelectric materials possess dipoles and these dipoles align themselves to create a domain, within a domain all the dipoles are aligned in one direction. These domains are separated with domain walls. When an external field is applied on these domains they tend to align themselves in the direction of the applied field. When the external influence increases the domains will reach a saturation point where almost all the domains are aligned in the direction of the electric field and no more alignment occur. When the external 7

21 field is removed these domains will try to get back where they were but there will be some remnant domains which will stay as they were and will need some external field opposite to the direction of the previous field to bring them to a complete depolarization. This external field used to reduce the polarization to zero is called coercive field Ec. If the external field applied is increased on the opposite direction the direction of polarization changes and a hysteresis loop is obtained. Figure 2 Hysteresis loop Er vs. Applied electric field E The above figure illustrates the hysteresis curve for ferroelectric materials. When an external electric field is applied on the ferroelectric material the domains align 8

22 to a maximum point A and when the external electrical field is removed the domain will not completely randomize/depolarize rather will have some remnant domains hence have some polarization left which is OB. In order to disorient the domains as they used to be before, the application of an external electric field OF amount of is required in the opposite direction. Further application of an external electric field in the opposite direction will lead to a domain polarization in the opposite direction and reach a saturation point, G. For ferroelectric materials the domain polarization will have certain amount of polarization after an external electric field has been applied Current vs. Voltage (I-V) A current-voltage characteristics plot shows the leakage current measured through a sweep of voltage. These properties are used to investigate the mechanism on how conduction is done on thin films. Based on researches done to investigate the conduction mechanism, it has been demonstrated that Shottky emission, Pool-Frenkel emission, and space charge limited current (SCLC) are the most plausible mechanism controlling the nonlinear DC current through pervoskite films. 9

23 1.3 Review of Applications of BST Material Ferroelectric materials have been studied and applied on many microwave application devices extensively. Strontium titanate and barium strontium titanate are two of the most popular ferroelectric films currently being studied for design of tunable microwave devices. The use of these materials is basically exploiting their peculiar material characteristics like polarization reversal, high dielectric constant, a permittivity which can be controlled by application of an external DC electric field etc. Exploiting the permittivity controlled by an applied external electric field, tunable capacitors (Varactors) can be fabricated which has tunability >50% with small voltage application, 2-6 V. Other characteristics of BST materials which made them crucial for capacitor applications is low loss in high quality films, minimal frequency depression, as BST materials have very high dielectric constant high density of capacitors can be fabricated leading the way to low cost fabrication of products and easy integrations with active devices like MMICS too. Tunable capacitors don t produce junction noise as opposed to varactors diodes. Varactors are one of the devices build based on BST materials. Varactors are used in many components like voltage controlled oscillators (VCO), tunable filters, phase shifters and tunable matching networks which makes use of their tunability of >50% at very low applied external voltage characteristics of varactors. 10

24 1.4 Objective of the Study This research is conducted to explore frequency agile high voltage operating interdigitated capacitors while keeping the size of the device and price very low. There has been pioneering research done by Professor Guru Subramanyam on frequency agile BST based varactors. Based on these frequency agile and low operating voltage varactor devices study, our goal is to develop a device which can operate at higher voltages and has a good tunability. These devices have a very wide and diverse application in microwave circuits as switches, filters etc. 1.5 Accomplishments in the Study A wide variety of high voltage interdigital capacitor and shunt interdigital capacitors are investigated. By varying the critical parameters of these devices we have studied in depth how these devices work and ways to improve their certain characteristics as per the requirement. These devices use a new kind of thin BST material and proved experimentally that they have a better tune-ability, better quality factor and better operating voltage ranges than their bulk counterparts.. 11

25 1.6 Plan of Study This research is aimed to develop an optimized interdigital capacitor based on previous research works on interdigital capacitors, varactors and thin film BST material. After developing the device design, it is simulated using simulation tools (AWR) and compared with the expected theoretical result. The device will then be fabricated and tested in our laboratory. Analysis will be done between the test results, theoretical model and simulation results. Based on the lessons learned from the first experimental results a new device is designed and tested again. After a couple of iterations between design theoretical analysis and experimental result an optimum interdigitated capacitor is developed. 1.7 Organization of the Thesis Chapter 1 Introduces ferroelectric materials, properties of BST, review of application of BST materials, objective of these thesis and plan of study Chapter 2 Reviews literature of BST thin film devices and applications in microwave systems Chapter 3 Design, fabrication, test setup, simulation results and theoretical analysis as to how these devices operate and can be characterized 12

26 Chapter 4 Experimental results are shown here and explained here along with discussion based on the theoretical/simulation results Chapter 5 Summary and Recommendation 13

27 CHAPTER II LITERATURE REVIEW ON BST THIN FILM DEVICES AND APPLICATIONS 2.1 Frequency and Phase Agile Circuits Utilizing the nonlinear dielectric agility of thin film BST material, microwave devices can be used to tune either frequency or phase of a signal. Frequency and phase agile circuits in many cases provide a new capability or offer the potential for lower cost alternatives in satellite and terrestrial communications and sensor applications [5] Frequency Agile Circuits Frequency agile circuits have wide applications in microwave system. Frequency agile circuit could be used in K-band satellite communication subsystems such as a receiver front-end. BST materials can be easily tuned in wide range of frequency with an application of a very small amount of voltage. Frequency agile circuits are also includes resonators, filters, oscillators etc. 14

28 2.1.2 Phase Agile Circuits A phase agile circuit is used to provide a variable insertion phase in a microwave signal path without changing the physical path of the signal. These circuits are used in many different applications. The most common ones are phased array radars, synthetic aperture radars, diversity combining schemes, adaptive antenna configurations. Phase agile circuits can be subdivided as: 1. Digital 2. Loaded line 3. Reflection type 4. Switched line 5. Low-pass/high-pass. Digital, Switched line, and Low-pass/High-pass phase shifter typically use switches and are more suitable for application requiring discrete values of phase change [6]. The other two types of phase changers are: loaded line and reflection, lend themselves to analog phase agile design. A continuous phase tuning is attained on those devices using a variable reactance component. 15

29 2.2 Varactors of Different Form The use of varactors is strongly correlated with the utilization of the BST materials in different structure which makes them versatile hence increased their areas of application. Varactors are by far the most researched and applied devices for microwave applications. Based on the geometry of the signal lines there are basically three types of varactors. 1. Parallel plate capacitor (varactors ) 2. Coplanar capacitors 3. Interdigitated different layer capacitors Parallel Plate Capacitors (Varactors) The most common varactors are the parallel plate capacitors. They have been used in different microwave applications. The structure of this varactor is basically have a ground plane with a thin ground bridge between the two ground plane sides and a signal line on the top plane. 16

30 Figure 3 BST based parallel plate varactor design top view The capacitance created due to these overlapping planes can calculated as: Where A is the effective overlap area, D the gap between the two plates and ε (V) is the dielectric constant of the BST material. The dependence of the relative dielectric constant on the dc biasing voltage is the key to the tunability of varactors. The loss tangent is a parameter of a dielectric material that quantifies its inherent dissipation of electromagnetic energy. The loss tangent of a parallel plate varactor is calculated based on a shunt the resistance and is given by: 17

31 Where R (V) is the shunt resistance between the transmission line and the ground plane, C (V) is the capacitance between the parallel plates Coplanar Interdigital Capacitor The other design of varactors is a coplanar interdigital varactor. These devices have fingers spread from a signal line and spread the signal from a single line to multiple fingers and uses fringe capacitance created between adjust fingers from either side of the signal port. As these varactors don t have high overlapping effective area, they can handle higher operating voltage. 18

32 Figure 4 Coplanar interdigital capacitor design The electrical characteristics of interdigital capacitors theoretically can be calculated using conformal mapping technique Non Coplanar Interdigital Capacitor Parallel plane interdigital capacitor (Non coplanar interdigital capacitor) is a hybrid of parallel plate varactor and an interdigital capacitor. The two signal ports of these devices are on different planes and the diagonal space between fingers are greater than a single plane interdigital capacitor s fingers lateral gap. These types of interdigital capacitors have not been studied till our research group starts on researching, late These capacitors have a good tunability and handling high operating voltage. A 3D drawing of these devices gives a 19

33 better look at the difference between a coplanar interdigital capacitor and noncoplanar interdigital capacitor. Figure 5 Non coplanar interdigital capacitor The major capacitance created by these devices is from the fringe electric field between the top and bottom layer fingers edge. The greater gap created between the fingers on the different layers help these devices operate at high voltages. The theoretical electrical characteristics can be calculated using the conformal mapping technique. 20

34 2.3 Application of Varactors in Microwave Devices Recent advancement in materials fabrication and detailed study in ferroelectric material has enabled the wide application and use of ferroelectric based varactors in a wide range of microwave systems. The substantially high quality factor (Q-factor) at microwave and millimeter wave frequencies, higher tuning speed and lower power consumption along with high dielectric permittivity, are the key factors for high adaptability and versatility of varactors in microwave applications. Among many applications of varactors, the following are the most prominent: Tunable delay lines, phase shifters Tunable resonators, filters and matching networks Microwave beam scanning antennas Lumped or distributed capacitor Tunable impedance and frequency selective surfaces VSO s and power amplifiers etc. These varactors based devices can be combined to make microwave systems to be more intelligent, more adaptive and dynamic. For example in an agile microwave front end architecture, the main components like, filters, frequency synthesizers (VCOs), matching networks, frequency selective switches, phase shifters, delay lines etc., are all based on varactors. A plausible microwave front end receiver design is shown below. 21

35 Figure 6 Front end receiver circuit model Following are few of the most common varactor based devices review Phase Shifter Phase shifter is a two port device whose function is to provide change in a phase of a signal with ideally no or negligible attenuation. When an input signal S1 is passed through a phase shifter the output will have a phase shift of Ф which is inserted by the phase shifter. Figure 2.1 shows a simple block diagrams representation of a phase shifter and a phase shifted input signal. 22

36 Figure 7 Two port phase shifter device Depending on the setting of the phase shifter device, a phase Ф1 and phase Ф2 may be inserted on an input signal, and a differential phase shift is inserted on the signal. This differential phase shift is given as: The phase difference might be a phase delay or a phase advance depending on the sign of delta. Phase shifter advances or delays the phase of signal, but practically there is always lose associated with the device on the signal. The insertion loss of a phase shifter device can be calculated by taking the logarithmic valve of the magnitude ratio of the output and input signal. Mathematically it is given as: Where: S21 is a scattering parameter, ratio of output signal to input signal. 23

37 The insertion loss for reverse propagation can be calculated by inserting the input and output signal ratio S12 instead of S21. A simple phase agile circuit can be made based on a coplanar or parallel plate capacitor using BST thin film as a dielectric material. A phase shifter is consists of either a transmission line patterned on a thin film BST material or a transmission line loaded periodically with plates like varactors. For a tunable phase shifter a 50 ohm system, low loss and large phase shift are expected [7].The phase shift output of a phase shifter is directly proportional to the electrical length of the phase shifter hence related to the square root of the effective permittivity. As the phase shift is related to the effective permittivity, a change in the permittivity of the BST material used in the varactors will change the phase of the signal passing through the transmission line. The relevant figure of merit of such a device is known as the K-factor, given by a differential phase shift in degrees/insertion loss in db [7].Differential phase shift is the measure of the difference in phase shift between the biased and non-biased states of an input signal. For example, a CPW phase shifter based on a BST40/60 film grown by PLD on an MgO substrate has been reported with a K- factor of 45 o db -1 at 30GHz under the dc bias field of ~13V µm-1 [8]. The figure of merit K-factor can be used to characterize the quality of the phase shifter. Vendik et al has used an alternative measure of performance of a material or device called Commutation Quality Factor (CQF), which helps characterize a two-state, one port switchable network. CQF for ferroelectric varactors can be calculated as 24

38 Where n = is the tunability of the varactors, tan and tan are the loss tangents of the ferroelectric varactors under zero and non-zero bias voltage respectively. The CQF of the material used in the phase shifter and the phase shifter quality characterizing figure of merit K are used together to evaluate the characteristic of phase shifters. For a phase shifter with a ferroelectric varactor with loss-less non-tunable (conducting) components, the K-factor depends on the CQF of the capacitor only [7]: Where: is a coefficient which depends on the phase shifter characteristics. Parallel plate varactors have higher tunability with small delta operating voltage hence phase shifter with parallel plate varactors only require small amount of bias voltage. A common type of distributed phase shifter which consists of a high impedance transmission line (>50Ω) capacitively loaded by the periodic placement of discrete varactors [9]. A lumped element transmission line electrical model of a phase shifter looks: 25

39 Figure 8 Lumped element transmission line model Filters The other common varactor based device is a filter. Microwave applications are very symbiotic on frequency agility of filters used. Different types of filters can be designed based on BST materials. Low pass filter, band pass filter and band reject filters are few among many tunable filters used in microwave systems. An example of a reported third order combine filter based on BST thin film varactor fabricated based on sapphire substrate is shown in the figure below. 26

40 Figure 9 Tunable third order combine band pass filter using BST varactor The center frequency for the above filter can be tuned by applying very small biasing voltage on the BST based varactors which are connected to each other in series [7]. The varactor used in this example is an interdigital capacitor (IDC) with finger length of 200 µm, lateral gap between fingers 5 µm and width of the fingers 5 µm. The varactors biased with an external dc voltage source and decoupled from the ground with a 1nf capacitor. The band width of this filter at 1dB was 400MHz without the application of a biasing voltage. When a biasing voltage up to 200V is applied on this device a 16% tuning was attained. The insertion loss varied for 5dB to 3dB for a 0V to 200V biasing voltage respectively and a return loss of greater than 13dB over the band of interest [7]. The reason for this high biasing voltage capability is due to the coplanar structure of the IDC s. When the signal lines are coplanar the electric field due to the microwave 27

41 signal passing through is small to influence the permittivity of the dielectric material used. These devices are used in areas where high power handling capability is required. The third order intercept point of this filter was quite high, at +41dBm [7]. Another example of a band pass filter based on a tri-layer Pt/BST (70/30)/Pt varactor is explained here. This filter exhibited 57% tunability ( MHz) under 6V dc bias voltage (E~20V um-1), with a pass band insertion loss of 3dB [7].The ratio of 30dbB 3dB bandwidth (shape factor) is 2.85 which is in par with the commercial varactor-diode base tunable filters and other similar tunable devices. In a fifth order low-pass filter (LPF), 40% tunability ( MHz) was achieved at 9 V bias (E~30V um-1) with an insertion loss of 2dB [7] Switches As the above varactor based microwave devices, microwave switches use the tunability characteristics of BST materials. Microwave switches are very important components of wireless sensors and reconfigurable circuits. A capacitive shunt switch has been designed and demonstrated, based on a coplanar wave guide transmission line on a multilayer substrate [7]. The following figures show the cross sectional and top view of a capacitive shunt switch. 28

42 Figure 10 Cross-sectional view of different layers of capacitive switch Figure 11 Top view (ground-signal-ground) of a capacitive shunt switch 29

43 For the above configuration switch the insertion loss was high as there was an impedance mismatch during testing and the signal isolation was approximately 20dB at 35GHz [7]. The isolation of the switch was approximately 20dB at 35GHz and insertion loss of the on state was high, due to impedance matching problem. When no external biasing voltage is applied on the low impedance capacitor it will have its highest value so the microwave signal is shunted to the ground hence these switches are called shunt switches. This switch isolates the input from the output when there is no bias voltage. Under bias though, the impedance to the ground is increased as the capacitance of the varactors is reduced. Other microwave devices based on varactors includes tunable electromagnetic band gap (EBG) structures based on coplanar waveguides periodically loaded by high-q factor BST25/75 [7]. An impedance matching device is also another device which makes use of tunable varactors. 30

44 CHAPTER III DESIGN, FABRICATION AND EXPERIMENTAL SET UP 3.1 Design of Series High Voltage Interdigital Capacitor (HV IDC) Introduction A ferroelectric thin film based series interdigital capacitor is used in different RF/ microwave applications as tunable capacitors. The novelty of this device in this research comes from the implementation of the different ends of the IDC at different layers. The implementation of this capacitors is based on the co-planner IDC s but either side of the capacitor is on a different layer. High-K tunable microwave dielectrics such as BaxSr1-xTiO3 (known as BST) are gaining acceptance in microwave integrated circuits due to the large need for tunable/reconfigurable circuits [13]. Semiconductor capacitors are good competitors for ferroelectric based interdigitated capacitors for low frequency applications. The quality factor of semiconductor capacitors drastically decreases at higher frequency but ferroelectric based interdigitated capacitors have near to constant quality factor throughout the microwave frequencies [14]. The 31

45 characteristics of ferroelectric based interdigital capacitor devices are very fast switching, high frequency application, very good tune-ability by applying a very small amount of DC voltage, reasonable quality factor at microwave frequencies and it can be used in very high voltage applications. Recently, our group has been working on a new interdigital capacitor based on the large dielectric tune-ability of BST thin-films. These capacitors were on a single layer and have thin layer BST material on their sides. Without the application of the DC bias voltage the thin-film BST material show very high dielectric constant resulting in the interdigital capacitor shows high capacitance. By applying a DC voltage between the ground and signal conductors of the ports, the dielectric constant of the BST thin-film reduces, as a result the IDC shows low capacitance. In this case the dielectric constant decreases with the application of the DC voltage and the capacitor will have a lower capacitance. This section discusses the details of the series interdigitated capacitor and shunt IDC, design, simulation/theoretical analysis, modeling, fabrication and experimental set up for measurement. The experimental test results, analysis and discussion will be presented in the next section Device Structure Ferroelectric based series IDC is designed based on a multilayer substrate with signal lines on top and below the BST layer. The high resistivity Si (6kΩ-cm) is used as a substrate to reduce the losses at high frequency applications. A thin 32

46 layer of SiO 2 is used as an isolation layer between the substrate and bottom conductor. Figure 2.1 below shows the cross sectional view of the ferroelectric based series IDC. Figure 12 Cross sectional view of a non-coplanar series IDC This IDC consists of two gold/platinum layers. Both layers are used as a signal input and out lines (wave guides) for the series IDC. The second layer which is at the bottom of the BST material will be exposed for probing purpose by etching the BST layer through chemical itching process. 33

47 Figure 13 Non coplanar series IDC EM structure top view Figure 14 Non coplanar series IDC EM structure 3D view 34

48 In the series IDC structures shown above, the two signal layers are separated by the thickness of the BST material. We see that bottom metal layer which consists of two ground lines with exactly the same dimension as the top layer ground planes. The thickness of the BST material used in these structures is one of the critical design parameters and has been varied between nm. An average of 125nm thickness is used during proof of concept testing Design of a Series Interdigital Capacitor (Series IDC) Ferroelectric based series Interdigital capacitors are designed on a multilayer substrate using signal lines and fingers tapered with the signal line for the fringe capacitance. A very high resistivity Si is used as a substrate with a thin SiO 2 as an isolation layer. The thickness of these layers is typically 500nm and 300 nm respectively. The width of the signal line for both the upper and lower layer conductors is typically 0.05 mm wide and the gap between the signal line and the ground plane is 0.05 mm. The width of the ground layer on both of the layers is greater than.25 mm. The geometric ratio (k=w/(w+2s)) of the CPW line is equal to 0.333, where W and S are the width of the center conductor and the spacing between the signal conductor and the ground plane. The capacitance for these kinds of structures is created by the fringe electric fields between the top and bottom layer fingers and the BST material in between. By varying the strength of the signal passing through each fingers (length and width), changing the thickness/nature of the BST material, and spacing between 35

49 fingers and around the edges, we can change the capacitance hence its tuneability and quality factor of these capacitors. There are several design parameters which affects the different characteristics of series interdigital capacitors. The following parameters are the most crucial/ influential parameters are: Relative dielectric constant as well as voltage dependent dielectric tunability Thickness of the BST thin-films The lateral gap between consecutive fingers on the different layers Transmission line parameters such as: width of the conductor, spacing between the signal line and the ground line, length of the signal line Parasitic inductance and resistance of signal line metals used Applied DC biasing voltage The connecting edges of the signal line and the fingers 36

50 3.2 Design of Shunt Interdigital Capacitor (Shunt IDC) Introduction A ferroelectric thin film based shunt interdigital capacitor is used in different RF/ microwave applications as a tunable capacitors and notch filters. The novelty of this device in this research comes from the implementation of the fingers of the signal line on different layers. The source of the capacitance for these devices is based on fringe capacitance on the signal and ground layer fingers and the capacitance between fingers on the top layer. Similar high-q tunable microwave dielectrics such as Ba x Sr (1-x) TiO 3 (known as BST) are used as the dielectric material for these devices. Varactors are good example of very similar devices to shunt IDC s. As varactors are typically parallel plate capacitor type devices, they tend to break down when they are used on very high voltage application areas. The physical structure of shunt IDC s is very small compared to MIMS but the ferroelectric characteristics like tunability, and quality factor throughout microwave frequency applications is far better than their mechanical counter parts like MIMS. Prior to this research, different layer shunt IDC, our research group has conducted a similar research with coplanar shunt IDC s. These capacitors were on a single layer and have thin layer BST material on their finger sides. The result wasn t promising in regard with tunability. With the new shunt IDC designs, the capacitance has increased due to a better utilization of the BST material characteristics used when there is no external DC biasing voltage. By applying a DC voltage between the ground and signal conductors, the dielectric 37

51 constant of the BST thin-film reduces, resulting in low IDC capacitance. In this case the dielectric constant decreases with the application of the DC voltage and the capacitor will have a lower capacitance hence passes through most of the signal from one the signal line to the ground plane. In the proceeding sections the details of shunt interdigital capacitor design, simulation/theoretical analysis, device structure, fabrication process and modeling along with the experimental test set up will be discussed Device Structure These device layer structures are similar with the series interdigitated capacitor structure. These devices are based on a thick Si substrate with high resistivity and thin SiO 2 layer on top of the Si substrate. On top of the SiO 2 layer there is the ground plane and the second plane finger for the fringe capacitance with the top layer. A thin film of BST material is laid on top of the ground plane. And finally there is the transmission line and the branched fingers from the signal line for the fringe capacitance. 38

52 Figure 15 Shunt interdigital capacitor EM structure top view 39

53 Figure 16 Shunt interdigital capacitor EM structure, top layer Figure 17 Shunt interdigital capacitor EM structure bottom layer view 40

54 Figure 18 View of a shunt interdigital capacitor EM structure Figure above shows the different view of a series IDCs. Both signal ports for these structures are on the top layer which makes them easier to fabricate and test Design Ferroelectric, BST, based shunt interdigital capacitors are designed on a multilayer substrate. The top structure contains the signal line across the layer, a spread out fingers attached to the signal line and the ground plane. The bottom layer contains the equivalent fingers for the top layer fingers attached with the 41

55 ground plane. Similar to the series interdigital capacitor, very high resistivity silicon is used with a thin SiO 2 layer as an isolation layer between the signal bottom layer conductor and the Si substrate. The thickness of these the Si and SiO 2 layers is typically 500nm and 300nm respectively. The width of the signal line conductor used on the top layer, the spacing between the signal line and the ground plane dimensions are the same with the series IDC devices. The working principles of these devices are the similar with series IDC devices. The critical design parameter of these devices is the same as the series IDC structure 3.3 Fabrication Different methods can be used to deposit BST thin film on substrates during varactor fabrication. These deposition methods including pulsed laser deposition (PLD), magnetron sputtering, chemical solution deposition (CSD) and metal organic chemical vapor deposition (MOCVD). In a pulsed laser deposition process the BST material will be targeted by a very intense UV laser pulse frequently hence the chemical composition of the BST film will stay same as the target. The microstructure and physical properties of BST films can be tailored by the growth parameters during the PLD process, such as the growth temperature, oxygen ambient pressure, substrate target distance, laser repetition rate and the laser energy [11]. The typical growth 42

56 conditions for BST thin films are a growth temperature of C, laser fluence at the target of 1.5 J cm -2 and oxygen ambient pressure of 0.1 mbar. Given that the laser may be shared between several deposition systems, the PLD method is widely regarded as one of the cheapest deposition methods for research purposes [15]. Compared with PLD, RF magnetron sputtering has the advantage of large-area deposition capability and precise thickness control [12]. Nevertheless, it is worth considering what is exactly meant by a large area. For example, PLD is one process under consideration as a method for producing long lengths of tapes of high-temperature superconductor coated conductors where a large area really refers to long lengths of a narrow substrate which may be spooled through the deposition environment [18]. In the RF magnetron sputtering method, the stoichiometry of BST films sputtered is normally different from that of the target and therefore can be difficult to control precisely [12]. The chemical solution deposition method (CSD) has also been used for the deposition of BST thin films for tunable microwave device applications and dynamic random access memory (DRAM) applications [19-23]. The low cost, effectiveness and large-area deposition capability make it attractive [24]. The stoichiometry of the film can be well controlled and dopants can be introduced into the films easily. In contrast to the methods discussed above, in CSD the film is grown from precursor molecules and is not grown directly from a BST target. Thin films fabricated by the CSD method are susceptible to surface thickness non-uniformity, surface roughness, voids and possibly the existence of cracks as 43

57 these products are often polycrystalline. As voids and cracks on BST thin films will lower both the dielectric constant and tunability, these techniques are rarely used for thin film BST deposition. So far most of the works reported on BST material have used PLD and sputtering technique to fabricate thin film BST base devices. The ferroelectric based series interdigital capacitors require two metal layer processes. The bottom and top metal layers are called gold layer 1 and gold layer2 respectively. These capacitors were fabricated based on a thick (~500 µm) high resistive silicon (Si) chip with a SiO 2 layer of 0.3 µm. A standard fabrication method is used for metal layer1 (Au). After the bottom layer metal the Ba 0.6 Sr 0.4 TiO 3 (BST) thin-film was deposited on the entire surface using pulse-laser deposition (PLD) process. After the BST thin-film deposition, metal layer 2 (Au) is defined. The following figures show the fabrication process at different stages. 44

58 Figure 19 Automated in-situ, real-time, process control pulse laser deposition system. Real -time control based on feedback from emission spectra (ES)[13] 3.4 Theoretical Analysis / Simulation Theoretical analysis of interdigital IDC s haven t been defined with mathematical equations yet though there are methods like conformal mapping that helps approximate the electrical characteristics of interdigital capacitors. Using experimental data characterizing methods like coplanar waveguide (CPW) transmission lines, planar printed circuit resonators and capacitor can also be used to characterize thin film BST based interdigital capacitors. Rigorous analysis of wave guiding properties of CPW lines, impedance, Z 0, effective dielectric constant ε eff, and losses α are possible by using one of the well-known full-wave analysis techniques [25][26]. 45

59 A schematic structure of the interdigital capacitor is shown below. Figure 20 Series interdigital capacitor design dimension The long conductors or fingers provide coupling between the input and output ports across the gaps. In general, the lateral gaps (S) spacing between the fingers and at the end of the fingers (S end ) may also be different but in this current design is assumed to be the same. The length (L) and the width (W) of the fingers are also specified. Also for the analysis purpose, the width (W) of the fingers and the width (W 1 ) of the terminals are assumed to be the same. Since the conductors are deposited on the multilayer substrates, its characteristics will also affect the performance these devices in microwave applications. Two top important the thin BST film used in these calculation are the height of the 46

60 substrates and its dielectric constant. The electrode spacing, width, length, thickness of the electrode (finger) and number of fingers have also different influences on the capacitance. The influence of the film thickness on the IDC capacitance varies as the film property changes [27]. The conformal mapping technique [28] is used to evaluate the closed form expression for capacitance of the IDCs. The derivation is based on the partial capacitance method and takes into account the capacitance between the fingers and the fringing capacitance of the finger ends. The total capacitance of the interdigital capacitor can be considered as the sum of the capacitance between the fingers plus capacitance of the outer edge finger ends [29] and the end part of each finger [27]. The total capacitance, C tot of the interdigital capacitor can be expresses as: C tot = C n +C1+C2 Where C n is the capacitance of the periodical section, C 1 is the capacitance of the outer edge finger ends and C 2 is the capacitance of the end part of each section. C n can be expressed using the following equation, for the finger number n 4: 47

61 C n n 3 0 eff K k K k 0 ' 0 L Where L is the length of the finger and n is the number of fingers and also ε eff is the effective dielectric constant and can be defined is as follows: eff 1 1q q q Where ε 1, ε 2, and ε 3 are the dielectric constant of the Si, SiO 2, and BST thin-films respectively. Also q 1, q 2, and q 3 are the filling factors of the Si, SiO 2, and BST thin-films and can be calculated by the followings: q i K K k k i ' i K K k k ' 0 0 k Where K is the complete elliptic integral of first kind with modulus k, k the complementary modulus, k ' 1 k 2. Here, W 2W k0 and k i can be W 2S 2W S defined as; 48

62 49 i i i i i i i h S W h W h S W h S W h S W h W k 4 sinh 4 cosh 4 sinh 4 cosh 4 sinh 4 sinh Where i=1, 2, 3, and h is the height of the different layers. The capacitance outer edge finger ends, C1 can be defined as follows: f f e k K k K C 0 ' L Where ε e can be defined is as follows: qf qf qf e Here, f f if if i k K k K k K k K qf 0 ' 0 ' and S W W W S W W S W S W W k f and also

63 50 i i i i i i if h S W W h W h S W W h S W h S W h W k sinh 4 sinh sinh 4 2 sinh sinh 4 sinh Where i=1, 2, and 3 The capacitance of the end part of n fingers can be obtained by [12]: eff L ext k K k K n C ) ( ) ( 2 ' Here, ) 2 / ( 10 9 ) 2 / ( A W A A S A S A L ext Where 4 2W S A. The capacitance of the interdigital capacitors has been calculated based on the above expressions. If the substrates layer thickness is very thin, the above expression gives an error to find out the filling factor; in that case an assumption [30] is made to calculate the filling factor.

64 The microwave current and electric and magnetic fields which propagate in a metal are concentrated with in a surface layer, whose thickness is typically in micrometers at the frequency of application. The electric, magnetic field and current density decays exponentially as the signal goes down the thickness of the conductor. This characteristics thickness on which the field and current decays (e -1 ) is called skin depth. Where ζ is the dc conductivity of the metal and f is the frequency of the microwave signal. Phase of the current and fields on this conductor lags their counter parts at the surface by an amount of z/δ radians where z is the distance beneath the surface. The resistance of a conductor at microwave frequency is given by: ( ) And is called sheet resistance or surface resistance and is calculated as ohm /square inch. t in the above equation is the thickness of the metal/conductor. 51

65 The sheet resistance is inversely related with the skin depth of the conductor used and the skin depth is inversely related to frequency of the signal hence the resistance of a conductor used in a microwave application is directly correlated with the frequency of the signal. As the sheet resistance increases with an increase of frequency in microwave applications, the width and length of the conductor used in microwave application are much wider and longer than the thickness of the conductor. And also as conductors in microwave applications should be thicker too as the sheet resistance is inversely correlated to the thickness of the conductor. The minimum sheet resistance can be calculated by assuming the thickness of the conductor is much greater than the skin depth. When t >> skin depth, <<1 hence Loss tangent is one of the most common characterizing parameter for microwave devices. A Loss tangent measures the electromagnetic energy dissipation of a dielectric or conductor material and is given by the tangent of ratio of the resistive (lossy) and reactive (lossless) components of the dielectric material and conductor used. 52

66 Where ζ is the conductivity of the conductor used and is very small compared to other components. is the real component of the relative permittivity constant and is the imaginary component of the relative permittivity. The loss tangent of a microwave device can be divided in to two components, loss due to the dielectric material used and loss due to the conductor used. A coplanar transmission line conductor loss tangent with gap can be estimated by: Whereas the loss tangent for a parallel capacitor is given by: As is shown in the equation the loss tangent is inversely proportional to the frequency of the signal in a coplanar transmission line while loss tangent is directly proportional to the frequency of the signal used in a parallel capacitor. 53

67 The loss tangent for the dielectric component of the microwave device is given by: Where the real part of the relative permittivity of the dielectric material and is the imaginary component of the relative permittivity of the dielectric material. The tangent loss of a dielectric material is inversely proportional to the quality factor of the material. Hence 3.5 Electrical Equivalent Circuit Model The theoretical analysis to characterize the properties of BST thin film based interdigital capacitors doesn t usually help calculate the exact values of the properties of the devices rather give empirical results. Electrical modeling of series and shunt interdigitated capacitors is the basic and most important tool used to characterize the electrical characteristics of BST thin base devices. To model the capacitance, resistance and inductance of these devices we use first use a distributed equivalent circuit design for each small 54

68 section (cell). Each cell contains series resistance, shunt capacitance, shunt resistance and series inductance. These parameters will then be studied and make up the equivalent electrical model of these devices. Fig. 3.9 below shows the electrical modeling of a series interdigitated capacitor. So far we don t have a definite way of calculating the different parameters of these devices mathematically based on the physical structure of these devices. The use of electrical model is inevitable to analyze the nature of these devices and gives a good insight how these devices can be modified. Port one (P 1 ) and port two (P 2 ) are the probing ends for the microwave frequency analyzer device probes. Coplanar lines on plane 1 and 2 are the signal lines for the distribution of the signal from the ports. Those parameters have exact measured values of the actual EM structure dimensions. Resistance R 1, R 3 and inductance L 1 and L 2 are the parasitic resistance and inductance of the finger conductors for the top and bottom layers respectively. Capacitance C 1 and C 3 in parallel with resistance R 4 and R 5 are the resistances inherited from the material and physical characteristics of the BST material between the edge side fingers and the ground plane. The parallel capacitance and resistance structure, C 2 and R 2, are the fringe capacitance created between top and bottom layer fingers and the resistance due to the BST material used between the two layers of the structure. 55

69 The coplanar wave substrate characteristics is the characteristics of the different layers used in the series Interdigitated capacitor, usually thickness, dielectric constant and loss tangent of those materials used ( SiO 2, BST and Air). Figure 21 Series interdigital capacitor electrical model 56

70 An equivalent circuit model for a shunt IDC is also be developed in a similar fashion as series IDC s. Figure 22 Shunt interdigital capacitor equivalent electrical circuit model 57

71 3.6 Simulation Applied Wave Research (AWR) software tool is used to design the different possible electromagnetic structure of series and shunt IDC devices and obtain electromagnetic simulation of the devices. Once the thought structure is designed on AWR, optimized and simulated using AWR, the devices will be fabricated on a two layer photolithography mask set for experimental verification of the devices. The fabricated devices with the BST thin film deposited by using the PLD technique discussed above will be tested and modification will be done through AWR software from lessons learned. During simulating designs for different dc biasing voltage which has an effect on the relative dielectric constant of dielectric material during practical application, dielectric constant of 250, 500, 750 and 1000 is used to simulate the bias created on the dielectric materials dielectric constant. An equivalent circuit is used to characterize the nature of the new device by tuning the different parameters. A substrate parameter of pure SiO 2 and loss less conductor are used. Using a Pentium IV 3.06 GHz processor and 4GB of RAM computer, designing and simulating an IDC EM structure takes up to 3hrs. The simulation time is very dependent on the grid size of the structure also. 58

72 3.7 Experimental Setup A two port measurement technique is used to measure the scattering parameters of the devices fabricated. HP 8720 Network analyzer (50MHz 20 GHz) is used to generate high frequency signal and record the scattering parameters of microwave thin BST film based devices. A microscope probe station is attached to the network analyzer to probe the devices as these devices are too small to connect with naked eye. For low voltage DC source, Agilent, is used and connected to the network analyzer source with a bias T-connector at port #1. Figure 23 Complete experimental test setup (HP8720 network analyzer (left), microscope probe station (middle), cooling source to the probe station (right) and a DC biasing voltage source (top left)) 59

73 Figure 24 Probe station Probes Figure 25 Two port probes 60

74 Low DC voltage source High DC voltage source Figure 26 External low and high DC voltage source Figure 27 HP8720 Network analyzer 61

75 When the network analyzer is booted for testing, calibration is done using devices made for calibrating high frequency network analyzers. During all the tests on thin BST film based microwave devices a room temperature, ~ 75 o F, is assumed. 62

76 CHAPTER IV RESULTS AND DISCUSSION 4.1 Experimental test results Fabricated IDC devices are experimentally tested using the HP8720 network analyzer and swept frequency scattering parameters (S-parameters). These experimental test data are collected using a computer connected to the HP8720 network analyzer. The result from the network analyzer is the S (S11 S12 S21 S22) parameter reading at each frequency point. Using AWR software the file collected from the network analyzer is converted from excel to AWR compatible.s2p format. Experimental results are checked against simulation results on the network analyzer screen before saving and will undergo repeated taking the reading. Scales used for these plots is decibel (db) for the magnitude of the through signal and GHz in log scale for the X axis. The following two figures show a sample experimental result for series and shunt IDC with 0 μm lateral gap and 3 μm lateral gap between fingers respectively. 63

77 Figure 28 Series IDC experimental result S21 (db) vs. Frequency (GHZ) plot S21 (db) versus frequency (GHz) plot shows the tuning in gain for an external dc biasing field of 0 40 V. The above result depicts a sample result from ~ 74 designs designed, fabricated and tested. 64

78 Figure 29 Shunt IDC experimental test result plot After designing and simulating different IDC structures, the following designs have been selected for fabrication and testing. Table 2 Series IDC design matrix G=4um G=2um N= 10 N = 12 N=20 N=12 N = 16 N = 18 N=16 L=250,W=10 N=14 L=250,W=6 N=20 L=200,W=10 N=24 L=200,W=6 N=24 N=16 N=24 N=16 N=20,18,24 N=28 N=20 N=12 N=12 N=12 N=12 N=12 L=250,W=10 N=16 L=250,W=6 N=16 L=200,W=10 N=16 L=200,W=6 N=16 N=20,24 N=20,24,26,28 N=20,24 N=20 65

79 Simulation results Figure 30 Series IDC AWR simulation result S-parameter plot The above plot shows the scattering parameter simulation results for length 200μm, finger width 6μm, lateral gap between fingers 2μm and 250 relative dielectric constant. The above structure has 8 fingers each layer. 66

80 Figure 31 Series IDC AWR simulation result plot Figure above depicts a series IDC AWR simulation result S parameter plot for finger length 800 μm, finger width 10 μm, lateral gap between fingers of 2 μm and relative dielectric constant of 250 with 4 fingers on each layer. 67

81 Figure 32 Tuning of a shunt IDC simulation (biased by changing the dielectric constant of a thin BST film) plot 68

82 Figure 33 Tuning of a series IDC simulation over plot 4.2 Explanation From chapter two discussions regarding how ferroelectric materials dielectric constant behaves with an application of an external electrical signal, the experimental results for the thin film BST based devices shown above are due to the electric field dependent dielectric constant of the BST layer. External dc bias voltage is applied through the bias-t and combined with the RF signal applied through the network analyzer. The signal conductor of the devices and the CPW probe carry the combined dc and RF signal. 69

83 As shown on the plot above, shunt IDC tuning dc voltage required is higher than the series IDC shown above it. In the series IDC structure the second signal port is at the bottom layer of the structure while the shunt IDC has both ports at the same layer. 4.3 Discussion and Analysis of Test Results One of the most important methods used to characterize the electrical characteristics of microwave devices is called tuning. Tuning is adjusting the different electrical components of an electrical equivalent circuit of a device to match the scattering parameters of the simulation/test data. Tuning procedure is same for both shunt IDC and series IDC except the knobs are different as they have different electrical model hence parameters. 70

84 Figure 34 Data matching plot of a shunt IDC experimental data with equivalent electrical model 71

85 Figure 35 Tuning of an electrical model with experimental test result of a series IDC The experimental results for the different lateral gaps of shunt IDC s is shown on the table below. 72

86 Table 3 Experimental test results for series IDC devices (L=400, N=8, W=20μm) Shunt IDC voltage(v) Gap 1μm Capacitance (PF) Gap 3μm Capacitance (PF) voltage(v) Gap 5μm Capacitance (PF) Gap 7μm Capacitance (PF) Table 4 Percent tuning of the tested series IDC's Gap Tuning (%) = (C2-C1)*100/C2 1μm μm μm μm

87 C (PF) C (PF) Capacitance vs Voltage plot Voltage (V) Gap (1μm) Gap (3μm) Figure 36 Capacitance vs. Voltage plot for shunt IDC 1 μm lateral gap Capacitance vs Voltage plot Gap (5μm) Gap (7μm) Voltage (V) Figure 37 Capacitance vs. Voltage plot for 5μm lateral gap shunt IDC 74

88 Table 5 Series IDC experimental test data values Voltage (V) Capacitance (pf) Gap (1μm) Gap (2μm) Gap (3μm) Gap (4μm) Gap (5μm) Table 6 Percent tuning for the array of series IDC s fabricated Gap Tuning (%) 0μm μm μm μm μm

89 C (pf) C (pf) Capacitance vs Voltage plot Voltage (V) Gap (1μm) Gap (2μm) Figure 38 Series IDC experimental data CV plot Capacitor vs Voltage plot Gap (4μm) Gap (3μm) Voltage (V) Figure 39 Series IDC experimental data CV plot 76

90 The capacitance of series and shunt IDC follows different trend with an increase in space between the fingers and other structural dimensions. With an increase of the lateral gap between the fingers of these structures the capacitance seems to decrease. In each respective lateral gap and same dimensions the capacitances of the shunt IDC decreases with the application of an external DC biasing voltage. For series IDC structure the capacitance of the devices decrease with an application of DC bias. 77

91 CHAPTER V SUMMARY AND RECOMMENDATION A new 2.5 D approach of designing an IDC device has given promising results in terms of operating voltage ( device which can operate up to 450V for the series IDC), tunability (up to 63% on shunt IDC) and better quality factor. This study extensively covers the geometrical variances on the EM structure (Length, Spacing, Width, Number of fingers) and the thickness of the thin BST film used and their effects on the characteristics IDC devices. The maximum tunability obtained from the series IDC structure is 43 % with 0 μm lateral gap 400 μm length, 10 number of fingers and 20 μm width. While 63% tunability is attained with a shunt IDC structure of lateral gap 3 μm length 400 μm 8 number of fingers and 20 μm of fingers width. These devices have very small form factor and cheap to manufacture. A more in depth research can be conducted using a different ferroelectric dielectric material or different composition BST material as a dielectric material. 78

92 At the later time of this research some shunt IDC has been studied as a notch filter and has shown very promising results in the preliminary work. Further research can be conducted to exploit this characteristics of series IDC s. Cascading this devices in parallel or series might give a better tunability and quality factor and further investigation can be done on those aspects. 79

93 REFERENCES *1+ C.B. Sawyer, C.H. Tower, Rochelle Salt as a dielectric, Physical Review Vol.35, 1930, pp [2] Rebiz, G.M., RF MEMS Theory, Design, and Technology, A John Wiley and Sons Publication, 2003 *3+ P. S. Neelakanta, Handbook of electromagnetic material: Monolithic and composite versions and their applications, CRC press, 1995 pp *4+ J. Wang, Characterization of ferroelectric material for advanced RF circuit design M.S. thesis, 2008 *5+ R. R. Romanofsky, Frequency/Phase agile microwave circuits on ferroelectric films PhD Discertation, Dec 1999 [6] c.pdf *7+ P. Bao, T. J. Jackson, X. Wang and M. J. Lancaster, Barium strontium titanate thin film varactors for room-temperature microwave devices applications published Feb

94 [8] C M Carlson, T. V. Rivkin, P. A. Parilla, J. D. Perkins, J. D. Perkins, D. S. Ginley, V N Oshadchy, and A.S. Pavlov 2000 appl. Phys.Lett *9+ U. Nath Design and development of ferroelectric thin-film based RF MEMS switches for microwave applications May 2004 [10] S. Gevorgian Ferroelectrics in microwave devices, circuits and systems *11+ P.Bao, T J Jackson, S. Wang and M J Lancaster, Barium strontium titanate thin film varactors for room-temperature microwave device applications Feb 2008 [12] Liu, Y., MEMS and BST Technologies for Microwave Applications, Ph.D. Thesis [13] R. York, A. Nagra, E. Erker, T. Taylor, P. Periaswamy, J. Speck, S. Streiffer, D. Kaufmann, and O. Auciello, Microwave Integrated Circuits using Thin-Film BST, Proceedings of 12 th IEEE International symposium of applications of Ferroelectrics, 2000, vol.1, pp , 2001 [14] A. Vorobiev, P. Rundqvist, K. Khamchane, and S. Gevorgian, et al., Silicon substrate interdigitated high Q factor parallel plate ferroelectric varactors for microwave/millimeter wave applications, Applied Physics Letters, vol. 83, no. 15, pp , *15+ Jeremy B. Muldavin and Gabriel M. Rebeiz, High Isolation CPW MEMS Shunt Switches Part 1: Modeling IEEE Transactions on Microwave theory and techniques, December

95 *16+ Jae Y. Park, Guen H. Kim, Ki W. Chung, Jong U. Bu, Monolithically integrated micro machined RF MEMS capacitive switches Sensors and Actuators A 89 (2001) [17] Guru Subramanyam, F. Ahamed and, R. Biggers, A Si MMIC compatible ferroelectric varactor shunt switch for microwave applications, IEEE Microwave and Wireless Component letters, Vol. 15, No. 11, pp , November 2005 *18+ Gabriel M. Rebeiz, Jeremy B. Muldavin, RF MEMS Switches and Switch Circuits IEEE microwave magazine, pp.59-71, December 2001 [19] Chienliu Chang, Peizen Chang, Innovative micro machined microwave switch with very low insertion loss Sensors and Actuators 79 (2000) *20+ D. Hah, E. Yoon, S. Hong, A low-voltage actuated micro machined microwave switch using torsion spring and leverage, IEEE Trans. on Microwave Theory and Techniques. 48 (12) (2000) *21+ J. Y. Park, G.H. Kim, K.W. Chung, J.U. Bu, Monolithically integrated micro machined RF MEMS capacitive switches, Sens. Actuators A 89 (2001) *22+ F. Plotz, S. Michaelis, G. Fattinger, R. Aigner, R. Noe, Performance and dynamics of a RF MEMS switch, Proceedings of the Transducers 01, Munich, Germany, 2001, pp [23] R.E. Mihailovich, M. Kim, J.B. Hacker, E.A. Sovero, J. Studer, J.A. Higgins, J.F. DeNatale, MEM relay for reconfigurable RF circuits, IEEE Microw. Wireless Compon. Lett. 11 (2) (2001) [24] Yu Liu, troy R. Taylor, James S. Speck and Robert A. York, High-Isolation BST-MEMS Switches, IEEE MTT-S Digest,

96 *25+ S. Das, High power tunable filters use HTS ferroelectric Microwave RF, pp , Sept *26+ Spartak S. Gevorgian and Erik Ludvig Kollberg, Do we really need ferroelectrics in paraelectric phase only in electrically controlled microwave devices, IEEE Transaction on Microwave Theory and Techniques, Vol. 49, No. 11, November *27+ Y. Wang, N. Chong, Y. L. Cheng, H. L. W. Chan and C. L. Choy, Dependence of capacitance on electrode configuration for ferroelectric films with interdigital electrodes, Microelectronic Engineering 66 (2003) [28] Spartak S. Gevorgian, Torsten Martinsson, Peter L. J. Linner and Erik Ludvig Kollberg, CAD Models for Multilayered Substrate Interdigital Capacitors, IEEE Transactions on Microwave Theory and Techniques, Vol. 44, No. 6, June [29] Hargsoon Yoon, Jose K. Abraham, and Vijay K. Varadan, Design and experimental results of Bilateral interdigital coplanar delay line for MMICs, Microwave and Optical Technology Letters, Vol. 40, No. 2, January 20, [30] S. S. Gevorgian, P. Linnér, and E. Kollberg, CAD models for shielded multilayered CPW, IEEE Microwave Theory and Techniques, Vol. 43, pp ,

97 APPENDIX Thin BST Film Based Notch Filter Design Figure 40 Notch filter S21(dB) plot Figure 41 Equivalent circuit model 84

98 Figure 42 Notch filter EM structure design 85