RELIABILITY REPORT WAU88XX/ NAU8401XX/ NAU8501XX/ NAU8820XX SERIES. FUNCTION : Stereo Audio CODEC. PROCESS : TSMC 0.18um

Transcription

1 NO.: I6051-FA5A99 VERSION: D PAGE: 1 RELIABILITY REPORT WAU88XX/ NAU8401XX/ NAU8501XX/ NAU8820XX SERIES FUNCTION : Stereo Audio CODEC PROCESS : TSMC 0.18um ENGINEER : HYLi MANAGER : Cwang Publication Release Date: Jun, 2011 Reliability Engineering Department

2 NO.: I6051-FA5A99 VERSION: D PAGE: 2 ~SUMMARY~ WAU8822YG with QFN32 passed the qualification tests according to Automotive Electronics Council (AEC Q100) qualification requirement. A summary of the test result is as follows:. Early Life Failure Rate. High Temp. Operating Life test. Pre-Condition Test. Temp-Humidity-Bias Life Test. High Temp Storage Life Test. Pressure Cooker Test. Temperature Cycle Test. Thermal Shock Test : 0/2400 pcs : 0/231 pcs : 0/1245 pcs : 0/231 pcs : 0/231 pcs : 0/231 pcs : 0/231 pcs : 0/231 pcs. ESD-HBM : 0/54 pcs. ESD-MM : 0/54 pcs. ESD-RCDM : 0/9 pcs. Latch -Up Test : 0/36 pcs

3 NO.: I6051-FA5A99 VERSION: D PAGE: 3 Ⅰ. PRODUCT DESCRIPTION Description Key Features ---CONTENTS--- Ⅱ. LIFE TEST A. Introduction 1. Early Life Failure Rate (ELFR) 2. High Temp. Operating Life Test (HTOL) B. Test Results 1. Early Life Failure Rate (ELFR) 2. High Temp. Operating Life Test (HTOL) Ⅲ. ENVIRONMENTAL TEST A. Introduction 1. Pre-Condition Test 2. Temperature-Humidity-Bias Life Test (THB) 3. High Temp Storage Life Test (HTSL) 4. Pressure Cooker Test (PCT) 5. Temperature Cycle Test (TCT) 6. Thermal Shock Test (TST)

4 NO.: I6051-FA5A99 VERSION: D PAGE: 4 B. Test Results 1. Pre-Condition Test 2. Temperature-Humidity-Bias Life Test (THB) 3. High Temp Storage Life Test (HTSL) 4. Pressure Cooker Test (PCT) 5. Temperature Cycle Test (TCT) 6. Thermal Shock Test (TST) Ⅳ. ESD & LATCH-UP A. Introduction 1. ESD 2. LATCH-UP B. Test Results 1. ESD 2. LATCH-UP

5 NO.: I6051-FA5A99 VERSION: D PAGE: 5 I. PRODUCT DESCRIPTION

6 NO.: I6051-FA5A99 VERSION: D PAGE: 6 II. LIFE TEST A. Introduction 1. Early Life Failure Rate (ELFR) 1.1 SCOPE The objective of ELFR is to measure the failure rate in the first several months or year of operation. 1.2 TEST CONDITION The parts shall be tested per the High-Temperature Operating Life (HTOL) requirements. Temp ambient= 125 C, Vdd= 5.5V, dynamic stressing, Td= 24 hrs. (Reference: AEC Q100, MIL-STD-883E- Method 1005 and JESD22-A108) 2. High-Temperature Operating Life Test (HTOL) 2.1 SCOPE HTOL test is performed to accelerate failure mechanisms which are thermally activated. This can be achieved by stressing the devices with bias at high temperature. 2.2 TEST CONDITION Temp ambient= 125 C, Vdd= 5.5V, dynamic stressing, Td= 1000 hrs. (Reference: AEC Q100, MIL-STD-883E- Method 1005 and JESD22-A108)

7 NO.: I6051-FA5A99 VERSION: D PAGE: 7 B. Test Results 1. Early Life Failure Rate (ELFR) SUMMARY TABLE RUN Lot No. 24 Hrs Remark #1 E819B004 0/800 #2 E830B004 0/800 #3 E846B0032 0/800 *Criteria: Acc/Rej = 0/1 2. High-Temperature Operating Life Test (HTOL) 2.1 SUMMARY TABLE RUN Lot No. 168 Hrs 500 Hrs 1000 Hrs Remark #1 E819B004 0/77 0/77 0/77 #2 E830B004 0/77 0/77 0/77 plus cold temp. FT #3 E846B0032 0/77 0/77 0/77 *Criteria: Acc/Rej = 0/1

8 NO.: I6051-FA5A99 VERSION: D PAGE: FAILURE RATE CALCULATION FR..( T) = WHERE X 2 ( 1 CL, 2N + 2) 2EDH 2 X : CHI-SQUARE Function CL: Confidence Level N: No of Failures EDH: Equivalent Device Hour Dev. Hours at Tj=127.7 C Equiv. Dev. Hours at Tj=55 C No. of Failure Confidence Level Failure Rate at 55 C Mean Time Between Failure % FIT 2574 yrs. 90% FIT 1024 yrs. Based on Activation Energy = 0.7 ev Tj = Ta + Pd θ ja where: Tj= junction temp,ta=125 (ambient temp) Pd= 69.5 mw (power dissipated on the device) Θja= 39.3 /W (thermal resistance from junction to ambient)

9 NO.: I6051-FA5A99 VERSION: D PAGE: 9 III. ENVIRONMENTAL TESTS A. Introduction 1. Pre-condition Test 1.1 SCOPE Pre-condition Test is to measure the resistance of SMD (Surface Mount Devices) to the storage environment at the customer site and to thermal stress created by IR reflow or Vapor Phase Reflow. 1.2 TEST CONDITION Step 1: TCT (-65 C/150 C, 5 cycles) Step 2: Bake (125 C, 24 hours) Step 3: Soak (30 C/60%RH, 192 hours) Step 4: IR 260 C, 3 passes (Reference: AEC Q100 and JEDEC STD-020D). 2. Temperature-Humidity-Bias Test (THB) 2.1 SCOPE THB test is to measure the moisture resistance of plastic encapsulated circuit. 2.2 TEST CONDITION Temp = 85 C, Humidity = 85%RH, Alternating Pin Bias Voltage = 5.5 V, Td= 1000 hrs. (Reference: AEC Q100 and JESD22-A101). 3. High Temperature Storage Life Test (HTSL) 3.1 SCOPE HTSL test is to determine the stability and data retention of the device in high temperature environment. 3.2 TEST CONDITION Temp=150 C, Td=1000 hrs. (Reference: AEC Q100, MIL-STD-883E-method condition C and JESD22-A103)

10 NO.: I6051-FA5A99 VERSION: D PAGE: Pressure Cooker Test (PCT) 4.1 SCOPE PCT is to evaluate the device resistance to moisture penetration. 4.2 TEST CONDITION Ta = 121 C, RH = 100%, P = 2 atm, Td = 168 Hrs. (Reference: AEC Q100 and JESD22-A102) 5. Temperature Cycle Test (TCT) 5.1 SCOPE TCT is to evaluate the resistance of device to environmental temperature change. 5.2 TEST CONDITION -65 C / 15min, transfer time 1min, +150 C/15min, 200 cycles. (Reference: AEC Q100, MIL-STD-883E-Method 1010-Condition C and JESD22-A104) 6. Thermal Shock Test (TST) 6.1 SCOPE TST test is also to evaluate the resistance of device to the extremely environmental change. 6.2 TEST CONDITION -65 C / 5min, transfer time <10sec, +150 C / 5min, 100 cycles. (Reference: MIL-STD-883E-Method 1011-Condition C and JESD22-A106)

11 NO.: I6051-FA5A99 VERSION: D PAGE: 11 B. Test Result 1. Pre-condition Test Run Lot No. Result Remark #1 E819B004 0/415 #2 E830B004 0/415 #3 E846B0032 0/ Temperature-Humidity-Bias Life Test (THB) RUN Lot No. 168 Hrs 500 Hrs 1000 Hrs Remark #1 E819B004 0/77 0/77 0/77 #2 E830B004 0/77 0/77 0/77 #3 E846B0032 0/77 0/77 0/77 3. High Temperature Storage Life Test (HTSL) Run Lot No. 168 Hrs 500 Hrs 1000 Hrs Remark #1 E819B004 0/77 0/77 0/77 #2 E830B004 0/77 0/77 0/77 #3 E846B0032 0/77 0/77 0/77

12 NO.: I6051-FA5A99 VERSION: D PAGE: Pressure Cooker Test (PCT) Run Lot No. 168 Hrs Remark #1 E819B004 0/77 #2 E830B004 0/77 #3 E846B0032 0/77 5. Temperature Cycle Test (TCT) Run Lot No. 200 Cycles Remark #1 E819B004 0/77 #2 E830B004 0/77 #3 E846B0032 0/77 6. Thermal Shock Test (TST) Run Lot No. 100 Cycles Remark #1 E819B004 0/77 #2 E830B004 0/77 #3 E846B0032 0/77

13 NO.: I6051-FA5A99 VERSION: D PAGE: 13 IV. ESD AND LATCH-UP A. Introduction 1. ESD 1.1 SCOPE ESD test is to evaluate the immunity of device to electrostatic discharge. 1.2 TEST CONDITION Human Body Model (HBM): AEC Q100/ JESD22-A114 Machine Model (MM): AEC Q100/ JESD22-A115/ EIAJ-IC-121 Charged Device Model (CDM): AEC Q100/ JESD22-C Latch-Up 2.1 SCOPE Latch-Up test is to evaluate the immunity of the devices to latch-up. 2.2 TEST CONDITION Temp = 25 C & 85 C, VDD = Max. Operating Voltage, Trigger Current = 100 ma. (Reference: JESD78)

14 NO.: I6051-FA5A99 VERSION: D PAGE: 14 B. Test Results 1. ESD 1.1 Human Body Model Run Lot No. POSITIVE NEGATIVE Remark #1 E819B004 0/18 0/18 +/- stress on the same unit #2 E830B004 0/18 0/18 +/- stress on the same unit #3 E846B0032 0/18 0/18 +/- stress on the same unit * SPEC = 2KV 1.2 Machine Model Run Lot No. POSITIVE NEGATIVE Remark #1 E819B004 0/18 0/18 +/- stress on the same unit #2 E830B004 0/18 0/18 +/- stress on the same unit #3 E846B0032 0/18 0/18 +/- stress on the same unit * SPEC = 200V 1.3 Charge Device Model Run Lot No. POSITIVE NEGATIVE Remark #1 E819B004 0/3 0/3 +/- stress on the same unit #2 E830B004 0/3 0/3 +/- stress on the same unit #3 E846B0032 0/3 0/3 +/- stress on the same unit * SPEC = 750V

15 NO.: I6051-FA5A99 VERSION: D PAGE: Latch-Up Run Lot No. POSITIVE NEGATIVE Remark #1 E819B004 0/6 0/6 #2 E830B004 0/6 0/6 #3 E846B0032 0/6 0/6 * SPEC = 100mA