Electrostatic Discharge Analysis of Multi Layer Ceramic Capacitors. Cyrous Rostamzadeh, Robert Bosch LLC USA February 17, 2011

Transcription

1 Electrostatic Discharge Analysis of Multi Layer Ceramic Capacitors Cyrous Rostamzadeh, Robert Bosch LLC USA February 17, 2011

2 Mr. Kimball Williams Thank you for your Colossal Contributions and Dedication to IEEE EMC Society. You have educated, trained, inspired, managed and encouraged many of the EMC Engineers and Technicians in the SE Michigan area. You are well respected by everyone throughout the EMC Society and Automotive Community. I had the privilege to prepare this presentation, per your invitation, and I hope you will continue to guide the EMC Society long after your retirement from the Professional Responsibilities as of February 2012, thank you.

3 Mr. Kimball Williams

4 A privilege for me to be educated, mentored, collaborated with some of the finest minds of EMC

5 Dr. Al Reuhli (IBM) Dr.Clayton Paul

6 Dr. Howard Johnson Signal Integrity

7 Professor Flavio Canavero Politecnico di Torino Professor Christos Christopouplos University of Nottingham

8 Professor Sergio Pignari Politecnico di Milano Professor Farhad Rachidi Swiss Federal Institute of Technology (EPFL)

9 Professor James Drewniak Missouri ST University Dr. Bruce Archambeault IBM, RTP Henry Ott Professor David Pommerenke Missouri ST University

10 Gordon Mapes, Phil Bator, Andy Macko, Mike Bosley,Arnie Nielsen, Terry North, Victor Lau, Mark Steffka, Kimball Williams, Howard Kendall, Don Seyerle, Rick Grunow, Jim Muccioli, Thorsten Schneider, Tom Livernois, Rick Lombardi, Richard Wiese, Bill Sperber, Scott Lytle, Keith Frazier, Lloyd Elsworth, Laura Ball, Larry Banasky, Larry J. Boguslawski, Chingchi Chen, Samuel R. Connor, Prof. Marcello D'Amore, Dr. Phil Fanson, Bill Gilmore, Poul Anderson, Dr. Flavia Grassi, Dr. Todd Hubing, Dr. Chris Holloway, Professor Michel Ianoz, Dr. Thomas A. Jerse, Rob Kado, Richard Kautz, Jarek Tracz, Jack King, Joe Kramer, Roy Leventhal, Filippo Marliani, Scott Mee, Prof. Antonio Orlandi, Vipul Patel, Sreeniwas Ranganathan, Andrew J. Shune, James P. Spivey, John P. Sundeen, Daniel M Traynor, Dr. Al Wexler, Dr. David Hill, Dr. Perry Wilson, Doug Smith, Dr. Erping Li, Dustin Willim,, Mark Wisnewski, Matthew Yager, Paul Sarna, Jack Meyer, Mark Miles

11 Back to basics Electric Currents

12 Electric Currents

13 Conduction Current & Displacement Current Conduction Current Displacement Current

14 Conduction Current & Displacement Current

15 Conduction Current & Displacement Current

16 Conduction Current & Displacement Current Conduction Current >> Magnetic Field Displacement Current >> Electric Field

17 Motivation and Objectives Multi layer Ceramic Capacitors are utilized for ESD Protection of Connector I/O Pins Low Cost, Small Footprint (i.e., X7R Class II) ideal for High Density Electronic Control Modules. But Need to determine ESD Robustness or any Degradation due to ESD: Pre_ESD and Post_ESD Impedance vs. Frequency Characterization. Optical Examination of Dielectric Structure after ESD Exposure.

18 Motivation and Objectives In this Work Electrostatic Discharge according to IEC Human Body Model up to 25 kv (100 pf, 2 kω Discharge Network) MLCC (0603 package 1.6 mm X 0.5 mm) 680 pf and 10 nf (100 Volts), X7R Type II (-55 o C -> +125 o C) In addition, MLCC (0805 package) Discharge to PCB Mounted MLCC Discharge to Non-PCB Mounted MLCC

19 MLCC Process

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22 C r na ε 0 ε = t

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25 Ceramic MLCC Types C0G, X7R, X5R, X8R, X8L Class I Most stable over Temperature and Voltage, & Frequency but Lowest Volumetric Efficiency (C0G or NPO) Class II Lower Accuracy and Stability (+/- 15%, C > C) X7R Class III Highest Volumetric Efficiency, but Poor Accuracy & Stability

26 MLCC Characteristics An Electrical Model

27 1 1nF X C = j2πfc 10nF Linear Scale

28 1nF X C = 1 j2πfc 10nF Logarithmic Scale

29 What is in a Model What is in a Model C X C = 1 j2πfc

30 Building a Model Z 1 = j2πfc + R Heat

31 Building a Model Heat 1 Z = + R + j2 π fl j2 π fc

32 10nF, Z 1 j2πfc 10nF, ESR j2πfl Describing MLCC with Matlab

33 0603 (100 V) MLCC Characteristics 1 nf Superior for freq. > 50 MHz 10 mω 100 mω

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35 Dissipation Factor Impedance Plane jx C δ ESR Loss DF ESR = tan( δ ) = = X C 1 Q DF = Resistive power Loss in ESR / Reactive Power oscillating in Capacitor

36 ESR is a function of Frequency

37 Temperature Factor

38 an ESD Event

39

40 ESD voltages as high as 30 kv has been observed in automotive environment. ESD is rich in high-frequency (> 3 GHz)! ESD event can create currents in excess of 30 Amps! ESD currents can destroy IC s, PCB traces and other components. ESD can create time-varying Magnetic Field: 25 A/m. ESD can create time-varying Electric Field as high as: 10 kv/m. ESD can create Susceptibility Problems.

41 ESD phenomena involves Electrical & Thermal Transports on the Scale of nanometers (nm), Circuits and Electronics on the Scale of micrometers (µm), Semiconductor Chip designs range from picoseconds (ps) to microseconds (µs), Electrical Currents of interest range from ma to 10 s of Amperes. Voltages range from Volts to kilovolts (kv). Temperatures vary from room temperature to melting temperatures of 1000 s 0 K

42 Must Quantify the Scale in Space & Time ESD phenomena involves: Microscopic to Macroscopic Scales. ESD is a Thermo-Electric Transport of Material Physics

43 Capacitance ESD Charge Storage Element

44 Charge Storage Capacitance C = 1 r 1 4 πε 1 r 2 r 1 r 2 if r 2 C =, ( 111 r) diameter sphere, and for free space, ε = pf, a human has a surface area to1 meter C Human Body pf 12 F / m

45 Free-Space Capacitance Human Body Capacitance Earth s Capacitance An object a size of marble 50 pf 700 µf 1 pf In addition, we must consider Parallel Plate Capacitance due to the proximity of an object to the surrounding

46 Human Body Model (HBM) Self-Capacitance pf 100 pf 50 pf to infinity 500 Ω to 10 kω

47 Human Body Model (HBM) Therefore, the Capacitance of a Human Body is the Combination of Free-Space Capacitance + Parallel-Plate Plate Capacitance and can vary from 50 pf to 250 pf

48 Human Body Model (HBM) V HB C R V HB HB HB = 50 = 500 = 0 to 250 pf Ω kv kω

49 Human Body Model (HBM) For a Human Body of 100 pf Capacitance, Charged Up to 25 kvolt, Energy Released Per Discharge. Energy = CV 2 Energy 30 mj = (25,000)

50 Human Body Model (HBM) The Discharge of a Human (via a small, hand-held metal piece) is basis for the current waveform most often used IEC standard.

51 OEM ESD Test Specifications GM3097 (July 2006) Ford EMC_CS_2009 Chrysler CS ISO (2001) & IEC Standards with some Modifications. Ambient Temperature: 23 +/- 3 o C Relative Humidity 20 to 40% Prefer 20 o C and 30% RH. Contact Rise Time: t r < 1 ns Air Discharge Rise Time: t r < 20 ns. Discharge Networks: 150 pf/2 kω and 330 pf/2 kω

52 ESD Impact

53 IC s fail due to Excessive Voltage or Energy Excessive Voltage can cause Dielectric Breakdown in IC s such as Oxide Barriers.

54 Excessive Energy can cause Thermal Failure by Melting Silicon or Metallization of IC. Melting Temperature of Silicon ~ 1,420 0 C Melting Temperature of Metallization ~ C

55 ESD Mathematical Analysis

56 + + + = exp 1 exp 1 ) ( τ τ τ τ τ τ t t t k i t t t k i t i n n n n, exp 1/ = n n k τ τ τ τ = n n k 1/ exp τ τ τ τ τ 4 = 58 ns τ 2 = 1.7 ns I 2 = 10.1 Amp n = 3 τ 3 = 6 ns τ 1 = 1.3 ns I 1 = 21.9 Amp

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59 HBM ESD Time Constant τ τ HB HB = = R HB C HB 1500 Ω 100 pf = 150 ns Similar to Thermal Diffusion Time of many materials used in semiconductor industry

60 ESD is a Non-Linear Electro-Thermal Physical Event. Very Difficult to Model Accurately. Simple Linear Model is insightful.

61 ESD Modeling

62 ESD Generator Model

63 ESD Generator Model V Gen = 8 kv

64 ESD HBM Model V HBM = 25 kv

65 ESD HBM Model V HBM = 25 kv

66 ESD Protection Schemes

67 ESD Protection Devices 1. TVS (Transient Voltage Suppressor) 2. MOV Multilayer Zinc Oxide 3. Diode 4. Capacitor 5. Spark Gap 6. Filters 7. Ferrites

68 ESD Strategies Avoid Direct Connection from an exposed external point to an Integrated Circuit. E E ~ 30 mj

69 ESD Strategies In no case should there be a direct connection from an Integrated Circuit to an exposed external point.

70 ESD Strategies Divert or limit the ESD Energy away from Circuit Inputs using Filters or Transient Suppressors.

71 ESD Capacitor Mounting Strategy How far from Connector Pin PCB layer stackup Y-Connection

72 ESD Capacitor Failure Mode Voltage Pressure Current Force Dielectric Breakdown

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74 ESD Strategies Solution

75 ESD Strategies Solution

76 ESD Strategies Solution

77 ESD Strategies Use LOW Capacitance Protection

78 TVS Diode family for ESD Protection of LIN Bus

79 TVS Diode Bias Impact

80 ESD Strategies Solution IC absorbs a % of ESD Current! I HF

81 ESD Frequency ~ 3 GHz Fast Transient Electromagnetics Field Collapses to V within 50 ps 5 ns Structure Electrically Large l > λ

82 High Frequency Design Practice ESD

83 Spark Gap Protection Mechanism

84 Spark Gap

85 Spark Gap

86 Spark Gap

87 Topler Law "Gas Discharge Process": I a ( t) = = Topler Surface Process; d = arc length I a gas T surf M ( t) = U a U a arc T ( t) d 0 ( ξ ) dζ Constant 8 10 arc M ( t) d Spark Gap Physics t t 0 I ( ξ ) dζ = Surface Process Constant I gas surf -4 Vs/m at Normal Pressure Vs/m

88 PSPICE Model for Spark Gap

89 MLCC Package Size

90 0603

91 ESD Capacitors Mounting Strategy

92 Murata TDK EPCOS Strategic Insertion Topology of MLCC Concept

93 Flash µc IGN. Regulator +5 V ESD Capacitors Mounting Strategy

94 TVS Diode Mounting Strategy

95 ESD Capacitors PCB Connector Pins

96 PCB Mounted MLCC Exposed to HBM ESD ESD Event (High Frequency Current through ESD MLCC)

97 Connector Area ESD Capacitors

98 Connector Area ESD Capacitors

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101 Electrical Characteristics

102 180 pf/50v, C0G X7R

103 1 nf/50 V, C0G X7R

104 X7R

105 ESR - function of Frequency

106 MLCC Supported via 2 cm Long Wires Exposed to HBM ESD

107 MLCC Geometries 1.Standard MLCC plates do not overlap over indicated regions 2.ESD Enhanced

108 When not intersecting When intersecting The Electric Flux Density is higher on the terminal electrode edge.

109 Departure from a Simple MLCC Electrical Model NOMINAL 1 khz 680 pf 10 nf L1 49 ph 91 ph L2 931 ph nh ESL C1 680 pf 10 nf ESR C2 R pf 5.15 kω 4.10 pf kω C R Ω Ω R x Ω 0.1 x Ω

110 R3 - Insulation / Leakage Resistance Nominal 1 khz 680 pf 10 nf L1 49 ph 91 ph L2 931 ph nh ESL C1 680 pf 10 nf C pf 4.10 pf ESR R kω kω C R Ω Ω R x Ω 0.1 x Ω x Ω

111 L 1 is the series parasitic inductance associated with plate connections. L 2 is the equivalent series inductance. It is also known as L ESL. R 1 is the equivalent series resistance (also known as R ESR ) and represents the actual Ohmic resistance of the plates. This value is typically very low. It causes a power loss of I 2 R 1. Its contribution to the total dissipation factor is D 1 = 1/ωR 1 C 1

112 C 1 is the nominal capacitance. R 2 is the dielectric loss: A parallel resistance arising from two phenomena; molecular polarization and interfacial polarization (dielectric absorption). Dielectric loss is a complex phenomenon that can change with frequency in most any manner that is not abrupt. Its contribution to the total dissipation factor can be approximated by D 3 = 1/(ωR 2 C 2 )

113 C 2 is the parallel dielectric absorption capacitor. R 3 is the leakage resistance, or insulation resistance: A parallel resistance due to leakage current in the capacitor. This value is typically very high. It causes a power loss of V 2 /R 3. Its contribution to the total dissipation factor is D 2 = 1/(ωR 3 C 1 )

114 Z 10nF/50V X7R ESR

115 Z 680pF/50V X7R ESR

116 MLCC Pre-ESD & Post ESD Impedance Characterization

117 Pre-ESD

118 R Behavior 10nF Pre-ESD, Post-ESD

119 Pre-ESD, Post-ESD 600 Ω R Behavior 680pF

120 680pF, 10nF Post-ESD

121 680 pf vs. 10 nf Capacitor ratio: 10 nf / 680 pf = 14.7 Insulation resistor ratio: 0.1 x Ω / 1.47 x Ω = 1/ nf 680 pf

122 Same Package Size, i.e., 0603 C, Insulation R C = 680 pf, R = 1.47 x Ω C = 10 nf,, R = 0.1 x Ω

123 Post-ESD, R3 - Leakage Resistance Degradation At low Frequencies C 1 f ~ R 3 1 2πR C 3 1 : Pre-ESD: C 1 = 680 pf, R 3 = x Ω Post-ESD: C 1 = 680 pf, R 3 = 500 Ω (40 Hz 200 khz) Pre-ESD: C 1 = 10 nf, R3 = 0.1 x Ω Post-ESD: C 1 = 10 nf, R 3 = 500 Ω (40 Hz 20 khz)

124 5.7nF, 0805 Post-ESD

125 ESD Impact

126 MLCC Post ESD Optical Imaging

127 MLCC X7R Grind and Polish Step 1 Voids Present MLCC X7R Grind and Polish Step 1 Voids, Delamination, and Stress Cracks present Polarized light.

128 MLCC X7R Grind and Polish Step 2 Void size increasing Delamination and Stress Cracks Present Polarized Light. MLCC X7R Grind and Polish Step 2 Voids, Delamination, and Stress Cracks and Edge Cracks are present Polarized light.

129 MLCC X7R Grind and Polish Step 3 Void size increasing Delamination and Stress Cracks Present Polarized Light. MLCC X7R Grind and Polish Step 3 Voids, Delamination, Note: Residual Stress in material around Void. Polarized light.

130 MLCC X7R Grind and Polish Step 4 Void size increasing Delamination - Polarized Light. MLCC X7R Grind and Polish Step 4 Voids, Delamination, and Stress Cracks present Polarized light.

131 MLCC X7R Grind and Polish Step 5 Void size increasing Delamination Bright Field. MLCC X7R Grind and Polish Step 5 Voids, Delamination, Void Size Increasing Polarized light.

132 MLCC X7R Bubble Discovered end cap

133 MLCC C0G Void / Micro Cracks MLCC C0G Void / Micro Cracks Polarized DIC

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138 Z ESR

139 Z ESR

140 Conclusion 0603 style MLCC s exposed to +/- 15 kv ESD, develop permanent damage to their dielectric material (severe leakage, low frequency resistor type behavior up to 200 khz) style MLCC s in excess of 10 nf, will withstand ESD damage. A parallel combination of low capacitance TVS or MOV with a 10 nf, 0603 MLCC an EMC design guideline to perform as an RF filter and ESD module connector pins.

141 Thank you for your Participation