A Newton Raphson Divider Based on Improved Reciprocal Approximation Algorithm
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1 EE38N High Speed Coputer Arithetic Fall 6 Project Report A Newton Raphson ivider Based on Iproved Reciprocal Approxiation Algorith Gaurav Agrawal Ankit Khandelwal Subitted On ec 4, 6
2 Abstract Newton Raphson Functional Approxiation is an attractive division strategy as it provides quadratic convergence and can be faster than digit recurrence ethods if an accurate initial approxiation is available. In this project, we study and siulate several table-lookup based initial approxiation ethods. Of particular interest is the Taylor Series based reciprocal approxiation ethod which uses a table lookup followed by a ultiplication for initial approxiation and can provide a very accurate approxiation with a very sall ROM size. We ipleented and siulated a 4 bit divider based on various ethods published in literature and also proposed an iproveent that retains accuracy while using a uch saller ROM.
3 Table of Contents. Motivation 4. Proble Stateent 4 3. Background 4 3. The ivision Proble 4 3. Classification of ivision Algoriths igit Recurrence Algoriths (Slow ivision) Functional Approxiation Algoriths (Fast ivision) Initial Approxiation Techniques Linear Approxiation irect Table Lookup Table Lookup followed by Multiplication 8 4. Related Work 5. esign Ipleentation 4 6. Results 7. Conclusion 8. References 3 Appix A: MATLAB Code 4 Appix B: Table of ROM Values 35 3
4 . Motivation Floating point perforance is a key denoinator of perforance for several applications including those in scientific, graphics and SP doains. High speed floating point hardware is a requireent to eet the ever increasing coputational deands of these applications. Modern applications coprise several floating point operations including addition, ultiplication, and division. In recent FPUs, ephasis has been placed on designing ever faster adders and ultipliers, with division receiving less attention. Typically, the range for addition latency is two to four cycles, and the range for ultiplication is two to eight cycles. In contrast, the latency for double precision division in odern FPUs ranges fro less than eight cycles to over 6 cycles. A coon perception of division is that it is an infrequent operation whose ipleentation need not receive high priority. However, it has been argued that ignoring its ipleentation can result in significant syste perforance degradation for any applications.. Proble Stateent In Newton-Raphson functional approxiation based division algoriths, the accuracy of initial reciprocal approxiation is highly desirable as it enables quick convergence to the final result. The proble studied in this project is that of deterination of the reciprocal approxiation with high accuracy while using less area. 3. Background 3. The ivision Proble: The proble of arithetic division can be forulated as below: Where: Q = Quotient N = Nuerator (ivid) = enoinator (ivisor) Q = In this project N and are assued to be of the for (as would be the case for the antissa of a noralized floating point nuber) N N =. x x x... x =. y y y... y 3 3 k k 4
5 3. Classification of division algoriths: The division techniques suitable for VLSI ipleentation can be divided into two broad categories: 3.. igit Recurrence Algoriths (Slow ivision): igit recurrence algoriths use subtractive ethods to calculate quotients one digit per iteration. The basic recurrence relation used in these algoriths is as given below: Where P + = rpj q j n( j+ ) P j = The partial reainder of the division r = The radix q = the digit of the quotient in position n ( j+) n( j+) are nubered fro least-significant to ost significant ( n ) n = nuber of digits in the quotient = the denoinator, where the digit positions Various techniques using digit-recurrence algoriths can be classified as below: (i) (ii) (iii) Restoring ivision a. Perforing Restoring ivision b. Non-Perforing Restoring ivision Non Restoring ivision Radix-r SRT ivision 3.. Functional Approxiation Algoriths (Fast ivision): Unlike digit recurrence division, division by functional iteration utilizes ultiplication as the fundaental operation. The priary difficulty with subtractive division is the linear convergence to the quotient. Multiplicative division algoriths are able to take advantage of high-speed ultipliers to converge to a result quadratically. Rather than retiring a fixed nuber of quotient bits in every cycle, ultiplication-based algoriths are able to double the nuber of correct quotient bits in every iteration. However, the tradeoff between the two classes is not only latency in ters of the nuber of iterations, but also the length of each iteration in cycles. Additionally, if the divider shares an existing ultiplier, the perforance raifications on regular ultiplication operations ust be considered. It has been reported that in typical floating point applications, the perforance degradation due to a shared ultiplier is sall. Accordingly, if area ust be iniized, an existing ultiplier ay be shared with the division unit with only inial syste perforance degradation. 5
6 (i) Goldschidt s Algorith: Goldschidt algorith uses series expansion to converge to the quotient. The strategy of Goldschidt is repeatedly ultiply the divid and divisor by a factor R to converge the divisor to as the divid converges to the quotient Q. N( R)( R)( R)...( RK) Q = ( R)( R)( R)...( RK) As ( R)( R)( R)...( RK) converges to, N ( R)( R)( R)...( RK) converges to Q. (ii) Newton Raphson ivision: Newton Raphson iteration is a well-known iterative ethod to approxiate the root of a non-linear function. Let f (x) be a well behaved function and let r be a root of the equation f ( x) =, we start with x which is a good estiate of r and let r = x + h. The nuber h easures how far the estiate x is fro the truth. Since h is sall, the linear approxiation can be used to conclude that And therefore, unless f ( x ) is close to, = f ( r) = f ( x + h) f ( x ) + hf ' ( x ) ' It follows that h f ( x ) f ' ( x ) r = x + h x f ( x ) f ' ( x ) Our new iproved estiate x of r is therefore given by x = x f ( x ) f ' ( x ) Continue in this way. If xi is the current estiate, then the next estiate x i+ is given by: x i+ = x i f ( xi ) f ' ( x ) i () The equation obtained above is called the Newton Raphson forula. In order to copute the reciprocal, the following function and its derivative are used: 6
7 f ( x) = X x f ' ( x) = x () (3) Substituting equations () and () into (3) yields x = x Xx i+ i i (4) It can also be written as: x = x ( Xx i+ i i ) (5) Above equations can be ipleented in hardware in order to double the accuracy in each iteration. Using the for in equation (4), one square, one ultiplication, one shift and one subtraction are required for coputation of x i+. Error Analysis: Let ε = i x X This can also be expressed as: i be the error at i th iteration, then: ε X xi ( xi X i+ = xi+ = X ) ε = ε i+ = X ( / X xi ) X i The above equation clearly shows that the absolute error decays quadratically in each iteration. 3.3 Initial Approxiation Techniques Quadratic convergence techniques like Newton-Raphson, require an initial approxiation on which they iterate to iprove the accuracy of the final result. The nuber of iterations required deps upon the accuracy of the initial approxiation. The reduction in nuber of iterations not only decreases the area of the design but it also helps in reducing the delay and the power nubers. Thus it is good to have as accurate an initial approxiation as possible with as little an area increent as possible. Various techniques are available to calculate the initial approxiation and soe of the are explained below. 7
8 3.3. Linear Approxiation This ethod is one of the siplest approaches used for calculating the initial approxiation. It uses the equation, X = (.94 ), and can be easily ipleented using an adder. But this approach does not provide a good initial approxiation and hence is rarely used in real world designs irect Table Look Up This ethod uses a ROM, as a look up table, to calculate the initial approxiation. The ost significant bits, excluding the leading, of the antissa are used as the address bits for the table look up. The values stored in the table are calculated using the equation stored = ' + M + M Where, = [. d d... d ] and (M+) is the accuracy in bits desired in the initial ' M approxiation. The ROM size required by this approach is Table Look Up Followed By Multiplication M M bits. The ROM values are obtained by perforing the Taylor series expansion of the reciprocal function. A Taylor series expansion for a general function f (x) around point a is given by n f ( a) n f ( x) = ( x a) n! n= So in order to obtain the Taylor series expansion of the reciprocal function operand is split into two parts such that,... =. dd d = [. d d d k ] and = +, (), the can further be represented as, = d. Substituting this value of in equation () gives, = + d 8
9 9 Expanding the Taylor series for around = d and taking the first two ters gives the following equation, )] [( ) ( )] ( ) [( ) ( ) ( ) ( ) ( ) ( ) ( ) ( ) ( ) ( ) ( d d + + = + + = + + = + + = + + = The first ter, ) ( +, of this equation is read fro the ROM using the address bits of excluding the leading. The second ter, +, which can be represented as k d d d d d d ~... ~ ~ , is obtained fro the operand odifier. The operand odifier keeps the first ) ( + bits (including the leading ) intact and inverts the rest of the bits to obtain the final output. Multiplication of these ters provides an initial approxiation of the inverse of denoinator, whose accuracy is ) ( bits. The corresponding ROM size is ) ( + bits. For exaple, if an accuracy of 4 bits is desired in the initial approxiation, then a ROM of size 896 ) 6 ( 6 = + bits needs to be designed. Since the ROM output is only ) ( + bits accurate, the output bit accuracy obtained fro the operand odifier can be reduced to ) ( + bits. Finally, a ultiplier of size ) ( ) ( + + bits could be used and its output could be finally rounded off to ) ( + bits. This would help in reducing the area and the power consuption of the design. In order to keep the ROM size iniu, the value of needs to be deterined carefully as the ROM size deps exponentially on.
10 4. Related Work: Rich literature exists describing various ipleentations of Newton Raphson reciprocal approxiation based dividers. Most of these ipleentations differ in the ethod used to get the initial estiate of reciprocal of denoinator and in the tradeoffs between speed and area. escribed below are soe of the interesting ipleentations that were considered as the baseline for this project. The design proposed by Fowler et al. [3], shown in fig (Called esign 3), is one of the earliest NR techniques utilizing direct table look-up ethod for initial approxiation of the reciprocal. The first ( ) antissa bits (excluding the leading ) were used to index into the ROM and a bits accurate initial approxiation was obtained, thus aking the ROM size. Iteration steps were then used to iprove upon this initial approxiation. Each iteration step needed two ultipliers and a bunch of inverters for calculating the two s copleent (rather one s copleent). =. x x... x x x... x x x x k N =. x x... x x x... x x x x k N Q = Figure: Fowler et al. s esign [3]
11 Kucukkabak et al [] used Taylor Series Expansion ethod to calculate the initial approxiation for its iteration steps. The initial approxiation was obtained after ultiplying the ROM output with the odifier output as shown on next page (Called esign ). A ROM output and a odifier output of bits were used to calculate the initial approxiation of ± 3 bits accuracy. The ultiplier used for calculating the initial approxiation is also utilized by the iteration steps (twice by each iteration) to iprove upon the interediate results.. x x x... x6 x7 x8... x4 x5 x Figure: Kucukkabak et al. s esign []
12 Chen et al. [] proposed an iproveent to the table look-up read followed by a ultiplication with the odifier output, as shown on next page (Called esign ), to obtain the initial approxiation. The eory size used in the design is (+ ) bits wide and the odifier output obtained is + bits wide. This provides an accuracy of bits. Iteration steps iprove upon the initial approxiation, thus obtained, with the help of a squarer, a ultiplier, a shifter and a subtractor.. x x x... x6x7 x8... x4 x5 x ROM Modifier Register Register Multiplier Register MUX con Squarer Register Shift Register Register Mutliplier Shift Register Register MUX con Register Subtractor Figure: Chen et al. s esign []
13 The three designs described above have their own advantages and disadvantages. As is clearly evident, design 3 provides the best throughput but in turn requires ore hardware, thus increasing power and area. esign, on the other hand uses the sae ultiplier for each ultiplication step required. This reduces the throughput by a huge aount but saves upon the area of the design. esign uses different ultipliers for initial approxiation and iteration steps. Hence, though it provides better throughput but it has ore area than esign. In coparison to esign 3, it is better is ters of area but is worse in ters of throughput. If an initial approxiation of a particular accuracy is desired by all the designs, then esign requires the iniu ROM size. 3
14 5. esign Ipleentation: We used an unsigned 4 bit divider as the design on which various strategies were copared. The divider perfors the following operation: N Q = N =. x x =. y y x... x y... y 3 x 4 y 4 N and both have 4-bit significands and have been considered to be in the range ( N, ) < as is the case for the antissa of noralized floating point nubers. As a design goal, we stipulated that the axiu error in Q should be ε < 4 i.e. the error should be less than LSB ofq. The three designs described in the previous section were adapted to the above design specification. We also ipleented our own iproved design, the block diagra of which is shown on the next page. This design is based on the ipleentation in []; however, it uses less than half the aount of ROM needed in [] while still achieving the desired accuracy. This is a fully pipelined design i.e. a new division can be started every cycle. The latency fro the beginning of division to the availability of Q is 5 cycles (For siplicity of latency calculation, we have assued that all ROM lookup and ultiplication operations require one cycle). The paraeters that needed to be selected for this design were: M: The nuber of address bits indexing into ROM W: The width of a word in ROM WX: Width of the odified operand W: Width of the rest of the data path M For a particular choice of M and W, a ROM with size ( W ) bits will be required. One of the goals of this design was to iniize the aount of ROM required. The process used to coe up with an optiu set of paraeters is explained next. Since it was required to refine the initial approxiation to 4-bit accuracy using just one Newton Raphson iteration, we needed at least -bit accuracy in the initial approxiation. To allow ourselves soe argin in the inaccuracies introduced later by finite width ultipliers, we selected an approxiation ethod that will give us 3 bits of accuracy in absence of any finite word length affect. Q 4
15 Miniization of M was key to area iniization as the size of ROM deps exponentially on M. As the accuracy of -ter Taylor Series approxiation itself deps on the value of M, we first deterined the iniu value of M for which Taylor Series approxiation itself will have sufficient accuracy. =. x x x... x6x7x8... x4 x5 x M WX ROM Modifier W Register WX Register Multiplier W Register Squarer W Register Mutliplier Shift Register W Register Subtractor N =. x x x... x6x7x8... x4 x5x W Mutliplier 3 4 N Q = Figure: Iproved esign 5
16 Key results fro this analysis are shown in the figures below. They show the error in Taylor Series approxiation for M = 3,4,5,6,7. The plots in left colun show the histogra error while those in right colun show the agnitude of the error. It can be seen that the error agnitude is always negative which eans that truncating the Taylor series always results in an approxiation that is always saller than the true result. This insight is used later for selecting ROM patterns..3 Error in Quotient M=3 Error in Quotient M= Probability.5 Probability Error (in Bit) Error Magnitude x -3.3 Error in Quotient M=4 Error in Quotient M= Probability.5 Probability Error (in Bit) Error Magnitude x -3.3 Error in Quotient M=5.7 Error in Quotient M= Probability.5 Probability Error (in Bit) Error Magnitude x -4.3 Error in Quotient M=6.7 Error in Quotient M= Probability.5 Probability Error (in Bit) Error Magnitude x -5 6
17 .3 Error in Quotient M=7 Error in Quotient M= Probability..5 Probability Error (in Bit) Error Magnitude x -5 Also looking at the histogras, we can see that as M increases, we get ore and ore accuracy (visible fro rightward shift of histogras as M increases). The increase in accuracy of approxiation as M increases is shown in the plot below. The accuracy deps linearly on M as roughly (M+). 6 -ter Taylor Approxiation accuracy vs M 5 4 Quotient Precision (Bits) 3 Accuracy = M M (Bits) It can be seen that M=6 is enough to give us desired accuracy of 3 bits in initial approxiation. M=5 does not provide enough accuracy while M=7 consues unnecessary ROM area. Therefore, we selected M=6 in our ipleentation. Next step was to select a width of ROM word (W) and a strategy to fit the actual approxiation to this finite word size. Again we siulated for M=6, different values of W for 3 different strategies:. Truncating the approxiation to W bits (used in []). Rounding the approxiation to W bits 3. Ceiling the approxiation to W bits 7
18 4 3 Truncation Rounding Ceiling ROM Width vs Accuracy (M=6) Quotient Precision ROM Width (Bits) The results fro siulation are shown above. We find that the rounding gives us better accuracy for saller W but ceiling gives superior results when W is sufficiently large. This can be understood by recalling that Taylor Series approxiation by itself underestiates the result. Therefore, doing a ceiling operation ts to copensate the error introduces by Taylor series approxiation. On the other hand, both rounding and ore so truncation add to the Taylor series error and therefore do not perfor as well as ceiling. This is visible in error histogra below for (M=6, W=5) where ceiling operation provides a syetric behavior around. For this reason, we ceiled the approxiation to 5 bits in our ipleentation. Appix B lists the contents of ROM as used in our design..35 Floor (M=6, W=5) Round (M=6, W=5).5 Ceiling (M=6, W=5) Probability..5 Probability..5 Probability Error in Quotient x Error in Quotient x Error in Quotient x -4 At sall W, however, the error introduced by finite word width doinates the total error and therefore, rounding gives the best results due to its syetric error around zero. 8
19 The next paraeter to decide was the width of odified operand (WX). Given our previous selection of M=6 and W=5, we siulated various values of WX and the result is as given below. 3.5 XP Width vs Accuracy (M=6, W=5) 3.5 Quotient Precision (Bits) XP Width (Bits) We find that WX=5 gives us ore than.5 bits of accuracy which will still leave us with soe argin to account for finite word effects and error aplification. WX=4 is arginal at bits which WX=6 will result in an unnecessarily large ultiplier. Therefore, we chose to use WX=5. Selection of paraeters M=6, W=5, WX=5 gives us an accurate enough approxiation. The next step was to decide the width of data path (W) in Newton Raphson iteration. We deterined that W=7 was the sallest value that gave us 4 bits of accuracy in final result. Therefore we chose W=7. For the other designs, we kept the various paraeters as proposed in those designs and ade soe odifications to convert their schee to 4 bit wide ultiplier. 9
20 6. Results: The tables below list quantitative coparison of the three Newton-Raphson divider ipleentations published in literature [,, and 3] with our iproved ipleentation. Options Considered: esign The design based on the work of Chen et al. [] esign The design based on the work of Kucukkabak et al. [] esign 3 The design based on the work of Fowler et al. [3] Our esign The design based on iproved table lookup Coplexity: Ipleentation ROM Size Logic Gates esign Kbits 953 esign Kbits 438 esign 3 Kbits 3937 Our esign.94 Kbits 9 Accuracy: Ipleentation Worst Accuracy (Bits) esign 4.5 esign 4.3 esign Our esign 4.7 Speed (Latency and Throughput): Ipleentation Latency Pipelining Throughput esign /Tck esign /(3Tck) esign /(Tck) Our esign /(Tck) As can be seen our design uses the sallest aount of ROM while still eeting the desired accuracy. It has the sae latency as [] and can be fully pipelined.
21 The benefit that we achieved by using ceil instead of truncation can be seen in the error histogras below. The first histogra is for our ipleentation while the second is the histogra that would be achieved if we had used truncation instead. It can be seen that truncated ROM does not eet the accuracy requireent of 4 bits..45 Iproved esign (M=6, W=5, 7 bit datapath) Probability Error (in bit).45 Effect of truncated ROM values (M=6, W=5, 7 bit datapath) Probability.5..5 Error in bit Error (in bit)
22 7. Conclusions: In this project we studied, siulated and copared three divider ipleentations based on Newton Raphson based reciprocal division. We also proposed an iproved ipleentation that provides better accuracy while using a saller ROM size than the published ethods.
23 8. References: [] ongdong Chen; Bintian Zhou; Zhan Guo; Nilsson, P., "esign and ipleentation of reciprocal unit," Circuits and Systes, 5. 48th Midwest Syposiu on, vol., no.pp Vol., 7- Aug. 5 [] Kucukkabak, U. and Akkas, A. 4. esign and Ipleentation of Reciprocal Unit Using Table Look-up and Newton-Raphson Iteration. In Proceedings of the igital Syste esign, EUROMICRO Systes on (sd'4) - Volue (August 3 - Septeber 3, 4). S. IEEE Coputer Society, Washington, C, [3] Fowler,.L.; Sith, J.E., "An accurate, high speed ipleentation of division by reciprocal approxiation," Coputer Arithetic, 989., Proceedings of 9th Syposiu on, vol., no.pp.6-67, 6-8 Sep 989 [4] Oberann, S.F.; Flynn, M.J., "ivision algoriths and ipleentations," Coputers, IEEE Transactions on, vol.46, no.8pp , Aug 997 [5] Behrooz Parhai, Coputer Arithetic Algoriths and Hardware esigns, Oxford University Press, October 999 3
24 Appix A (Matlab Code) bit / 4bit = 4 bit newton Raphson ivider MATLAB code ipleenting the strategy as published in ongdong Chen; Bintian Zhou; Zhan Guo; Nilsson, P., "esign and ipleentation of reciprocal unit," Circuits and Systes, 5. 48th Midwest Syposiu on, vol., no.pp Vol., 7- Aug. 5 Ankit Khandelwal Gaurav Agrawal Worst Case Accuracy: 4.5 bits Hardware Needed: ROM Size : ^7 x 6 bits Multipliers : 4 6 x 5 = 6 truncated ultiplier 6 x 6 = 7 truncated squarer 7 x 4 = 7 rounded ultiplier 7 x 4 = 4 rounded ultipler Adder : 7-7 = 7 subtractor Perforance: 5 cycles (++++) function esign() M = 7; W = *M + ; WX = *M; WM = *M + ; W = 7; N = 4; NUM_SAMPLES = 7; for i=:num_samples N = round(rand*(^n))/^n; = round(rand*(^n))/^n; Q = (+N)/(+); Q_scale = ; if (Q <.) Q_scale = ; Q = Q*; Q = Q-; Approxiation by ro lookup followed by ultiplier generates WM bit wide approxiation p read ro - get fraction rovalue = ro(floor(*^m), M, W); deterine.xxx3..x+'x+' 4
25 xp = truncate(( + (floor(*^m))/^m + ( - (( - ((floor(*^m))/^m))*^m) - /^(N-M))/^M), WX); get initial approx p = truncate(xp*rovalue, WM); 6 x 5 = 6 truncated ultiplier Iteration of Newton Raphson Method p_squared = truncate(p*p, W); 6 x 6 = 7 truncated squarer i = round(p_squared*(+), W); 7 x 4 = 7 rounded ultiplier p = *p-i; 7-7 = 7 subtractor Final Multiplication QNR = round(p*(+n),4); 7 x 4 = 4 rounded ultipler Err_NR(i) = QNR - (Q+)/Q_scale; Err_NR = -log(abs(err_nr)+e-5); innr = in(err_nr); X = 9.5:35.5; [N] = hist(err_nr, X); N = N/length(Err_NR); bar(x, N); title('esign'); xlabel('error (in bit)'); ylabel('probability'); fprintf (, 'Max Error is f\n', innr); Function: ro function value = ro(add, M, W) if ((add < ) (add >= ^M)) fprintf (, 'Error: Invalid address to ro: d\n', add); error ('quiting'); x = + add/^m; c = /(x + ^(-M-))^; value = floor(c*^(w))/^(w); Function: truncate function value = truncate(x, N) value = floor(x*(^n))/(^n); Function: round function value = round(x, N) value = floor(x*(^n)+.5)/(^n); 5
26 bit / 4bit = 4 bit newton Raphson ivider MATLAB code ipleenting the strategy as published in Kucukkabak, U. and Akkas, A. 4. esign and Ipleentation of Reciprocal Unit Using Table Look-up and Newton-Raphson Iteration. In Proceedings of the igital Syste esign, EUROMICRO Systes on (sd'4) - Volue (August 3 - Septeber 3, 4). S. IEEE Coputer Society, Washington, C, Ankit Khandelwal Gaurav Agrawal Worst Case Accuracy: 4.3 bits Hardware Needed: ROM Size : ^ x bits Multipliers : 7 x 7 = 7 rounded ultiplier 7 x 4 = 4 rounded ultipler Perforance: 5 cycles (+3+) function esign() M = ; W = *M; WX = *M; W = 7; N = 4; NUM_SAMPLES = 7; for i=:num_samples N = round(rand*(^n))/^n; = round(rand*(^n))/^n; Q = (+N)/(+); Q_scale = ; if (Q <.) Q_scale = ; Q = Q*; Q = Q-; Approxiation by ro lookup followed by ultiplier generates WM bit wide approxiation p read ro - get fraction rovalue = ro(floor(*^m), M, W); deterine.xxx3..x+'x+' xp = truncate(( + (floor(*^m))/^m + ( - (( - ((floor(*^m))/^m))*^m) - /^(N-M))/^M), WX); get initial approx p = round(xp*rovalue, W); 7 x 7 = 7 rounded ultiplier Iteration of Newton Raphson Method
27 p = round(p*(+), W); pb = (-p-(^(-w-))); p = round(pb*p, W); sae ultiplier sae ultiplier Final Multiplication QNR = round(p*(+n),4); 7 x 4 = 7 rounded ultiplier Err_NR(i) = QNR - (Q+)/Q_scale; Err_NR = -log(abs(err_nr)+e-5); innr = in(err_nr); X = 9.5:35.5; [N] = hist(err_nr, X); N = N/length(Err_NR); bar(x, N); title('esign'); xlabel('error (in bit)'); ylabel('probability'); fprintf (, 'Max Error is f\n', innr); Function: ro function value = ro(add, M, W) if ((add < ) (add >= ^M)) fprintf (, 'Error: Invalid address to ro: d\n', add); error ('quiting'); x = + add/^m; c = /(x + ^(-M-))^; value = floor(c*^(w))/^(w); Function: truncate function value = truncate(x, N) value = floor(x*(^n))/(^n); Function: round function value = round(x, N) value = floor(x*(^n)+.5)/(^n); EOF 7
28 bit / 4bit = 4 bit newton Raphson ivider MATLAB code ipleenting the strategy as published in Fowler,.L.; Sith, J.E., "An accurate, high speed ipleentation of division by reciprocal approxiation," Coputer Arithetic, 989., Proceedings of 9th Syposiu on, vol., no.pp.6-67, 6-8 Sep 989 Ankit Khandelwal Gaurav Agrawal Worst Case Accuracy: 4.4 bits Hardware Needed: ROM Size : ^3 x 4 bits Multipliers : 3 4 x 4 = 7 rounded ultiplier 4 x 7 = 7 rounded ultiplier 7 x 4 = 7 rounded ultiplier Perforance: 3 cycles (++) function esign3() M = 3; W = 4; W = 7; N = 4; NUM_SAMPLES = 7; for i=:num_samples N = round(rand*(^n))/^n; = round(rand*(^n))/^n; Q = (+N)/(+); Q_scale = ; if (Q <.) Q_scale = ; Q = Q*; Q = Q-; Approxiation by ro lookup followed by ultiplier generates WM bit wide approxiation p read ro - get fraction p = ro(floor(*^m), M, W); Iteration of Newton Raphson Method p = round(p*(+), W); 4 x 4 = 7 rounded ultiplier pb = (-p-(^(-w-))); p = round(pb*p, W); 4 x 7 = 7 rounded ultiplier Final Multiplication
29 QNR = round(p*(+n),4); 7 x 4 = 7 rounded ultiplier Err_NR(i) = QNR - (Q+)/Q_scale; Err_NR = -log(abs(err_nr)+e-5); innr = in(err_nr); X = 9.5:35.5; [N] = hist(err_nr, X); N = N/length(Err_NR); bar(x, N); title('esign3'); xlabel('error (in bit)'); ylabel('probability'); fprintf (, 'Max Error is f\n', innr); Function: ro function value = ro(add, M, W) if ((add < ) (add >= ^M)) fprintf (, 'Error: Invalid address to ro: d\n', add); error ('quiting'); x = + add/^m; c = (/(x + ^(-M-))) + (^(-M-)); value = floor(c*^(w))/^(w); Function: truncate function value = truncate(x, N) value = floor(x*(^n))/(^n); Function: round function value = round(x, N) value = floor(x*(^n)+.5)/(^n); EOF 9
30 bit / 4bit = 4 bit newton Raphson ivider MATLAB code ipleenting our Newton Raphson based divider which uses saller ROM size and gets better accuracy in less area Ankit Khandelwal Gaurav Agrawal Worst Case Accuracy: 4.7 bits Hardware Needed: ROM Size : ^6 x 5 bits Multipliers : 4 6 x 5 = 5 truncated ultiplier 5 x 5 = 7 truncated squarer 7 x 4 = 7 rounded ultiplier 7 x 4 = 4 rounded ultipler Adder : 7-7 = 7 subtractor Perforance: 5 cycles (++++) function ivider() M = 6; W = *M + 3; WX = *M + 3; WM = *M + 3; W = 7; N = 4; NUM_SAMPLES = 7; for i=:num_samples N = round(rand*(^n))/^n; = round(rand*(^n))/^n; Q = (+N)/(+); Q_scale = ; if (Q <.) Q_scale = ; Q = Q*; Q = Q-; Approxiation by ro lookup followed by ultiplier generates WM bit wide approxiation p read ro - get fraction rovalue = ro(floor(*^m), M, W); deterine.xxx3..x+'x+' xp = truncate(( + (floor(*^m))/^m + ( - (( - ((floor(*^m))/^m))*^m) - /^(N-M))/^M), WX); 9 Inv get initial approx p = truncate(xp*rovalue, WM); 6 x 5 = 5 truncated ultiplier Iteration of Newton Raphson Method 3
31 p_squared = truncate(p*p, W); 5 x 5 = 7 truncated squarer i = round(p_squared*(+), W); 7 x 4 = 7 rounded ultiplier p = *p-i; 7-7 = 7 subtractor Final Multiplication QNR = round(p*(+n),4); 7 x 4 = 4 rounded ultipler Err_NR(i) = QNR - (Q+)/Q_scale; Err_NR = -log(abs(err_nr)+e-5); innr = in(err_nr); X = 9.5:35.5; [N] = hist(err_nr, X); N = N/length(Err_NR); bar(x, N); title('iproved esign (M=6, W=5, 7 bit datapath)'); xlabel('error (in bit)'); ylabel('probability'); fprintf (, 'Max Error is f\n', innr); Function: ro function value = ro(add, M, W) if ((add < ) (add >= ^M)) fprintf (, 'Error: Invalid address to ro: d\n', add); error ('quiting'); x = + add/^m; c = /(x + ^(-M-))^; value = ceil(c*^(w))/^(w); Function: truncate function value = truncate(x, N) value = floor(x*(^n))/(^n); Function: round function value = round(x, N) value = floor(x*(^n)+.5)/(^n); EOF 3
32 Matlab code to deterine error inherent in Taylor series expansion M = 7; N = 5; practically infinite precision NUM_SAMPLES = 5; for i=:num_samples Nr = round((+rand)*(^n))/^n; r = round((+rand)*(^n))/^n; precise Quotient Q = (Nr)/(r); Floating point division based on taylor series x = floor((r)*^m)/^m; x = r - floor(r*^m)/^m; Quotient obtained fro first two ters of Taylor series expansion Q_Taylor = /(x + ^(-M-)) - (/(x + ^(-M-))^)*(x - ^(-M-)); Error in Taylor series approxiation Err(i) = Nr*Q_Taylor - Q; figure(); plot(err); [N, X] = hist(err, ); N = N/length(Err); plot(x, N, 'o-'); axis([.7*in(x).5*ax(n)]); title('error in Quotient M=7'); xlabel('error Magnitude'); ylabel('probability'); grid on; Err = -log(-err+e-3); avg = ean(err); var = std(err)^; ax = ax(err); in = in(err); fprintf(, ' M = d\n', M); fprintf(, ' avg =.4f\n var =.4f\n ax =.4f\n in =.4f\n\n', avg, var, ax, in); figure(); X = 6.5:5.5; [N] = hist(err, X); N = N/length(Err); bar(x, N); axis([5 5.5*ax(N)]); title('error in Quotient M=7'); xlabel('error (in Bit)'); ylabe('probability'); 3
33 MATLAB code to understand accuracy trade offs with ROM-size function ROMAccuracy() M = 6; N = 5; LSB = *M+; NUM_SAMPLES = ; for j=: W = *M+j-3; for i=:num_samples N = round(rand*(^n))/^n; = round(rand*(^n))/^n; Q = (+N)/(+); Q_scale = ; if (Q <.) Q_scale = ; Q = Q*; Q = Q-; ivision based on ROM followed by a ultiplier read ro - get fraction rovalue = ro(floor(*^m), M, W); deterine.xxx3..x+'x+'... xp = + (floor(*^m))/^m + ( - (( - ((floor(*^m))/^m))*^m) - /^(N-M))/^M; xp = floor(( + (floor(*^m))/^m + ( - (( - ((floor(*^m))/^m))*^m) - /^(N-M))/^M)*^(W+3))/^(W+3); get initial approx p = xp*rovalue; only 6 bits after decial are considered p = floor(p*^w)/(^w); Q_ro = p*(+n); Err_ROMf(i) = (Q_ro() - (+Q)/Q_scale); Err_ROMr(i) = (Q_ro() - (+Q)/Q_scale); Err_ROMc(i) = (Q_ro(3) - (+Q)/Q_scale); Err_ROMf = -log(abs(err_romf) + e-4); Err_ROMr = -log(abs(err_romr) + e-4); Err_ROMc = -log(abs(err_romc) + e-4); inf(j) = in(err_romf); inr(j) = in(err_romr); inc(j) = in(err_romc); X = *M + (:) -3; plot(x,inf, 'ro-'); hold on; plot(x,inr, 'gx-'); 33
34 hold on; plot(x,inc, 'b^-'); title('rom Width vs Accuracy (M=6)'); xlabel('rom Width (Bits)'); ylabel('quotient Precision'); leg('truncation', 'Rounding', 'Ceiling'); grid on; Function: ro function value = ro(add, M, W) if ((add < ) (add >= ^M)) fprintf (, 'Error: Invalid address to ro: d\n', add); error ('quiting'); x = + add/^m; c = /(x + ^(-M-))^; value() = floor(c*^(w))/^(w); value() = round(c*^(w))/^(w); value(3) = ceil(c*^(w))/^(w); 34
35 Appix B (ROM Pattern) Address ROM Contents (5 bits) (6 bits) Binary Hex 7E6 7A35 768F FB 5 6C8B F 8 63BF 9 6 5E77 5BFA B F5 6 5E8 7 4EEF B33 496E 47B B 4 4F EA BF9 3 3AB E A 35 34F E9 37 3E5 38 3E8 39 3F
36 4 FB 4 E3A 43 5F 44 C8A 45 BBA 46 AF 47 AC B3 5 7FE 5 74E 5 6A 53 5FA B7 56 4C F A 6 C
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