The Delta-Sigma Modulator

Transcription

1 A Circuit for All Seasons Behza Razavi The Delta-Sigma Moulator Delta-Sigma moulators (DSMs) are a class of oversampling analog-to-igital converters (s) that perform quantization noise shaping, thus achieving a high signal-to-noise ratio (SNR). An efficient solution for resolutions above approximately b, DSMs are extensively use in analog an R applications. In this article, we stuy the funamentals of this vast fiel. The Delta Moulator It is helpful to first stuy the preecessor of DSMs, namely, the elta moulator. Shown in igure, the latter consists of a -b quantizer (e.g., a single comparator) an an integrator, both place in a negative-feeback loop. The high loop gain ensures that V. Vin an hence the igital output is a representation of the analog input. V V R Bit Quantizer c CK igure : A elta moulator an its simple implementation. Digital Object Ientifier 0.09/MSSC Date of publication: June 06 igure epicts a simple implementation where the integrator is approximate by a low-pass filter. The principal ifficulty with the elta moulator is that the output igital representation in fact contains only the erivative of the input, as can be seen by noting that V = # Doutt in igure. This ifferentiation alters the signal spectrum, attenuates the low-frequency content of the signal, an amplifies high-frequency noise. Brief History To avoi the ifferentiation effect in igure, Inose et al. [] cleverly move, in 96, the integrator from the feeback path to the forwar path, introucing the 3R moulator shown in igure. Here, igure : A DSM. Delta-Sigma moulators are a class of oversampling analog-to-igital converters that perform quantization noise shaping, thus achieving a high signal-tonoise ratio. the high-loop gain forces the running average of Dou t to follow. Of course, Dou t also contains the quantization noise create by the quantizer, but with certain interesting an useful alterations. The 3R moulator structure actually preates the work by Inose et al. In a patent file in 96 [], Brahm iscloses the system shown in igure 3, where the loop contains an integrator, a multibit quantizer (an ), an a multibit igital-to-analog converter (). In the 970s, the potential of DSMs was further explore. Cany propose the use of the structure for robust analog-toigital conversion in 97 [3] an, along with Ching an Alexaner, in 976 emonstrate a resolution of 3 b with a -b quantizer in the loop []. These two papers pointe out that the overall resolution increases as the quantizer is clocke faster an its output circulates aroun the loop more frequently. An important observation mae by Cany was that the overall output noise is the first ifference of the quantizer s aitive noise, exhibiting a spectrum of the form sin ( ~ TCK/ ), where T CK is the quantizer clock perio [3]. That is, the noise is suppresse at low frequencies. Cany also recognize that the performance negligibly egraes with the imperfections of the analog components within the loop. The first integrate DSM was eviently reporte by van e Plassche in 977 [5]. Using a continuous-time (CT) integrator, the achieve a resolution of about 7 b in bipolar technology. In 978, Tewksbury an Hallock escribe higher-orer DSMs, presenting the architecture shown in igure (but attributing it to.r. Ritchie) [6]. They also showe that the quantization noise spectrum is attenuate 0 SPRIN 06 IEEE SOLID-STATE CIRCUITS MAAZINE

2 0 8 6 Digital to Analog S 0 8 Aition or Subtraction S Analog to Digital M 0 KC OSC igure 3: The DSM propose by Brahm in 96. accoring to the shaping function N ( - z - ), where N enotes the orer (the number of integrators). In 98, an n-type metal-oxie-semiconuctor (NMOS) implementation using a single passive iscrete-time integrator was reporte [7], an in 98, a patent was file isclosing a loop with two active switche-capacitor integrators [8]. CMOS realizations followe in 986 [9] an 988 [0]. It is interesting that some authors use the term 3R moulator an others use the term R 3 moulator to refer to the circuit. One argument in favor of the former is that the loop first subtracts an then accumulates. Basic Operation Suppose we wish to igitize the analog waveform shown in igure 5. A Nyquist-rate woul sample an quantize Vin at t an t, with fs = /( t- t) slightly greater than s n igure : A high-orer DSM attribute to Ritchie. t t a t b t c t t igure 5: Oversampling to create correlation between consecutive samples. twice the signal banwith. In this case, the samples at t an t exhibit little correlation, an so o their quantization errors. On the other han, if we aitionally sample an igitize A/D D/A s n Vin at t a, t b, an t c, we create correlate quantization errors between consecutive samples. rom another perspective, if the signal changes slowly enough from t to t a, then IEEE SOLID-STATE CIRCUITS MAAZINE SPRIN 06

3 X(s) X(s) H(s) the quantization errors incurre by these two samples are almost equal. We then surmise that subtracting the quantization error of one sample from the next can reuce the overall quantization noise. This metho of noise suppression can also be explaine in the frequency omain, culminating in the concept of noise shaping. irst, consier the negative-feeback system shown in igure 6, where an unwante signal Q(s) is injecte near the output but insie the loop. The transfer function from Q to Y can be chosen to provie a highpass behavior. or example, if H(s) Q(s) H(s) Y(s) (c) q(t) Y(s) V V igure 6: A negative-feeback system with noise injecte near the output, an / cascae moele in terms of aitive noise, an (c) the rejection of quantization noise by negative feeback. This metho of noise suppression can also be explaine in the frequency omain. is an integrator, then H# ( s) = / s an hence Y/ Q = s/( s ). We say the spectrum of Q is shape by the feeback loop, an effect also observe for the phase noise of oscillators in phase-locke loops. In the next step, consier the cascae epicte in igure 6, noting that V is equal to the ieal analog input plus the s quantization noise, q(t), if the is ieal. It is therefore expecte that placing this cascae within the feeback loop of igure 6 can reuce the overall quantization noise for some frequency range []. Illustrate in igure 6(c), such an arrangement guarantees that Y(s) tracks X(s) an that Q(s) is suppresse so long as H(s) provies a high loop gain. or Hs () = /, s this occurs at low frequencies. The foregoing observations lea to the first-orer 3R moulator shown in igure 7, where the is realize as a -b quantizer (a single comparator) an the as two switches proucing ±V RE. By virtue of its high gain, the comparator enforces a virtual groun at noe X, but ue to the iscrete-time nature of the loop, only the average value of V X remains close to zero. This in turn means that the average ifference between Vin an V, an hence between Vin an Dou t, is nulle. or example, if V X crosses from negative to positive, the comparator an the apply a pulse to the integrator so as to return V X towar zero. igure 7 illustrates how the running average of the igital output tracks the analog input [0]. The -b quantizer in igure 7 suffers from enormous quantization noise, q(t). One might woner, then, whether a more resolute quantizer can be use instea. This question leas to two ifferent architectures, namely, loops containing a multibit quantizer or a greater number of integrators. Before escribing these solutions, we nee to erive the noise-shaping properties of the firstorer moulator. V X V RE CK Moulator Input, Quantizer Output V RE Time (t/t) igure 7: A simple first-orer DSM with a -b quantizer, an input an output waveforms. SPRIN 06 IEEE SOLID-STATE CIRCUITS MAAZINE

4 ormulation of Noise Shaping Let us examine how the quantization noise introuce by the quantizer in igure 8 propagates to the output. We assume a iscrete-time integrator an express its output as ukt ( s) = u[( k- ) Ts] g[( k- ) Ts], where g[( k- ) Ts] = x[( k- ) Ts] - y[( k- ) Ts]. The quantizer output is given by ykt ( s) = u( kts) qkt ( s), an reaches the output unchange if the is ieal. Substituting for g[( k- ) Ts] an for y[( k- ) Ts], we obtain ykt ( s) = u[( k- ) Ts] x[( k-) Ts] -y[( k- ) Ts] q( kts). () Since u[( k-) Ts] -y[( k- ) Ts] =-q [( k- ) Ts], we have ykt ( s) = x[( k- ) Ts] qkt ( s) -q[( k- ) Ts]. () As expecte, the output quantization noise is equal to the ifference between the quantization errors incurre by two consecutive samples. Taking the z transform of both sies yiels - Yz ( ) z - = X( z) ( - z ) Qz ( ). (3) The output thus contains the input with no change but just a elay. The quantization noise experiences a - z - transfer function. We say the system provies a signal transfer function (ST) equal to z - an a noise transfer function (NT) equal to - z -. To etermine the output noise spectrum, we replace z in - z - with exp( j~ Ts) an multiply the spectrum of q(t), SQ ( f), by - exp (- j~ Ts) = ( sin rfts). igure 8 plots this noise-shaping function, revealing that integrate quantization noise can be small if the input signal banwith fb % fs/. The quantity M = ( fs/ )/ fb is calle the oversampling ratio (OSR) an signifies how far above the Nyquist rate the system operates. The area uner the curve in igure 8 from x g 3 zero to f B is proportional to / M, revealing the strong epenence of the performance upon the oversampling ratio. In aition to noise shaping, DSMs provie two other avantages over Nyquist-rate s. irst, for a given amount of kt/c noise, the sampling capacitors in the former can be smaller than those in the latter by a factor of M. This can be intuitively explaine by noting that the extra samples taken in igure 5 are eventually combine with those at t an t (by means of a ecimator ), benefiting from kt/c noise (an op amp noise) averaging. Secon, the antialiasing filter in the former has a more relaxe selectivity than in the latter. DSMs with Multibit Quantizers In the spirit of Brahm s patent (igure 3) an to lower the quantization noise, we can igitize the integrator output with more than one bit of resolution an fee the result to a multibit. Typically realize as a flash stage, the quantizer injects proportionally less noise as its resolution increases. The performance of the system, however, is limite by the nonlinearity, as pointe out by van e Plassche in 979 [5]. In contrast to the two-level in igure 7, a multibit exhibits nonlinearity in its inputoutput characteristic if its constituent components (resistors, capacitors, or current sources) have mismatches. This phenomenon can be viewe in igure 8 as an unesirable term subtracte by the from x an hence inistinguishable from nonlinearity in the input path. u y z 0 The problem of nonlinearity proves serious because DSMs typically target high resolutions, at which the raw evice mismatches prouce consierable istortion. or this reason, loops containing multibit s employ ynamic element matching techniques to reuce this nonlinearity [5]. Higher-Orer DSMs Another approach to reucing the noise of the quantizer is to replace it with another 3R moulator [igure 9]. Here, the outer loop further shapes the quantization noise of the inner loop, yieling a shaping function of the form ( - z - ) for the -b quantizer s noise. The area uner - z - from zero to f B is now proportional to /M 5, a marke reuction compare to that of the first-orer loop. Proviing ientical outputs, the two s in igure 9 can be merge, resulting in the more compact architecture shown in igure 9. Exemplifie by the implementation in igure 9(c) [0], this simple, robust topology is the most commonly use DSM for moerate-performance applications. It can be shown that such imperfections as capacitor mismatch, op amp offset, op amp gain error, an comparator offset have much less impact here than in, for example, pipeline s. The orer of the loop can be increase further by aing more integrators, but instability becomes problematic, requiring other measures. Problem of Tones As explaine earlier, the average output of a DSM tracks the input signal. f B f S igure 8: irst-orer DSM for noise shaping calculations an its noise-shaping function. f IEEE SOLID-STATE CIRCUITS MAAZINE SPRIN 06 3

5 X (s) X (s) S In S S C C S igure 9: A secon-orer DSM, the simplifie architecture, an (c) a iscrete-time implementation. R V R in I S S C C igure 0: A simple secon-orer CTDSM. What happens if in igure is constant? Since the loop is perioically clocke an oes not change with time, we surmise that the output is also perioic. or example, if Vin = 000. VRE, then consists of one ONE an another 999 ZEROs so as to prouce such an average. Repeating with a perio of 000T s, the output therefore exhibits harmonics given by mf s /000, many of which can fall S S S C C S C C I (c) S S C C CK Y (s) Y (s) VRE VRE Out VRE VRE within the signal ban. These tones corrupt the igitize signal. The tones ten to be smaller in magnitue in higher-orer loops or at higher oversampling ratios, but one must often incorporate ithering to break their perioicity an convert them to noise. Continuous-Time DSMs The evolution of DSMs has mae a 360 turn over the years. The earliest esigns, those by Brahm an Inose et al., for example, employe continuous-time integrators, but, as switchecapacitor techniques mature in CMOS technology, iscrete-time integrators became more common. In the late 990s, it was recognize that continuous-time integrators offer certain avantages, an continuous-time DSMs (CTDSMs) rapily rose as a formiable contener. It is important to note, however, that even CTDSMs are iscretetime feeback loops, still facing tone an stability issues. Depicte in igure 0 is a simple CTDSM realization of a secon-orer loop, where the current sources act as -b s. This arrangement provies three avantages over its iscrete-time counterparts: ) the sampling is performe by the comparator, obviating the nee for highly linear front-en (bootstrappe) samplers, ) the DSM presents less input capacitance an kickback noise, easing the eman on the preceing circuit, an 3) the two integrators naturally provie antialiasing filtering, simplifying the other filter stages in the signal path. CTDSMs entail their own rawbacks. irst, the jitter in the comparator clock moulates the amount of charge elivere by the feeback s to the integrators. This issue has been aresse by various techniques, e.g., the use of switche-capacitor s []. Secon, the integrator op amps must have enough banwith to avoi slewing, a ifficult issue because the comparator quantization noise traveling through the s an arriving at the integrators presents fast changes. This translates to a greater power consumption than that of op amps in iscrete-time DSMs. Thir, the signal-epenent elay of the comparator, each time it approaches metastability, also moulates the s outputs, leaing to istortion. The comparator must therefore be esigne for a short regeneration time so that metastable states occur infrequently enough to negligibly affect the signal. ourth, the thermal noise of R an I in igure 0 limits the performance. SPRIN 06 IEEE SOLID-STATE CIRCUITS MAAZINE

6 LO I in Note on StrongArm Latch In my article on the StrongArm latch [3], I ha trace the circuit to a 99 paper by Kobayashi et al. The iea was in fact file for a patent by Maen an Bowhill on 7 June 988 in the Unite States an by Kobayashi s coauthor, Nogami, in Japan on 3 July 988. Questions for the Reaer ) Explain in the time omain why -z - represents a high-pass function. ) Explain why the comparator clock jitter in a iscrete-time SDM such as that in igure 9(c) is not critical. Answers to Last Issue s Questions ) The commutate capacitors of igure are place at the antenna I in V AB X LO Y C LO V AB V igure : Steay-state waveforms in a commutate circuit. A B R C port of a lobal System for Mobile Communication (SM) receiver so as to attenuate by 0 B a 0-Bm blocker at 0-MHz offset. What issues oes such a circuit face? Such an approach faces three issues. irst, from Smith s equation, the array must employ a large capacitance to provie a small banwith with a 50-Ω source resistance. Secon, the on-resistance of the switches must be about 5 Ω, emaning a high power in the LO rive circuitry. Thir, the switches experience a large voltage swing in the presence of a 0-Bm blocker, exhibiting consierable nonlinearity. ) Does V in igure change if the circuit contains four capacitive t branches that are riven by 5%- uty-cycle local oscillator phases? No, it oes not. The steay-state swing remains the same. References [] H. Inose, Y. Yasua, an J. Murakami, A tele metering system by coe moulation Δ-Σ moulation, IEEE Trans. Space Electron. Telemetry, vol. 3, pp. 0 09, Sept. 96. [] C. B. Brahm, eeback integrate system, U.S. Patent 3,9,37, Sept. 96. [3] J. C. Cany, A use of limit cycle oscillations to obtain robust analog-to-igital conversion, IEEE Trans. Commun., vol. COM-, pp , Mar. 97. [] J. C. Cany, C. Y. Ching, an D. S. Alexaner, Using triangularly weighte interpolation to get 3-bit PCM from a sigma-elta moulator, IEEE Trans. Commun., vol. COM-, pp. 6875, Nov [5] R. van e Plassche, A five-igit analogigital converter, IEEE J. Soli-State Circuits, vol. SSC-, pp , Dec [6] S. K. Tewksbury an R. W. Hallock, Oversample, linear an preictive noise-shaping coers of orer N >, IEEE Trans. Circuits Syst., vol. CAS-5, pp. 367, July 978. [7] T. Misawa, J. E. Iwersen, L. J. Loporcaro, an J.. Ruch, Single-chip per channel coec with filters utilizing Δ-Σ moulation, IEEE J. Soli-State Circuits, vol. 6, pp. 3333, Aug. 98. [8] K. Shenoi an B. Agrawal, Delta-sigma moulator with switch capacitor implementation, U.S. Patent,39,756, Jan. 98. [9] T. Hayashi, Y. Inabe, K. Uchimura, an T. Kimura, A multistage elta-sigma moulator without ouble integration loop, in ISSCC Dig. Tech. Papers, eb. 986, pp [0] B. Boser an B. A. Wooley, The esign of sigma-elta moulation analog-toigital converters, IEEE J. Soli-State Circuits, vol. 3, pp , Dec [] H. A. Spang an P. M. Schultheiss, Reuction of quantizing noise by use of feeback, IRE Trans. Commun. Syst., vol. 0, pp , Dec. 96. [] M. Ortmann,. erfers, an Y. Manoli, Jitter insensitive feeback for continuous-time ΣΔ moulators, in Proc. Int. Conf. Electronics, Circuits, an Systems, 00, pp [3] B. Razavi, The StrongArm latch, IEEE Soli-State Circuits Mag., vol. 7, no., pp. 7, Spring 05. IEEE SOLID-STATE CIRCUITS MAAZINE SPRIN 06 5