EMBSY - B1 16/09/ /09/ EMBSY - B DDC. Output: V O = A d V d = A d (V 1 -V 2 ) 16/09/ EMBSY - B DDC 5.3.

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1 EMBY B 6/09/0 Politecnico i Torino CT chool B p mp an feeback circuits Electronics for Embee ystems B p mp an feeback circuits» eal operational amplifier» Negative feeback circuits» Moels of real p mp» tatic parameters» Dynamic parameters eal operational amplifier, negative feeback. Definition of ieal p mp arious types of feeback amplifiers (,,...) Parameters an moels of real p mp Diff. gain, off, b, off, utput saturation, Gain BW, lew ate eferences: Text : Cap ; Text : Cap..,.. 6/09/0 EMBY B 00 DDC 6/09/0 EMBY B 00 DDC mplifiers an perational mplifiers eal p mp tanar amplifier: input i, referre to GND Differential mplifier input, efine as = = (non inverting) (inverting). The perational mplifier is a ifferential amplifier = i = i = utput: = = ( ) Gain nput currents = 0 From» = / = 0» nput ifferential current (input mesh) = 0 groun an/or supply voltages = 6/09/0 3 EMBY B 00 DDC 6/09/0 4 EMBY B 00 DDC oltage amplifier with p mp Effect of feeback on parameters oltage amplifier with assigne gain ( ) The gain r epens only from the / ratio Gain stabilization,,, 0, E E U U E 5.3. nput resistance i nput current = 0; i utput resistance o The amount of feeback β oes not epen from the loa: o = 0 E r, i, o 6/09/0 5 EMBY B 00 DDC 6/09/0 6 EMBY B 00 DDC Page 00 DDC

2 EMBY B 6/09/0 Equivalent circuit oltage amplifier: s E c, 0 v oltage amplifier with assigne gain (r) i high, o low E,, 0, 0 s =0 =00 u =0 = = =00 c 6/09/0 7 EMBY B 00 DDC 6/09/0 8 EMBY B 00 DDC Transresistance amplifier: Example 3: light/voltage conversion Camera mplifier with current input an voltage output i low, u low 0, 0, M M M M M is the Transresistance M M transucer (photoioe) generates a current relate with incient light: = K L igital camera inclues several millions of such circuits M M utput voltage is relate with incient light: M = = M M = K L K = K M 6/09/0 9 EMBY B 00 DDC 6/09/0 0 EMBY B 00 DDC Example 3: inverting voltage amplifier nverting amplif.: equivalent circuit With ieal p mp =0 at GND (0 ) = 0 The inverting input is a virtual groun The input voltage i generates the current. The circuit is an nverting voltage amplifier. i = 0; 0, 5.3. p mp feeback circuit o = (/) i Dualport equivalent circuit K = / i = U = 0 i K 6/09/0 EMBY B 00 DDC 6/09/0 EMBY B 00 DDC Page 00 DDC

3 EMBY B 6/09/0 Example 5: active integrator amplifier Using a capacitor as feeback element we get an active integrator or C i mplifier with voltage input an current output D c ieal integrator (transer function with pole at ω=0) noe: virtual groun (equations for u(0) = 0) 0, 0, (s) (s) (s) sc sc (t) (t)t C High i, High o transconuctance (G m ) amplifier 0, s Gm 6/09/0 3 EMBY B 00 DDC 6/09/0 4 EMBY B 00 DDC ummary table for amplifiers nverting an notinverting amplifiers D E M D m D E D c s U D Zc U D U 6/09/0 5 EMBY B 00 DDC 6/09/0 6 EMBY B 00 DDC entify the configuration! Which type of amplifier? C B D Positive feeback : not an amplifier! 6/09/0 7 EMBY B 00 DDC 6/09/0 8 EMBY B 00 DDC Page 3 00 DDC 3

4 EMBY B 6/09/0 B p mp an feeback circuits eal operational amplifier, negative feeback. Definition of ieal p mp arious types of feeback amplifiers (,,...) Parameters an moels of real p mp Diff. gain, off, b, off, utput saturation, Gain BW, lew ate p mp ata sheet: Maximum ratings, Electrical characteristics Examples of p amp circuits, umming amplifiers, Differential amplifiers ingle an ualsupply circuits Differential gain high but not infinite; ifferential input voltage small but not 0 ctual p mp nput currents, small but not 0 Nonlinear, frequency epenent transfer function u = f(,, ω, ) Limite banwith ( ecreases for high ω) nfluence of external parameters temperature, power supply, New moels to take into account these effects eal p mp 6/09/0 9 EMBY B 00 DDC 6/09/0 0 EMBY B 00 DDC Moels for real p mp Finite ifferential gain How to get real p mp moels: emove the ieal assumptions one at a time:» nfinite gain / ifferential input voltage = 0» nput currents, = 0» Fully balance inputs / no offset» Unlimite banwith» Linearity Define specific moels, which take into account each parameter ni: Gain with feeback, consiering the value of E E How to evaluate behavior of real p mp Evaluate the effects of each parameter using specific moel the various effects (linear system assumption) ni 6/09/0 EMBY B 00 DDC 6/09/0 EMBY B 00 DDC Feeback gain an loop gain T Effect of in feeback circuits Loop gain T = β i ni i(...) T T G T ni T Gain with real p mp: lways lower than ieal gain Gain error proportional to /(), or /T E Gain error proportional with /() = /T amplifiers: utput resistance u low but not 0: less than o (p mp)»by a factor (β) β = T (usually high) nput resistance i large, but not infinite: higher than i»by a factor (β) β = T (usually high) Errors are small if T = β is large β is a esign spec (eal gain: /β)» with high feeback gain (small β) errors increase epens on the p mp» the esigner can select (p mp parameter). 6/09/0 3 EMBY B 00 DDC 6/09/0 4 EMBY B 00 DDC Page 4 00 DDC 4

5 EMBY B 6/09/0 ffset error nput an output offset eal p mp: u = 0 when i = 0 eal: p mp u 0 when i = 0» nternal an external mismatches FFET error = 0 How to evaluate an keep uner control? u i utput offset: uoff alue of u when i = 0 Can be moele as input unbalance (ioff) uoff = ioff x Gain nput offset: ioff alue of i which makes u = 0 u Goal: minimum uoff Two techniques» euce causes» Correct effects» Both: reice causes an correct effects uoff ioff i 6/09/0 5 EMBY B 00 DDC 6/09/0 6 EMBY B 00 DDC Moel for off Example : u(off) evaluation The output offset can be moele by a off unbalance in the input loop When i = off, e = 0; u = 0. off is the voltage to apply at i to get u = 0. u(off) = off ()/ FF p mp moel with input offset voltage eal p mp E = = off = u(off) =? 6/09/0 7 EMBY B 00 DDC 6/09/0 8 EMBY B 00 DDC nput currents Total output offset The currents at input pins are small but not zero They contribute to the total output offset voltage How to limit the error cause by input currents? p mps with MFET input have very low input currents negligible effects (in most cases) 3 3 oes not influence the transfer function elect 3 = // (balance effects of b) = x : keep value of resistors low (for actual value, check p mp specs) utput offset comes from two main sources nput offset voltage (off)» Effect minimize by proper selection of p mp nput currents (in)» Effect minimize by resistor balance an keeping low values off an in are inepenent sources To get total output offset, a absolute values of the two terms uoff = u(off) u(in) 6/09/0 9 EMBY B 00 DDC 6/09/0 30 EMBY B 00 DDC Page 5 00 DDC 5

6 EMBY B 6/09/0 Example : total uoff evaluation, saturation, an offset utput voltage saturation al u 3 utput swing off(out) The u(i) characteristic oes not cross (0,0): ffset () Linear range for input signals (fraction of m) al 6/09/0 3 EMBY B 00 DDC 6/09/0 3 EMBY B 00 DDC ctual transcharacteristic Example of saturation al u nput an output signals for an inverting amplifier utput swing Triangular input Linear output Combine effects of soft saturation an offset al utput with saturation aturation occurs here 6/09/0 33 EMBY B 00 DDC 6/09/0 34 EMBY B 00 DDC Effect of saturation on nput an output ranges s the p mp output (u) enters saturation, the input ifferential voltage is no longer 0 With saturation, the inverting input noe is no longer virtual groun n linearity (u=i)» = 0 n saturation (u al)» 0 u u MX u u MN out L DMC MX DMC MN L in C MX C MN nput Device is amage The evice oes not work, but is not amage K K Device is amage utput Not feasible K K K Not feasible 6/09/0 35 EMBY B 00 DDC 6/09/0 36 EMBY B 00 DDC Page 6 00 DDC 6

7 EMBY B 6/09/0 Frequency response with feeback Banwith with feeback The iagram shows the open loop gain an / ingle pole at F Drop 0 B/ec Gain Bwth Prouct = F /not relate with frequency (resistive ) (B) 30 / 0 0 F 0 00 F (ra/s) ni for ω << ω a β >> /β << rni = /β ame behavior as for ieal p. mp. with feeback (B) 30 / 0 0 << a 0 a (ra/s) 6/09/0 37 EMBY B 00 DDC 6/09/0 38 EMBY B 00 DDC Ban limit with feeback lew rate ni for ω >> ω a β << << /β rni = ame behavior as for open loop p. mp. (B) 30 / a >> a (ra/s) The slope of the output voltage is limite because of oltage saturation insie the amplifier aturation of capacitance charge/ischarge currents. lew ate parameter: = /T With squarewave signals = /Tf(o Tr) With sine signals max = max(/t) = max( cost) = Tf 6/09/0 39 EMBY B 00 DDC 6/09/0 40 EMBY B 00 DDC lew rate istortion Lesson B: final test When signal > amplier Dynamic saturation: upper boun for /t The output becomes a triangular wave u Max of the p. mp. Example for increasing ω Example for increasing Max of the signal t Which is the value of the ifferential input voltage for an p mp? Explain the concept of virtual groun How can we get an inverting voltage amplifier with high input impeance? Which parameters influence the gain error? n amplifier has a voltage gain = 0 an ioff i 3 m. Which is the value of uoff (cause by ioff)? How can we minimize the errors cause by input currents? Which output voltage range can we get from an p mp with 5 an 0 power supplies? How can we evaluate the frequency limitations of a feeback amplifier? 6/09/0 4 EMBY B 00 DDC 6/09/0 4 EMBY B 00 DDC Page 7 00 DDC 7