Optimization of Protective Varnish Thickness to Minimize Crosstalk in Multiconductor Bus of Spacecraft PCB

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1 Optimiztion of Protetive Vrnish Thikness to Minimize Crosstlk in Multiondutor Bus of Sperft PCB Romn S. Surovtsev, Tlgt R. Gzizov Astrt The pper presents the results of optiml hoie for the protetive vrnish thikness to minimize rosstlk in multiondutor us of sperft printed iruit ord. The study of situtions with vrious resistnes t the us ends hs een performed: sitution lose to mthing (ll resistnes equl to 5 Ω), mismth t the end (resistnes equl to 5 Ω t the eginning of the us, nd to 1 MΩ t the end), full mismth (resistnes equl to 5 Ω t the eginning of the us, nd to 1 MΩ t the end). As result, it ws found tht in the sitution of full mismth, due to the simple inrese of the vrnish lyer thikness, it is possile to redue the mplitude of the ner-end rosstlk of the us; nd y hoosing the optimum thikness vlue of the vrnish lyer, the mplitude of the fr-end rosstlk n e redued lmost y hlf. Index Terms eletromgneti omptiility, rosstlk, protetive vrnish N I. INTRODUCTION OWADAYS rdio eletroni equipment (EE) is widely used in lmost ll spheres of humn tivity. Therefore, the orret nd uninterrupted work of EE underlies the sfety of eh person nd of modern soiety in generl. In this regrd, one of the urgent tsks of designing EE is to provide eletromgneti omptiility (EMC) of ritil systems, speifilly, on-ord equipment of sperft. This results from the omplex eletromgneti environment of the orit, the use of the unpressurised enlosure together with the high iruit density nd the inrese of the spetrum upper frequeny limit of signls used. The solution of new tsks requires inresing the numer of the sperfts simultneously operting on the Erth s orit nd inresing their tive shelf life. For exmple, the Glol Nvigtion Stellite System requires 24 simultneously operting sperfts. To ensure EMC of sperft equipment, there re performed system tests under the onditions of severe eletromgneti environment [1]. It is reommended to rry out these tests in frequeny rnge up to 1, 18, 2 nd 1 GHz [2 5]. The trditionl mens of EMC ssurne re This reserh ws supported y The Ministry of Edution nd Siene of the Russin Federtion (RFMEFI57417X172). R. S. Surovtsev nd T. R. Gzizov re with Tomsk Stte University of Control Systems nd Rdioeletronis, Tomsk, 6345, Russi (e-mil: surovtsevrs@gmil.om; tlgt@tu.tusur.ru). eletromgneti shields, ut their effetiveness is negtively ffeted y the enlosure nd perture resonne t high frequenies. In this se, high-frequeny eletromgneti interferene, ypssing the shields, n penetrte into EE nd, due to high field density, disle low-frequeny iruits of the on-ord EE. Besides the redution of protetive effetiveness, dditionl shielding leds to the inrese of the sperft weight nd, hene, the ost of its plement into orit. Finlly, if the tests reveled inompline with the requirements, it is not lwys evident wht hnges in the design of the printed iruit ord (PCB) nd eletril iruits re neessry to mke to gurntee suess in the repeted tests [6]. This leds to the relevne for repeted testing, whih results in dditionl osts. The solution of this prolem lies in simulting the system nd ssurne of EMC t the stge of designing sperft equipment. At the sperft PCB design stge, developers must solve prolems of signl integrity. As for sperft equipment, it is worth mentioning themti issues of the leding EMC journl IEEE Trnstions on EMC. The issues devoted to erospe EMC [7], signl integrity, power integrity nd EMC t the PCB level [8] re of gret urrent interest. In the ontext of signl integrity ssurne, speil ttention is given to rosstlk in the PCB interonnetions sine exeeding the level of eptle rosstlk degrdes the internl system eletromgneti environment, nd n led to the sperft mlfuntion or loss. There re mny pprohes to derese or nel rosstlk in the PCB interonnetions. For exmple, there re some pprohes to redue rosstlk in the pir of oupled mirostrip lines y mens of defeted ondutor [9] nd step-shped ondutor [1]. There re lso efforts to redue interferene in multiondutor lines due to mking hnges in dieletri filling prmeters [11], inluding nisotropi one [12]. One of the pprohes to nel rosstlk is interesting euse it is sed on mounting gurd tre etween the signl ondutors [13 15]. It is importnt to note the results of simulting oupled line with gurded tre grounded t one end nd with open iruit t the other, s the rosstlk redution there is shown to e more thn 5% [15]. In pir of onneted long length lines, the fr-end rosstlk hs greter mplitude ompred to the ner-end, so the fr-end rosstlk nelltion gined more ttention [16 21]. It is worth mentioning the reserh into the dependene of the level /18/$ IEEE

2 of fr-end rosstlk in the oupled four-ondutor trnsmission line (with zero lods t the eginning of the line nd mthed t the end) on the thikness of the dditionl dieletri lyer nd the line length [22]. But ll these studies were rried out on the simple idelized struture exmples ut not on rel sperft PCB. In ddition, in these investigtions the emphsis is pled only on the fr-end rosstlk. The im of this pper is to ssess the possiility for hoosing the optiml thikness of protetive vrnish to minimize the rosstlk level in multiondutor interonnetion of sperft PCB. II. INITIAL DATA FOR SIMULATION For the reserh, we hose n eight-ondutor us on the Bottom lyer of rel sperft PCB with the length l of 74 mm (Fig. 1). protetive vrnish soldier resist ondutor Fig. 3. Cross-setion frgment of the us otined with TALGAT softwre To evlute the impt of the protetive vrnish lyer thikness on the rosstlk level, we performed the lultion of wveforms t the ends of pssive ondutors. The exiting pulse hs trpezoid shpe with prmeters: e.m.f. mplitude is 6 V, durtion of the flt top is 8 ns, nd the rise nd fll durtions re 1 ns eh. For lrity, the iruit digrm of the us is shown in Fig. 4. V17 R1 V1 E R2 R3 R4 R5 R6 R7 R8 V5 V6 V7 V8 V9 h 1 R9 R1 R11 R12 V13 R13 V14 R14 V15 R15 V16 R16 Fig. 4. Ciruit digrm of the us Fig. 1. Eight-ondutor us on the Bottom lyer of sperft PCB The PCB ross-setion is shown in Fig. 2. It onsists of the following lyers (reltive dieletri permittivity is given for the frequeny of 1 GHz): IS42ML fierglss (h 4=.2 mm, ε r4=4.9), IS42ML18 prepreg (h 3=.1446 mm, ε r3=4.49), solder resist (h 2=2 μm, ε r5=3.5), nd EP 73 protetive vrnish (h μm, ε r1=3.5 5). The thikness of the foil on Top nd Bottom lyers t 1 is 65 μm, the thikness of the foil on Mid 1, Mid 2, Power nd Ground lyers is 35 μm. Top Lyer Mid-Lyer 1 Ground Power Mid-Lyer 2 Bottom Lyer ε r1 ε r2 ε r3 ε r4 ε r3 ε r4 t 1 h 1 h 2 h 3 h 4 h 3 ε r3 h Prepreg IS42ML18 3 ε r2 h 2 Solder Resist t 1 h 1 Vrnish ε r1 h 4 Vrnsih Solder Resist Prepreg IS42ML18 Core IS42ML Prepreg IS42ML18 Core IS42ML Fig. 2. Frgment of the sperft PCB ross-setion To simulte the PCB we hose the simplest se, when the protetive vrnish overs the entire us surfe. Fig. 3 shows the frgment of the geometri model of the us ross-setion performed in TALGAT softwre [23]. The width of the ondutor se (w) is 3 μm, nd the spe etween the ondutors (s) is 32 μm. III. QUASISTATIC SIMULATION OF THE BUS First nd foremost, the evlution of rosstlk level is desirle for vrious mthing modes, sine for the mismthed us the resulting signl t the us ends is defined y superposition of inident nd refleted wves of eh mode of multiondutor line. Essentilly, ll indued signls in the event of mismthing will e lose to the sum of the ner- nd fr-end rosstlk in the mthing mode. The following mthing modes re onsidered: se lose to the mthing mode (ll resistnes re 5 Ω), mismth t the end (resistnes re 5 Ω t the eginning of the us, nd 1 MΩ t the end), full mismth (resistnes re 5 Ω t the eginning of the us, nd 1 MΩ t the end). A. Simultion with 5 Ω lods We performed the us simultion with 5 Ω lods (R1=R2= =R16=5 Ω). The first se is the sitution when only one ondutor is tive (outer) nd the other ondutors re pssive. The dependene of the mximum (over ll ends of the us) rosstlk mplitude on h 1 hnging in the rnge of 5, 1,, 2 μm is given in Fig. 5.,65,55,45,35 5 Vm x, V h 1, μm Fig. 5. Dependene of the mximum rosstlk mplitude on h 1 for N ACT=1 ( ) nd N ACT=7 ( )

3 It is seen tht the mximum rosstlk mplitude inreses from.16 V to.22 V (y 4%) in the rnge of h 1, nd its mximum level is out 3.5% of the e.m.f. level. As n exmple, Fig. 6 shows the rosstlk wveforms t the ner end of pssive ondutors (the first three from the tive ondutor) for the extremities of h 1 vrition rnge ,5 -, Fig. 6. Ner-end rosstlk wveforms for l=74 mm, h 1 =5 () nd 2 μm () The fr-end rosstlk wveforms for numer of vlues of h 1 re shown in Fig. 7. It is seen, tht they ehve differently: the rosstlk level on the nerest ondutor dereses y 1 times, nd then (when h 1 psses from 1 μm to 12 μm) it hnges the polrity, nd inreses to.2 V t h 1=2 μm. A similr simultion ws performed for ll possile influenes on the us. At first, the soure ws suessively moved long ondutors 2 4 (the remining ses were not onsidered euse they re mirror-like), nd then the numer of tive ondutors ws suessively inresed to 2, 3, 4, 5, 6 nd 7, nd they were moved over ll us ondutors. Summry results for the sitution when ll ondutors re tive exept entrl one (N ACT=7) re shown in Fig. 5. From the otined results, it n e seen tht the rosstlk mplitude inreses y times in h 1 vrition rnge nd n e 5 17% of the signl mplitude in the tive ondutor nd the inrese of h 1 results in the 3% inrese of rosstlk mplitude. Then, we evluted how the inrese of the line length (l=15, 225, 3 mm) impts the rosstlk wveform nd mplitude. As the result, we oserved wek inrese of the ner-end rosstlk mplitude nd durtion whih ws proportionl to us length (Fig. 8). For fr-end rosstlk, with the inrese of l we oserved the mplitude inrese up to.13 V (8.7% of the signl in the tive ondutor) nd the inrese of signl step durtion used y the refletion from the fr-end of the us (Fig. 9). The inrese of the protetive vrnish lyer thikness redues the rosstlk level to.5 V (3.3% of the level in the tive ondutor) nd hnges its polrity (Fig. 9).,4,2 -,2 -,4,4,2 -,2 -,4,4,2 -,2 -,4,4,2 -,2 U,V ,4 d Fig. 7. Fr-end rosstlk wveforms for l=74 mm, h 1=5, 5, 1, 2 μm (-d) ,5 -, Fig. 8. Ner-end rosstlk wveforms for l=3 mm, h 1= 5 (), 2 μm ()

4 2,8,4 -,4 -,8-2,6,3 -,3 -, Fig. 9. Fr-end rosstlk wveforms for l=3 mm, h 1= 5 (), 2 μm () B. Simultion with 5 Ω t ner-end nd 1 MΩ t fr-end We performed the us simultion with mismthing t the fr-end (R1=R2= =R8=5 Ω, R9=R1= =R16=1 MΩ) (Fig. 1, 11) ,4, ,3 -, Fig. 1. Ner-end rosstlk wveforms for h 1=5 μm nd l=75 mm (), l=3 mm () nd h 1=2 μm, l=3 mm () For the ner-end rosstlk with miniml protetive vrnish thikness, signl dip of.3 V is oserved (2% of the signl in the tive ondutor) for l=75 mm nd of.23 V (15% of the signl in the tive ondutor) for l=3 mm. The dip n e explined y the summtion of two signl omponents: ner-end rosstlk nd rosstlk from the signl refleted from the fr-end of the us (Fig. 1, ). The inrese of the protetive vrnish thikness results in hnging the polrity of rosstlk omponent from the fr-end refleted signl, thus inresing the pek vlue of the totl signl to.32 V (21% of the signl in the tive ondutor) for the length of 3 mm nd the lyer thikness of 2 μm (Fig. 1). For the fr-end rosstlk, the summtion of two signl omponents is lso oserved: fr-end rosstlk with the rosstlk from the signl refleted from the fr-end of the us (Fig. 12). The inrese of the us length (from 75 to 3 mm) leds to n insignifint inrese of the mplitude nd the durtion of the sum of these omponents (Fig. 11, ). The inrese of the protetive vrnish thikness leds to the inrese of the omponents totl pek vlue up to.53 V (35% of the signl in the tive ondutor) (Fig. 12). Thus, the mismth t the fr-end leds to the inrese in the pek vlue of the rosstlk mplitudes t the ner- nd frends to.32 V nd.53 V, respetively.,4, ,3 -,4,4, ,3 -,4,6,3 -, ,6 Fig. 11. Fr-end rosstlk wveforms for h 1=5 μm, l=75 mm (), l=3 mm () nd h 1=2 μm, l=3 mm () C. Simultion with 5 Ω t ner-end nd 1 MΩ t fr-end We performed the us simultion with full mismthing (R1=R2=... =R8=5 Ω, R9=R1=... =R16 =1 MΩ), whih imittes smll output resistne of the driver nd high input resistne of the reeiver. At the ner-end, we oserved the osilltions with the mplitude up to.5 V (less thn 2% of the level in the tive ondutor) for l=75 mm nd.2 V

5 (6.6% from the signl in the tive ondutor) for l=3 mm (Fig. 12, ). The inrese of the protetive vrnish thikness leds to the redution of the ner-end signl mplitude to.1 V (3.3% from the signl in the tive ondutor) for l=3 mm nd the vrnish lyer thikness of 2 μm (Fig. 12). The osilltions re lso oserved for fr-end rosstlk. With the inrese of the us length (from 75 to 3 mm), we oserved serious inrese in mplitude (from.55 to 1.9 V, whih is 18 nd 63% of the level in the tive ondutor) nd the signl durtion (Fig. 13). The inrese of the protetive vrnish thikness to 1 μm leds to the derese of the rosstlk mplitude to.75 V (25% of the level in the tive ondutor) (Fig. 14), nd its further inrese to 2 μm leds to signl mplitude inrese to 1.2 V (4% of the level in the tive ondutor) (Fig. 14).,6,4,2 -,2 -,4 -,6 - -,5 -, Fig. 12 Ner-end rosstlk wveforms for h 1=5 μm, l=75 mm (), l=3 mm () nd h 1=2 μm, l=3 mm () Thus, in se of full mismth, the rosstlk mplitude t the ner-end of the line is smll (up to.1 V), nd t the frend it is lrge (up to 2 V). By inresing the protetive vrnish thikness, it is possile to redue the mplitude of the ner-end rosstlk. By hoosing the optimum thikness vlue of the vrnish lyer, the mplitude of the fr-end rosstlk n e redued lmost y hlf. This suggests tht there is simple wy to redue the rosstlk level without hnging the PCB lyout nd introduing dditionl omponents, nmely, y hoosing the optiml thikness of the protetive vrnish oting t the ltest stge of the PCB ssemly.,6,5,4, ,3 -,4 -,5 -,6 1,8 1,2,6 -,6-1,2-1, Fig. 13. Fr-end rosstlk wveforms for h 1=5 μm, l=75 () nd 3 () mm 1,5 -,5-1 1,5 -, Fig. 14. Fr-end rosstlk wveforms for l=3 mm, h 1=1 () nd 2 μm () IV. CONCLUSION The tsk of minimizing rosstlk in multiondutor interonnets y mens of oting PCB with the protetive vrnish is quite diffiult, nd its solution requires onduting omplex studies. The min prt of them is lrge numer of omputtionl experiments on vrious exmples of multiondutor interonnetion with vrious dieletri fillings nd employing vrious PCB oting proesses. In this pper, only omplete protetive vrnish oting (when the oting lyer is pplied to the entire PCB surfe) hs een onsidered. The min result of the pper is tht in the se of full mismth, due to simple inrese of the protetive vrnish lyer thikness, it is possile to redue the mplitude of the ner-end rosstlk of the us; nd y hoosing the optimum thikness vlue of the oting lyer, the mplitude of the frend rosstlk n e redued lmost y hlf. The simultion

6 results show the possiility to develop the tehnique of pplying protetive oting with optiml thikness to redue the rosstlk mplitude nd to improve EMC. At the sme time, other tehniques of pplying protetive vrnish oting remin unexplored: oting only ritil interonnets long their entire length; oting only ritil setions long n interonnet long its entire width; oting only ritil setions long the length nd width of n interonnet. The mentioned tehniques of pplying protetive vrnish re more diffiult to implement in omprison with the onsidered one, ut n e more effetive due to the seletive rther thn omplete interonnetion oting. Thus, to solve the tsk of improving EMC y pplying PCB oting with n optiml thikness, it is neessry to rry out lrge numer of omputtionl experiments, detiled nlysis nd systemtiztion of the results. The next step is series of fullsle experiments, whih will llow us to onfirm the fesiility of the tehnique nd to develop the tehnology for reduing rosstlk with PCB oting s well. REFERENCES [1] R. Brewer, D. Trout Modern sperft-ntique speifitions, 26 IEEE Int. Symp. Eletromgn. Compt. 26. EMC, 26, pp [2] Eletromgneti Comptiility Requirements for Spe Equipment nd Systems, Amerin Institute of Aeronutis nd Astronutis (AIAA), 29, S , 94 p. [3] Deprtment of Defene Interfe Stndrd, Eletromgneti Comptiility Requirements for Spe Equipment nd Systems, 1987, MIL-STD-1541A, 32 p. [4] Deprtment of Defense Interfe Stndrd, Requirements for the ontrol of eletromgneti interferene hrteristis of susystems nd equipment, 27, MIL-STD-461F. [5] Deprtment of Defense Interfe Stndrd, Eletromgneti environmentl effets requirements for systems, 22, MIL-STD-464A. [6] L.N. Kehiev, N.V. Lemeshko, Virtulny sertifiktsiy rdioelektronnyih sredstv po urovnyu pomehoemissii kk sredstvo podgotovki k lortornyim ispyitniym po elektromgnitnoy sovmestimosti, Trudyi nuhno-issledovtelskogo institut rdio, 21, no. 1, pp (in Russin). [7] R. Perez, J.A. Luksh, Guest Editoril Speil Issue on erospe eletromgneti omptiility, IEEE Trns. on Eletromgn. Compt, vol. 5, no 3, 28, pp [8] J. Kim, E. Li, Guest Editoril Speil Issue on PCB level signl integrity, Power integrity, nd EMC. IEEE Trns. on Eletromgn. Compt, vol. 52, no 2, 21, p [9] M. Kzerooni, M.A. Slri, A. Cheldvi, A novel method for rosstlk redution in oupled pir mirostrip lines, Interntionl Journl of RF nd Mirowve Computer-Aided Engineering, vol. 22, no. 2, 212, pp [1] A.R. Mllhzdeh, A.H. Ghsemi, S. Akhlghi, B. Rhmti, Byderkhni R. Crosstlk redution using step shped trnsmission line, Progress In Eletromgnetis Reserh, vol. 12, 21, pp [11] M.K. Krge, G.I. Hddd, Chrterisis of oupled mirostrip lines, Evlution of oupled line prmeters. IEEE Trns. on MTT, vol. MTT 18, no. 4, 197, pp [12] M. Horno, R. Mrques, Coupled mirostrips on doule nisotropi lyers, IEEE Trns. Mirowve Theory Teh, vol. MTT 32, 1984, pp [13] I. Novk, B. Eged, L. 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Gzizov, Modelirovnie prymyih perekryostnyih pomeh v dlinnoy mnogoprovodnoy mikropoloskovoy linii s pokryivyushim dielektriheskim sloem, S. nuh. dokl. IV Mezhd. Simp. po elektromgnitnoy sovmestimosti i elektromgnitnoy ekologii, St. Petersurg, 21, pp (in Russin). [23] S.P. Kuksenko, T.R. Gzizov, A.M. Zolotsky, R.R. Ahunov, R.S. Surovtsev, V.K. Slov, Eg.V. Lezhnin, New developments for improved simultion of interonnets sed on method of moments, Proeedings of the 215 Interntionl Conferene on Modeling, Simultion nd Applied Mthemtis, Phuket, Thilnd, Aug , 215, pp Romn Sergeevih Surovtsev reeived the Engineering degree nd the Ph.D. degree from Tomsk Stte University of Control Systems nd Rdioeletronis (TUSUR), Tomsk, Russi, in 213 nd 216, respetively. He is urrently Junior Reserh Fellow t TUSUR. He is the uthor or outhor of 67 sientifi ppers, inluding 1 ook. Tlgt Rshitovih Gzizov ws orn in He reeived the Engineering degree, the Ph.D. degree, nd the D.S. degree from Tomsk Stte University of Control Systems nd Rdioeletronis (TUSUR), Tomsk, Russi, in 1985, 1999, nd 21, respetively. His urrent reserh interests inlude signl integrity prolem. He is the uthor or outhor of 3 sientifi ppers, inluding 11 ooks.