Five Myths about the PDN
|
|
- Morgan Leonard Ellis
- 5 years ago
- Views:
Transcription
1 Slide -1 A copy of the slides is available on search VL-180 or PPT-180 Five Myths about the PDN Eric Bogatin, eric@bethesignal.com Signal Integrity Evangelist Bogatin Enterprises March 2009 Slide -2 For More Information Feature articles and columns Signal integrity public classes Online lectures Podcasts Coming soon: Hands on labs (using the Virtual Lab Bench) IEEE Professional Development Certification Program Published by Prentice Hall, 2004 Contact : info@bethesignal.com
2 Slide -3 Copyright 2009 by Bogatin Enterprises, LLC All rights reserved. No material contained in this presentation may be distributed or reproduced in whole or in part without the written permission of Bogatin Enterprises. Please respect the great deal of effort that has gone into the preparation of these lectures and use these materials for your personal use only. Bogatin Enterprises, LLC W. 110th Terr. Olathe, KS v: f: e: Slide -4 Outline The PDN What s a myth The general process to separate myth from reality Some examples
3 The Power Delivery Network (PDN) Slide -5 All the interconnect from Voltage Regulator Module (VRM) to pads on the chip Purpose: Provide stable voltage to chip pads from DC to > BW of the signals Provide low impedance return path for signals To help mitigate EMI emissions Courtesy of Altera Corp Slide -6 The Consequence of Not Getting it Right PDN 50 mv/div 2 µsec Vdd Z PDN Z chip VRM chip Clock period is 3 nsec Voltage drop on the pads of the chip may exceed the noise threshold Design Goal: do everything possible to reduce the impedance of the PDN
4 Some Common PDN Myths Slide -7 A myth: a statement that may apply to one situation, but is incorrectly generalized to all situations 1. The power and ground planes provide a lot of decoupling capacitance, especially at high frequency 2. Bigger capacitance is always better 3. Use as many decoupling capacitors as you can afford 4. The higher capacitance of thin laminates allows you to eliminate some of the capacitors from a board 5. If a signal crosses a split plane, just add a capacitor to provide a low impedance return path 6. It s important to bring the vias on each capacitor as close together as possible 7. It s better to route the Vcc connection from a capacitor directly to the power pin with a surface trace 8. Just add 3 capacitors, all with the same value to each power pin 9. Just add 3 capacitors with decade values to each power pin: 100 nf, 10 nf, 1 nf 10. Place the power and ground planes in the middle of the board 11. Swiss cheese holes in planes dramatically increase the series inductance 12. Capacitors under the BGA are always better than on the same layer Slide -8 What is the most common answer to all signal integrity questions? Are three capacitors per power pin enough? Can I use a 10 mil thick dielectric? it depends How do we answer it depends questions?
5 Slide -9 Put in the Numbers! Quantifying is the only way to distinguish Myth from Reality Calculation Measurement Analysis Characterization Slide -10 Three Analysis Tools for Every Tool Box Accuracy Rules of Thumb: Feeds your intuition, useful for order of magnitude estimating Self inductance ~ 25 nh/inch 1 st order approximations: Analytic approximations, useful for quick estimates and early design tradeoffs 2d 1 L self = 5d + in nh w + t 2 Cost required to get the answer Numerical simulation: field solver, parasitic extraction, SPICE, IBIS simulations, can base a design on this (such as Ansoft, Agilent, Mentor ) expertise money time
6 Slide -11 PDN Design Principles in 4 Minutes PDN Vdd Z PDN Z chip VRM chip Design Goal: Keep the impedance the chip sees looking into the PDN below some target impedance value Select capacitor values, and design board interconnects for lowest impedance, below ~ 100 MHz Important Features of the PDN Slide -12 Impedance, Ohms 1E1 1 1E-1 1E-2 Lowest frequency: VRM Z target VRM Bulk capacitors Ceramic decoupling capacitors Bulk decoupling capacitors: Electrolytic, tantalum Board level PDN design PCB Planes Package IC package limit Chip Highest frequency: On-chip capacitance 1E-3 1E2 1E3 1E4 1E5 1E6 1E7 1E8 1E9 freq, Hz 1E10
7 Slide -13 Meeting Cost-Performance Tradeoffs is Hard In the ideal world: Three habits for PDN design: Use power and ground planes on adjacent layers with thin dielectric, close to the surface Short surface traces for decoupling capacitors measured Select the number and size of capacitors to sculpt the impedance profile simulated HyperLynx In the real world: Too many voltage of rails Not enough planes Non-optimal shapes, Swiss cheese effect Limited location and space for capacitors FUD: fear, uncertainty, doubt 4 C s: confusing, contradictory, conflicting, complex of Bogatin Enterprises Courtesy Mentor Graphics LLC 2009 Slide -14 Myth #1: Throw as Many Capacitors on the Board as You Can Afford 1E1 in d uc ta nc e Target impedance = 0.4 Ohms VRM 1E-2 1E-3 Bulk C On-chip C = 50 nf em 1E-1 Sy st Impedance Target impedance = 2 Ohms 1 Typical PDN impedance profile, with no board caps 1E2 1E3 1E4 1E5 1E6 1E7 1E8 1E9 1E10 Hzboard caps are used Sometimes it doesn t matter howfreq, many Maybe enough bulk capacitors with VRM Maybe enough on-package capacitance Maybe enough on-chip capacitance Bogatin Enterprises LLC 2009
8 Slide -15 Myth #2: Bigger Capacitors are Always Better Impedance, Ohms 1E5 2E5 1E3 1E1 1E-1 1E-3 1E-5 1E3 1E4 1E5 1E6 1E7 1E8 1E9 freq, Hz i Z = ω C 1E10 C = 1 nf C = 10 nf C = 100 nf C = 1000 nf Why not just use a single big capacitor and be done? Slide -16 Measured Behavior of Real, 220 nf, 0603 MLCC Capacitor Sample courtesy of X2Y 4E0 Impedance, Ohms 1 1E-1 Measured impedance Capacitor s impedance > ~ 10 MHz is all about its ESL 1E-2 1E6 1E7 1E8 2E8 freq, Hz
9 Slide -17 Changing a Capacitor s C has no impact on its High Frequency Impedance ZRLC_sim R R6 R=1 TOhm I_AC SRC4 Iac=polar(1,0) A Freq=freq SRLC SRLC1 R=R1 Ohm L=L1 nh C=C1 nf Varying C, L and R Dominated by C Dominated by L Dk D R Slide -18 Myth #3: Power and Ground Planes Provide Significant Low Inductance Capacitance h A C = ε Dk 0 h A C = ε Dk 0 h A ~ h ε 0 = pf/in Dk = 4 A = area in in 2 h = dielectric thickness, inches C = capacitance in pf Dk = 4 A = area in in 2 h = dielectric thickness, mils C = capacitance in nf Suppose A = 10 in 2, h= 3 mils, what is C planes? Is this a lot or a little? Compared to what? A 10 C = = = 3.3 nf h 3
10 V dd Slide -19 Intrinsic On-Chip Decoupling Capacitance When output is low: n channel is on, p channel is off, gate capacitance of p channel acts as decoupling capacitance p channel For 0.15 micron process, gate capacitance ~ 10 ff/micron 2 n channel Changing the on-chip capacitance V ss On 10 mm x 10 mm chip, ~ 10 7 micron 2 gate area or 100 nf, low inductance capacitance Trends: thinner gate oxide, higher gate capacitance, larger die- can be > 400 nf! Slide -20 Some Capacitor Position Myths Capacitors should go underneath the BGA Capacitors should go on same surface as the BGA Route direct surface trace from capacitor to Vcc pin Bring capacitor as close to the package as possible Bring vias to capacitor as close together as possible Add multiple vias in each capacitor pad Goodness is measured by the resulting impact on ESL
11 Slide -21 Low Frequency Loop Inductance Loop L = capacitor trace mounting inductance + via loop inductance down to cavity + spreading inductance in the planes to the BGA Slide -22 Summary of First Order Approximations for Loop Inductance Len trace Len cap (all dimensions in mils) 2 1 h top h planes s D Capacitor trace inductance Via pair loop inductance Spreading inductance L L L trace vias spread B = 32 x h top = 10 x h 2 x Len w trace top = 21x h trace Len + w 2s x ln ph D planes B x ln ph D ph cap cap
12 Slide -23 Myth #4: Use a Direct Surface Trace from Capacitor to BGA s h Case 1: inches away Filled surface plane h cavity = 5 mils Case 1 Case 2: inches away w = 20 mils h cavity = 5 mils Case 2 Case 3 s h Case 3: 0603, 0.5 inches away Short surface traces Cavity 10 mils below surface h cavity = 5 mils Only use direct surface connection when surface is a copper filled power plane, with adjacent ground NEVER use narrow surface trace Slide -24 Myth #5: Capacitors Should Always Go Underneath the BGA Which location is better? s h it depends Cap on top Cap on bottom Cap on top If cavity is thick, bottom surface mounting has advantage If cavity is thin, top surface may be lower inductance
13 Slide -25 The Origin of Myths: A solution to one custom design doesn t always apply to ALL designs 0.5% > > 15% Noise tolerance 1 mohm > > 10 Ohms Target impedance 1 > 10 Total number of voltage rails and number per layer 1 > > 30 Size, shape of each power/gnd layer 2 > 30 Number of board layers no no Optimized stack up? Got the important information? yes yes Follow These Rules Slide -26 Eric s Philosophy Question authority and experts. The only way to separate myth from reality is by putting in the numbers: rules of thumb, approximations, numerical simulations, measurements on well-characterized test vehicles. Every designer should be empowered with the skill, tools, and technologies to find their own optimized cost/performance solution for each specific design.
14 Slide -27 Slide -28 For More Information Feature articles and columns Signal integrity public classes Online lectures Hands on labs (using the Virtual Lab Bench) IEEE Professional Development Certification Program Published by Prentice Hall, 2004 Contact : info@bethesignal.com
PDN Planning and Capacitor Selection, Part 1
by Barry Olney column BEYOND DESIGN PDN Planning and Capacitor Selection, Part 1 In my first column on power distribution network (PDN) planning, Beyond Design: Power Distribution Network Planning, I described
More informationPDN Planning and Capacitor Selection, Part 2
by Barry Olney column BEYOND DESIGN PDN Planning and Capacitor Selection, Part 2 In last month s column, PDN Planning and Capacitor Selection Part 1, we looked closely at how to choose the right capacitor
More informationPower Distribution Network Design for High-Speed Printed Circuit Boards
Power Distribution Network Design for High-Speed Printed Circuit Boards Jun Fan NCR Corporation 1 Outline Overview of PDN design in multi-layer PCBs Interconnect Inductance Individual Capacitor Values
More informationImproving Power Delivery Networks (PDNs) Using Polyimide-based Thin Laminates
Improving Power Delivery Networks (PDNs) Using Polyimide-based Thin Laminates 2017. 7. 19. 1 Contents 1. Embedded passives technology 2. Thin laminates: material choices and applications 3. Buried capacitance
More informationEMC Considerations for DC Power Design
EMC Considerations for DC Power Design Tzong-Lin Wu, Ph.D. Department of Electrical Engineering National Sun Yat-sen University Power Bus Noise below 5MHz 1 Power Bus Noise below 5MHz (Solution) Add Bulk
More informationHOW TO CHOOSE & PLACE DECOUPLING CAPACITORS TO REDUCE THE COST OF THE ELECTRONIC PRODUCTS
HOW TO CHOOSE & PLACE DECOUPLING CAPACITORS TO REDUCE THE COST OF THE ELECTRONIC PRODUCTS Zhen Mu and Heiko Dudek Cadence Design Systems, Inc. Kun Zhang Huawei Technologies Co., Ltd. With the edge rates
More informationEFFICIENT STRATEGIES TO OPTIMIZE A POWER DISTRIBUTION NETWORK
EFFICIENT STRATEGIES TO OPTIMIZE A POWER DISTRIBUTION NETWORK Raul FIZEŞAN, Dan PITICĂ Applied Electronics Department of UTCN 26-28 Baritiu Street, Cluj-Napoca, raul.fizesan@ael.utcluj.ro Abstract: One
More informationFrequency Domain Target Impedance Method for Bypass Capacitor Selection for Power Distribution Systems
DesignCon 2006 Frequency Domain Target Impedance Method for Bypass Capacitor Selection for Power Distribution Systems Larry D Smith, Altera Corporation lsmith@altera.com 408-544-7822 Abstract There has
More informationDifferential Impedance finally made simple
Slide - Differential Impedance finally made simple Eric Bogatin President Bogatin Enterprises 93-393-305 eric@bogent.com Slide -2 Overview What s impedance Differential Impedance: a simple perspective
More informationInductance and Partial Inductance What's it all mean?
Inductance and Partial Inductance What's it all mean? Bruce Archambeault, PhD IEEE Fellow, IBM Distinguished Engineer Bruce.arch@ieee.org Inductance Probably the most misunderstood concept in electrical
More informationPOWERING DIGITAL BOARDS
POWERING DIGITAL BOARDS DISTRIBUTION AND PERFORMANCE Istvan Novak, Signal Integrity Staff Engineer SUN Microsystems, Inc. Meeting of the Greater Boston Chapter IPC Designer's Council February 9, 1999 1
More informationPCB Effects for Power Integrity
PCB Effects for Power Integrity Bruce Archambeault, PhD IEEE Fellow, MST Adjunct Professor IBM Distinguished Engineer Emeritus Bruce.arch@ieee.org PCB Issues for Optimum Power Integrity Inductance dominates
More informationPower Distribution System Design Methodology and Capacitor Selection for Modern CMOS Technology
Power Distribution System Design Methodology and Capacitor Selection for Modern CMOS Technology Abstract Larry Smith, Raymond Anderson, Doug Forehand, Tom Pelc, Tanmoy Roy Sun Microsystems, Inc. MS MPK15-103
More informationPCB Effects for Power Integrity
PCB Effects for Power Integrity Bruce Archambeault, PhD IEEE Fellow, MST Adjunct Professor IBM Distinguished Engineer Emeritus Bruce.arch@ieee.org PCB Issues for Optimum Power Integrity Inductance dominates
More informationHow Resonant Structures Affect Power Distribution Networks and Create Emissions.
How Resonant Structures Affect Power Distribution Networks and Create Emissions. Presented by Joanna McLellan January 17, 2019 JoannaEMC@iCloud.com 248-765-3599 Lots of people have the paradigm that adding
More informationGraser User Conference Only
PCB Power Delivery Design from DC to Mid-Frequency Foxconn Abby Chou Company Introduction February 1974 Tucheng District 1.23 million Server Storage Mobile Phone Pad TV Voltage Drop and Thermal Co-Simulation
More informationX2Y Capacitors for FPGA Decoupling
Summary Introduction FPGA Decoupling X2Y capacitors provide advantages to FPGA decoupling applications unmatched by any other devices in the market. High performance, low-voltage FPGAs demand low impedance
More informationTECHNICAL INFORMATION
TECHNICAL INFORMATION Introduction to Choosing MLC Capacitors For Bypass/Decoupling Applications Yun Chase AV Corporation 80 7th Avenue South Myrtle Beach, SC 29577 Abstract: Methods to ensure signal integrity
More information1000 to pf (E3 series) Dielectric material K2000 K5000 K14000 Rated DC voltage 100 V 100 V 63 V Tolerance on capacitance ±10% 20/+50% 20/+80%
, Class 2, 63,, V and 1 V (DC) handbook, 4 columns FEATURES General purpose Coupling and decoupling Space saving. APPLICATIONS In electronic circuits where non-linear change of capacitance with temperature
More informationPOWER DISTRIBUTION SYSTEM Calculating PDS Impedance Douglas Brooks Ultracad Design, Inc
POWER DISTRIBUTION SYSTEM Calculating PDS Impedance Douglas Brooks Ultracad Design, Inc On a PCB (Printed Circuit Board) the Power Distribution System (PDS) is the system that distributes power from the
More informationImproving PCB Power Distribution Networks through Effective Capacitor Selection and Placement
UNIVERSITY OF WATERLOO FACULTY OF ENGINEERING Improving PCB Power Distribution Networks through Effective Capacitor Selection and Placement Christie Digital Systems Kitchener, Ontario Prepared by: Eric
More informationKeysight Technologies Heidi Barnes
Keysight Technologies 2018.03.29 Heidi Barnes 1 S I G N A L I N T E G R I T Y A N D P O W E R I N T E G R I T Y Hewlett-Packard Agilent Technologies Keysight Technologies Bill and Dave s Company and the
More informationConsiderations for Capacitor Selection in FPGA Designs
Considerations for Capacitor Selection in FPGA Designs Steve Weir Steve Weir Design Engineering & Teraspeed Consulting Group 2036 Clydesdale Way Petaluma, CA 94954 Voice (775) 762-9031 FAX (707) 778-9386
More informationReducing EMI Noise by Suppressing Power-Distribution Resonances. Istvan Novak Distinguished Engineer, Signal and Power Integrity Sun Microsystems 1
Reducing EMI Noise by Suppressing Power-Distribution Resonances Istvan Novak Distinguished Engineer, Signal and Power Integrity Sun Microsystems 1 Outline Introduction: revisiting the definition of EMI
More informationDISCRETE SEMICONDUCTORS DATA SHEET. BLF245 VHF power MOS transistor
DISCRETE SEMICONDUCTORS DATA SHEET September 1992 FEATURES High power gain Low noise figure Easy power control Good thermal stability Withstands full load mismatch. DESCRIPTION Silicon N-channel enhancement
More informationLecture 21: Packaging, Power, & Clock
Lecture 21: Packaging, Power, & Clock Outline Packaging Power Distribution Clock Distribution 2 Packages Package functions Electrical connection of signals and power from chip to board Little delay or
More informationDistributed SPICE Circuit Model for Ceramic Capacitors
Published in Conference Record, Electrical Components Technology Conference (ECTC), Lake Buena Vista, Florida, pp. 53-58, May 9, 00. Distributed SPICE Circuit Model for Ceramic Capacitors Larry D Smith,
More informationTECHNICAL INFORMATION
TECHNICAL INFORMATION THE EFFECTS OF ESR AND ESL IN DIGITAL DECOUPLING APPLICATIONS by Jeffrey Cain, Ph.D. AVX Corporation Abstract: It is common place for digital integrated circuits to operate at switching
More informationRg2 Lg2 Rg6 Lg6 Rg7 Lg7. PCB Trace & Plane. Figure 1 Bypass Decoupling Loop
TECHNICAL NOTE This article was originally published in 1996. INTRODUCTION In order to guarantee better performance from highspeed digital integrated circuits (ICs), manufacturers are tightening power
More informationAnnouncements. EE141- Fall 2002 Lecture 25. Interconnect Effects I/O, Power Distribution
- Fall 2002 Lecture 25 Interconnect Effects I/O, Power Distribution Announcements Homework 9 due next Tuesday Hardware lab this week Project phase 2 due in two weeks 1 Today s Lecture Impact of interconnects»
More informationHistory of Controlled-ESR Capacitors at SUN
DesignCon 2007 History of Controlled-ESR Capacitors at SUN Istvan Novak, Gustavo Blando, Jason R. Miller Sun Microsystems, Inc. Tel: (781) 442 0340, e-mail: istvan.novak@sun.com Author Biographies Istvan
More informationSRAM System Design Guidelines
Introduction This application note examines some of the important system design considerations an engineer should keep in mind when designing with Cypress SRAMs. It is important to note that while they
More informationDISCRETE SEMICONDUCTORS DATA SHEET. BLF145 HF power MOS transistor
DISCRETE SEMICONDUCTORS DATA SHEET September 1992 FEATURES High power gain Low noise figure Good thermal stability Withstands full load mismatch. DESCRIPTION Silicon N-channel enhancement mode vertical
More informationDISCRETE SEMICONDUCTORS DATA SHEET. BLF246 VHF power MOS transistor Oct 21. Product specification Supersedes data of September 1992
DISCRETE SEMICONDUCTORS DATA SHEET Supersedes data of September 1992 1996 Oct 21 FEATURES High power gain Low noise figure Easy power control Good thermal stability Withstands full load mismatch. PINNING
More informationDESIGN of the power distribution system (PDS) is becoming
284 IEEE TRANSACTIONS ON ADVANCED PACKAGING, VOL. 22, NO. 3, AUGUST 1999 Power Distribution System Design Methodology and Capacitor Selection for Modern CMOS Technology Larry D. Smith, Member, IEEE, Raymond
More informationESE 570: Digital Integrated Circuits and VLSI Fundamentals
ESE 570: Digital Integrated Circuits and VLSI Fundamentals Lec 24: April 19, 2018 Crosstalk and Wiring, Transmission Lines Lecture Outline! Crosstalk! Repeaters in Wiring! Transmission Lines " Where transmission
More informationLecture 23. Dealing with Interconnect. Impact of Interconnect Parasitics
Lecture 23 Dealing with Interconnect Impact of Interconnect Parasitics Reduce Reliability Affect Performance Classes of Parasitics Capacitive Resistive Inductive 1 INTERCONNECT Dealing with Capacitance
More informationDISCRETE SEMICONDUCTORS DATA SHEET. BLU99 BLU99/SL UHF power transistor
DISCRETE SEMICONDUCTORS DATA SHEET /SL March 1993 /SL DESCRIPTION N-P-N silicon planar epitaxial transistor primarily intended for use in mobile radio transmitters in the u.h.f. band. The transistor is
More informationDISCRETE SEMICONDUCTORS DATA SHEET. BLF543 UHF power MOS transistor
DISCRETE SEMICONDUCTORS DATA SHEET October 1992 FEATURES High power gain Easy power control Good thermal stability Gold metallization ensures excellent reliability Designed for broadband operation. DESCRIPTION
More information! Crosstalk. ! Repeaters in Wiring. ! Transmission Lines. " Where transmission lines arise? " Lossless Transmission Line.
ESE 570: Digital Integrated Circuits and VLSI Fundamentals Lec 24: April 19, 2018 Crosstalk and Wiring, Transmission Lines Lecture Outline! Crosstalk! Repeaters in Wiring! Transmission Lines " Where transmission
More informationX2Y Technology. X2Y Comparative Decoupling Performance in 4 Layer PCBs
X2Y Technology X2Y Comparative Decoupling Performance in 4 Layer PCBs Four / Six Layer PCB Decoupling Challenges Cost and area are always major factors. Decoupling performance is determined by the transfer
More informationARIES: Using Annular-Ring Embedded Resistors to Set Capacitor ESR in Power Distribution Networks
St.,Cyr-Novak-Biunno-Howard: Using Embedded Resistors to Set Capacitor ESR in Power Distribution Networks. ARIES: Using Annular-Ring Embedded Resistors to Set Capacitor ESR in Power Distribution Networks
More informationDifferential Via Modeling Methodology
TCPT--4.R Differential Via Modeling Methodology Lambert Simonovich, Member, IEEE, Eric Bogatin Member, IEEE, and Yazi Cao, Member, IEEE Abstract The paper describes a novel method of modeling the differential
More informationType FCA Acrylic Surface Mount Film Capacitors
Type Acrylic Surface Mount Film Capacitors Acrylic Stacked Metallized Film Capacitors for Filtering and Noise Attenuation Type acrylic film chips are non-inductive stacked metallized film capacitors which
More informationCharacteristic of Capacitors
3.5. The Effect of Non ideal Capacitors Characteristic of Capacitors 12 0 (db) 10 20 30 capacitor 0.001µF (1000pF) Chip monolithic 40 two-terminal ceramic capacitor 0.001µF (1000pF) 2.0 x 1.25 x 0.6 mm
More informationLow Inductance Ceramic Capacitor (LICC)
Low Inductance Ceramic Capacitor (LICC) LICC(Low Inductance Ceramic Capacitor) is a kind of MLCC that is used for decoupling in High Speed IC. The termination shape of LICC is different from that of MLCC.
More informationDISCRETE SEMICONDUCTORS DATA SHEET. BLF521 UHF power MOS transistor
DISCRETE SEMICONDUCTORS DATA SHEET November 1992 FEATURES PIN CONFIGURATION High power gain Easy power control ook, halfpage 1 Gold metallization Good thermal stability Withstands full load mismatch Designed
More informationEECS 151/251A Spring 2018 Digital Design and Integrated Circuits. Instructors: Nick Weaver & John Wawrzynek. Lecture 12 EE141
EECS 151/251A Spring 2018 Digital Design and Integrated Circuits Instructors: Nick Weaver & John Wawrzynek Lecture 12 1 Wire Models All-inclusive model Capacitance-only 2 Capacitance Capacitance: The Parallel
More informationHigh Speed Communication Circuits and Systems Lecture 4 Generalized Reflection Coefficient, Smith Chart, Integrated Passive Components
High Speed Communication Circuits and Systems Lecture 4 Generalized Reflection Coefficient, Smith Chart, Integrated Passive Components Michael H. Perrott February 11, 2004 Copyright 2004 by Michael H.
More informationTransmission Lines. Author: Michael Leddige
Transmission Lines Author: Michael Leddige 1 Contents PCB Transmission line structures Equivalent Circuits and Key Parameters Lossless Transmission Line Analysis Driving Reflections Systems Reactive Elements
More informationGMII Electrical Specification Options. cisco Systems, Inc.
DC Specifications GMII Electrical Specification Options Mandatory - Communication between the transmitter and receiver can not occur at any bit rate without DC specifications. AC Specifications OPTION
More informationHigh Performance FPGA Bypass Networks
DesignCon 2005 High Performance FPGA Bypass Networks Steve Weir, Teraspeed Consulting Group steve@teraspeed.com Scott McMorrow, President, Teraspeed Consulting Group scott@teraspeed.com (401) 284-1827
More informationD-Pack 3D Interposer Decoupling System
D-Pack 3D Interposer Decoupling System Michael Randall, John Prymak, Mark Laps, Garry Renner, Peter Blais, Paul Staubli, Aziz Tajuddin KEMET Electronics Corporation, P.O. Box 5928, Greenville, SC 29606
More informationApplication Note 321. Flex Power Modules. Output Filter Impedance Design - 3E POL Regulators
Application Note 321 Flex Power Modules Output Filter Impedance Design - 3E POL Regulators Introduction In this application note Output Filter Impedance Design aspects and guidelines of 3E Point of Load
More informationFEATURES PIN CONFIGURATION Emitter-ballasting resistors for an optimum temperature profile Gold metallization ensures excellent reliability. h
E-MAIL: DISCRETE SEMICONDUCTORS DATA SHEET September 1991 E-MAIL: FEATURES PIN CONFIGURATION Emitter-ballasting resistors for an optimum temperature profile Gold metallization ensures excellent reliability.
More informationOutline. ECE 477 Digital Systems Senior Design Project. Module 7 Capacitor Selection Guidelines. Film Ceramic Electrolytic Miscellaneous
Module 7: Capacitor Selection Guidelines Lecture Workbook - Page 7-1 2004 by D. G. Meyer ECE 477 Digital Systems Senior Design Project Module 7 Capacitor Selection Guidelines Outline Film Ceramic Electrolytic
More informationSPICE Modeling of Capacitors John D. Prymak KEMET Electronics Corp. P.O. Box 5928 Greenville, SC (864)
SPICE Modeling of Capacitors John D. Prymak KEMET Electronics Corp. P.O. Box 5928 Greenville, SC 29606 (864) 963-6300 ABSTRACT Computer simulation and modeling have been an enormous aid in forecasting
More informationTransmission Line Basics
Transmission Line Basics Prof. Tzong-Lin Wu NTUEE 1 Outlines Transmission Lines in Planar structure. Key Parameters for Transmission Lines. Transmission Line Equations. Analysis Approach for Z and T d
More informationAluminum Electrolytic Capacitors SMD (Chip) Long Life Vertical
Aluminum Electrolytic Capacitors SMD (Chip) Long Life Vertical FEATURES Polarized aluminum electrolytic capacitors, non-solid electrolyte, self healing SMD-version with base plate, vertical construction
More informationSurface Mount Multilayer Ceramic Chip Capacitors Prohibit Surface Arc-Over in High-Voltage Applications
Surface Mount Multilayer Ceramic Chip Capacitors Prohibit Surface Arc-Over in High-Voltage Applications ELECTRICAL SPECIFICATIONS FEATURES For this Worldwide Patented Technology Specialty: high-voltage
More informationATC 200 A Series BX Ceramic Multilayer Capacitors
200 A Series BX Ceramic Multilayer Capacitors Case A Size Capacitance Range (.055" x.055") 5 pf to 0.01 µf Low ESR/ESL Mid-K Rugged High Reliability Construction Extended VDC Available, the industry leader,
More informationTECHNICAL INFORMATION
TECHNICAL INFORMATION LICA (LOW INDUCTANCE CAPACITOR ARRAY) FLIP-CHIP APPLICATION NOTES by Jeff Cantlebary AVX Corporation LICA (LOW INDUCTANCE CAPACITOR ARRAY) FLIP-CHIP APPLICATION NOTES Introduction
More informationN-channel TrenchMOS transistor
PSMN2-5W FEATURES SYMBOL QUICK REFERENCE DATA Trench technology Very low on-state resistance Fast switching Low thermal resistance g d s V DSS = 5 V I D = 73 A R DS(ON) 2 mω GENERAL DESCRIPTION PINNING
More informationAluminum Capacitors SMD (Chip), High Temperature
Not Recommended for New Designs, Use 50 CR Aluminum Capacitors SMD (Chip), High Temperature 50 CL 53 CRV Lead (Pb)-free 40 CLH 5 C high temperature 53 CLV Fig. low 50 CL QUICK REFERENCE DATA DESCRIPTION
More informationFEATURES Internal matching for an optimum wideband capability and high gain Emitter-ballasting resistors for optimum temperature profile Gold
E-MAIL: DISCRETE SEMICONDUCTORS DATA SHEET March 1993 E-MAIL: FEATURES Internal matching for an optimum wideband capability and high gain Emitter-ballasting resistors for optimum temperature profile Gold
More informationFEATURES SYMBOL QUICK REFERENCE DATA
FEATURES SYMBOL QUICK REFERENCE DATA Trench technology Low on-state resistance Fast switching d g s V DSS = 2 V I D = 7.6 A R DS(ON) 23 mω GENERAL DESCRIPTION N-channel enhancement mode field-effect power
More informationCeramic Chip Capacitors
Version 17.11 Ceramic Chip Capacitors Table of Contents How to Order - AVX Part Number Explanation...2-3 C0G (NP0) General Specifications...4 Specifications and Test Methods...5 Range...6-7 U RF/Microwave
More informationUsing Full Wave Solvers for Practical Analysis of Capacitor Mounting Structures
Using Full Wave Solvers for Practical Analysis of Capacitor Mounting Structures Scott McMorrow, Steve Weir, Teraspeed Consulting Group LLC Fabrizio Zanella, CST of America 1 Outline o MLCC Basics o MLCC
More informationYet More On Decoupling, Part 5 When Harry Regulator Met Sally Op-Amp Kendall Castor-Perry
Page 1 of 8 Yet More On Decoupling, Part 5 When Harry Regulator Met Sally Op-Amp Kendall Castor-Perry This article was published on EDN: http://www.edn.com/design/powermanagement/4415318/why-bypass-caps-make-a-difference---part-5--supply-impedanceand-op-amp-interaction
More informationATC 700 B Series NPO Porcelain and Ceramic Multilayer Capacitors
ATC 700 Series NPO Porcelain and Ceramic Multilayer Capacitors Case Size Capacitance Range (.1" x.1") 0.1 pf to 5 pf Low ESR/ESL Zero TCC Low Noise High Self-Resonance Rugged Construction Established Reliability
More informationRF Power Feed-Through Capacitors with Conductor Rod, Class 1 Ceramic
DB 06030, DB 06040, DB 06060 RF Power Feed-Through Capacitors with Conductor Rod, Class Ceramic FEATURES Small size Geometry minimizes inductance Wide range of capacitance values APPLICATIONS Filtering
More informationAerospace Performances of IPDiA -250 C up to 250 C Grade Silicon Capacitors
Aerospace Performances of IPDiA -250 C up to 250 C Grade Silicon Capacitors Laurent Lengignon, IPDiA, 2 rue de la Girafe, 14000 Caen, France Alter Technology, Madrid, Spain, Demetrio Lopez ESA/ESTEC, Noordwijk,
More informationDynamic Models for Passive Components
PCB Design 007 QuietPower columns Dynamic Models for Passive Components Istvan Novak, Oracle, February 2016 A year ago the QuietPower column [1] described the possible large loss of capacitance in Multi-Layer
More informationAluminum Electrolytic Capacitors SMD (Chip), Very Low Z, High Vibration Capability
Aluminum Electrolytic Capacitors SMD (Chip), Very Low Z, High Vibration Capability FEATURES Extended useful life: up to 0 000 h at 05 C Polarized aluminum electrolytic capacitors, non-solid electrolyte,
More informationDISCRETE SEMICONDUCTORS DATA SHEET M3D175. BLF202 HF/VHF power MOS transistor. Product specification Supersedes data of 1999 Oct 20.
DISCRETE SEMICONDUCTORS DATA SHEET M3D175 Supersedes data of 1999 Oct 2 23 Sep 19 FEATURES High power gain Easy power control Gold metallization Good thermal stability Withstands full load mismatch. PINNING
More informationDiscoidal Capacitors. Multilayer Discoidal
Discoidal Capacitors Ceramic discoidal feed-through capacitors are the building blocks of the EMI filter industry. API s Spectrum Control discoidal capacitors provide great versatility in meeting varied
More informationDATA SHEET. BGY115A; BGY115B; BGY115C/P; BGY115D UHF amplifier modules DISCRETE SEMICONDUCTORS May 13
DISCRETE SEMICONDUCTORS DATA SHEET Supersedes data of May 994 File under Discrete Semiconductors, SC9 996 May 3 FEATURES 6 V nominal supply voltage996 May 3. W output power (BGY5A, BGY5B and BGY5D).4 W
More informationDISCRETE SEMICONDUCTORS DATA SHEET. BLU86 UHF power transistor
DISCRETE SEMICONDUCTORS DATA SHEET September 1991 FEATURES SMD encapsulation Emitter-ballasting resistors for optimum temperature profile Gold metallization ensures excellent reliability. DESCRIPTION NPN
More informationInterconnect (2) Buffering Techniques.Transmission Lines. Lecture Fall 2003
Interconnect (2) Buffering Techniques.Transmission Lines Lecture 12 18-322 Fall 2003 A few announcements Partners Lab Due Times Midterm 1 is nearly here Date: 10/14/02, time: 3:00-4:20PM, place: in class
More informationUnderstanding Capacitor Inductance and Measurement in Power Bypass Applications
Understanding Capacitor Inductance and Measurement in Power Bypass Applications Summary Power supply bypass is a critical function in all electronics. High frequency capacitor performance depends on the
More informationRT9166/A. 300/600mA, Ultra-Fast Transient Response LDO Regulator. General Description. Features. Applications. Ordering Information
RT9166/A 3/6mA, Ultra-Fast Transient Response LDO Regulator General Description The RT9166/A series are CMOS low dropout regulators optimized for ultra-fast transient response. The devices are capable
More informationIntegrated Circuits & Systems
Federal University of Santa Catarina Center for Technology Computer Science & Electronics Engineering Integrated Circuits & Systems INE 5442 Lecture 7 Interconnections 1: wire resistance, capacitance,
More informationFEATURES SYMBOL QUICK REFERENCE DATA
FEATURES SYMBOL QUICK REFERENCE DATA Trench technology Low on-state resistance Fast switching Low thermal resistance g d s V DSS = V I D = 8 A R DS(ON) 9 mω GENERAL DESCRIPTION N-channel enhancement mode
More informationRT9184A. Dual, Ultra-Fast Transient Response, 500mA LDO Regulator. General Description. Features. Pin Configuration. Applications
RT9184A Dual, Ultra-Fast Transient Response, 500mA LDO Regulator General Description The RT9184A series are an efficient, precise dual-channel CMOS LDO regulator optimized for ultra-low-quiescent applications.
More informationCERAMIC CHIP CAPACITORS
INTRODUCTION Ceramic chips consist of formulated ceramic dielectric materials which have been fabricated into thin layers, interspersed with metal electrodes alternately exposed on opposite edges of the
More informationAluminum Capacitors SMD (Chip) Long Life Vertical
Not for New Designs - Alternative Device: 53 CRV 53 CLV 40 CLH FEATURES Polarized aluminum electrolytic capacitors, non-solid electrolyte, self healing SMD-version with base plate, vertical construction
More informationPDN Tool: Ananalytical Model to Calculate the Input Impedance of Chip and Silicon Interposer Power Distribution
Journal of Contemporary Electronic Research Education and Research Application Research Article PDN Tool: Ananalytical Model to Calculate the Input Impedance of Chip and Silicon Interposer Power Distribution
More informationE40M Capacitors. M. Horowitz, J. Plummer, R. Howe
E40M Capacitors 1 Reading Reader: Chapter 6 Capacitance A & L: 9.1.1, 9.2.1 2 Why Are Capacitors Useful/Important? How do we design circuits that respond to certain frequencies? What determines how fast
More informationElectrical and Thermal Packaging Challenges for GaN Devices. Paul L. Brohlin Texas Instruments Inc. October 3, 2016
Electrical and Thermal Packaging Challenges for GaN Devices Paul L. Brohlin Texas Instruments Inc. October 3, 2016 1 Outline Why GaN? Hard-Switching Losses Parasitic Inductance Effects on Switching Thermal
More information10 23, 24 21, 22 19, , 14
MWI -T7T Six-Pack Trench IGBT = S = (sat) typ. = 1.7 Part name (Marking on product) MWI -T7T, 1, 1 1 9 17 NTC 1 3, 1, 19, E773 1 3 7 11 Pin configuration see outlines. 7, 13, 1 Features: Trench IGBT technology
More informationSCSI Connector and Cable Modeling from TDR Measurements
SCSI Connector and Cable Modeling from TDR Measurements Dima Smolyansky TDA Systems, Inc. http://www.tdasystems.com Presented at SCSI Signal Modeling Study Group Rochester, MN, December 1, 1999 Outline
More informationMicrostrip Propagation Times Slower Than We Think
Most of us have been using incorrect values for the propagation speed of our microstrip traces! The correction factor for ε r we have been using all this time is based on an incorrect premise. This article
More informationDATA SHEET SURFACE-MOUNT CERAMIC MULTILAYER CAPACITORS General purpose & High capacitance Class 2, X5R
DATA SHEET SURFACE-MOUNT CERAMIC MULTILAYER CAPACITORS General purpose & High capacitance Class 2, 6.3 V TO 50 V 10 nf to 100 µf RoHS compliant Product Specification Product specification 2 Surface-Mount
More informationRF Power Feed-Through Capacitors with Conductor Rod, Class 1 Ceramic
DB 030088, DB 03000 RF Power Feed-Through Capacitors with Conductor Rod, Class Ceramic FEATURES Small size Geometry minimizes inductance Wide range of capacitance values APPLICATIONS Filtering purposes
More informationAluminum Electrolytic Capacitors SMD (Chip), High Temperature, Low Impedance, High Vibration Capability
Aluminum Electrolytic Capacitors SMD (Chip), High Temperature, Low Impedance, High Vibration Capability FEATURES Extended useful life: up to 6000 h at 25 C Polarized aluminum electrolytic capacitors, non-solid
More informationFAN ma, Low-IQ, Low-Noise, LDO Regulator
April 2014 FAN25800 500 ma, Low-I Q, Low-Noise, LDO Regulator Features V IN: 2.3 V to 5.5 V V OUT = 3.3 V (I OUT Max. = 500 ma) V OUT = 5.14 V (I OUT Max. = 250 ma) Output Noise Density at 250 ma and 10
More informationRT9166/A. 300/600mA, Ultra-Fast Transient Response LDO Regulator. Features. General Description. Applications
Pin Configurations RT9166/A 3/6mA, Ultra-Fast Transient Response LDO Regulator General Description The RT9166/A series are CMOS low dropout regulators optimized for ultra-fast transient response. The devices
More informationAPPLICATION NOTES FOR MULTILAYER CERAMIC CAPACITORS
APPLICATION NOTES FOR MULTILAYER CERAMIC CAPITORS ELECTRICAL CHARTERISTICS The fundamental electrical properties of multilayer ceramic capacitors are as follows: Polarity: Multilayer ceramic capacitors
More informationRECENT ADVANCES in NETWORKING, VLSI and SIGNAL PROCESSING
Optimization of Reflection Issues in High Speed Printed Circuit Boards ROHITA JAGDALE, A.VENU GOPAL REDDY, K.SUNDEEP Department of Microelectronics and VLSI Design International Institute of Information
More informationDATA SHEET SURFACE-MOUNT CERAMIC MULTILAYER CAPACITORS General purpose & High capacitance Class 2, X5R
DATA SHEET SURFACE-MOUNT CERAMIC MULTILAYER CAPACITORS General purpose & High capacitance Class 2, 6.3 V TO 50 V 10 nf to 100 µf RoHS compliant Product Specification Product specification 2 Surface-Mount
More information