Transmission Line Basics

Transcription

1 Transmission Line Basics Prof. Tzong-Lin Wu NTUEE 1

2 Outlines Transmission Lines in Planar structure. Key Parameters for Transmission Lines. Transmission Line Equations. Analysis Approach for Z and T d Intuitive concept to determine Z and T d Loss of Transmission Lines Example: Rambus and RIMM Module design 2

3 Transmission Lines in Planar structure Homogeneous Inhomogeneous Coaxial Cable Microstrip line Stripline Embedded Microstrip line 3

4 Key Parameters for Transmission Lines 1. Relation of V / I : Characteristic Impedance Z 2. Velocity of Signal: Effective dielectric constant e 3. Attenuation: Conductor loss a c Dielectric loss a d Lossless case Z L C 1 V C p 1 1 V p LC c e T d C T d 4

5 Transmission Line Equations Quasi-TEM assumption 5

6 Transmission Line Equations R G L C resistance per unit length(ohm / cm) conductance per unit length (mohm / cm) inductance per unit length (H / cm) capacitance per unit length (F / cm) KVL : KCL : dv ( R jwl ) I dz di ( G jwc ) V dz Solve 2nd order D.E. for V and I 6

7 Transmission Line Equations Two wave components with amplitudes V+ and V- traveling in the direction of +z and -z rz V V e V e I rz 1 Z V e rz V e rz ( I I ) Where propagation constant and characteristic impedance are r ( R jwl )( G jwc ) a j Z V V I I R G jwl jwc 7

8 Transmission Line Equations a and can be expressed in terms of (R a R G L C 2a ( R C G L ), L, G, C ) The actual voltage and current on transmission line: az jz az jz jwt V ( z, t) Re[( V e e V e e ) e ] 1 I z t Z V e az e jz V e az e jz e jwt (, ) Re[ ( ) ] 8

9 Analysis approach for Z and T d (Wires in air) C =? (by Q=C V) L =? (by Ψ=L I) 9

10 Analysis approach for Z and T d (Wires in air): Ampere s Law for H field H(r)= c I d I 2 r R I I R 2r 2 R 2 1 2) e BT ds dr ln( ) (in Wb) S rr1 2 1

11 Analysis approach for Z and T d (Wires in air): Ampere s Law for H field L e I R2 ln( ) 2 R / I e 1 11

12 The per-unit-length Parameters (E): Gauss s Law 1) from gauss law D E d s Q E T 2) V= E C q 1m T d S q 2 r S ds q R ln 2 R 2 1 T R 1 rr 2 q dr 2 r total 12

13 The per-unit-length Parameters (E) V C q 2 Q / V R R 2 ln( ) 1 13

14 c. For example Determine the L.C.G.R of the two-wire line. Inductance: e L= e I I where e I s-rw2 I s-rw1 ln( )+ ln( ) 2 r 2 r w1 I (s-r )(s-r ) 2 r r w2 w1 = ln( ) assume s r, r w1 s 2 r r w1 w2 w2 2 L= ln( ) w1 w2 w2 r w1 (note:homogeneous medium) e S (, ) r w2 14 I

15 Capacitance: 1) c e C 2 2 s ln ( ) r r w1 w2 q s-r q s-r 2 r 2 r w2 w1 2) V= ln( )+ ln( ) w1 w2 q (s-r )(s-r ) 2 r r w2 w1 = ln( ) w1 w2 2 q s ln( ) if s r w1, r w2 w1 w2 2 r r q 2 C= 2 V s ln ( ) r r w1 w2 S r r w2 w V - - q C/m -q C/m the same with 1) approach 15

16 The per-unit-length Parameters Homogeneous structure TEM wave structure is like the DC (static) field structure LG LC So, if you can derive how to get the L, G and C can be obtained by the above two relations. 16

17 The per-unit-length Parameters (Above GND ) 2C L/2 Why? 17

18 d. How to determine L,C for microstrip-line., 1) This is inhomogeneous medium. 2) Nunerical method should be used to solve the C of this structure, such as Finite element, Finite Difference... 3) But can be obtained by e C e e C where C is the capacitance when is replaced by 1 medium. medium 1, 1 18

19 Analysis approach for Z and T d (Strip line) Approximate electrostatic solution y 1. b -a/2 a/2 x 2. The fields in TEM mode must satisfy Laplace equation 2 ( x, y) t where is the electric potential The boundary conditions are ( x, y) at x a / 2 ( x, y) at y, b 19

20 Analysis approach for Z and T d 3. Since the center conductor will contain the surface charge, so nx ny An cos sinh for y b / 2 n1 a a odd ( xy, ) nx n Bn cos sinh ( b y) for b / 2 y b n1 a a odd 4. The unknowns A n and B n can be solved by two known conditions: R S T The potential at y b / 2 Why? must continuous The surface charge distribution for the strip: s R S T 1 for x W / 2 for x W / 2 2

21 Analysis approach for Z and T d 5. R S T z z b/ 2 b/ 2 y w/ 2 V E ( x, y) dy ( x, y) / y( x, y) dy z Q ( x) dx W( C / m) w/ 2 s 6. C Q V Z 1 v C p W a n W a n b a 2 sin( / 2 ) sinh( / 2 ) 2 ( n) cosh( nb / 2a) n1 odd r cc r Answers!! 7. T d r / c 21

22 Analysis approach for Z and T d (Microstrip Line) y 1. PEC d W PEC x 2. The fields in Quasi - TEM mode must satisfy Laplace equation 2 t ( x, y) where is the electric potential The boundary conditions are ( x, y) at x a / 2 ( x, y) at y, -a/2 a/2 22

23 Analysis approach for Z and T d (Microstrip Line) 3. Since the center conductor will contain the surface charge, so R nx ny An cos sinh for y d n a a odd ( x, y) S 1 nx / B cos a e ny a d y n for T n1 odd 4. The unknowns A n and B n can be solved by two known conditions and the orthogonality of cos function : R S The potential at y d must continuous T The surface charge distribution for the strip: s R S T 1 for x W / 2 for x W / 2 23

24 Analysis approach for Z and T d (Microstrip Line) 5. R S T z z b/ 2 b/ 2 z w/ 2 s w/ 2 nd V E y ( x, y) dy ( x, y) / y( x, y) dy An sinh a Q ( x) dx W( C / m) n1 odd 6. C Q V n1 odd W 4a sin( nw / 2a) sinh( nd / 2a) 2 ( n) W [sinh( nd / a) cosh( nd / a)] r 24

25 Analysis approach for Z and T d (Microstrip Line) 7. To find the effective dielectric constant, we consider two cases of capacitance e 1. C = capacitance per unit length of the microstrip line with the dielectric substrate 2. C = capacitance per unit length of the microstrip line with the dielectric substrate 1 r r 1 e C C 8. Z 1 e v C cc p T d e / c 25

26 Tables for Z and T d (Microstrip Line) Z ( ) eff L ( nh / mm) C ( pf / mm) T ( ps / mm) Fr4 : dielectric constant = 4.5 Frequency: 1GHz 26

27 Tables for Z and T d (Strip Line) Z ( ) eff L ( nh / mm) C ( pf / mm) T ( ps / mm) Fr4 : dielectric constant = 4.5 Frequency: 1GHz 27

28 Analysis approach for Z and T d (EDA/Simulation Tool) 1. HP Touch Stone (HP ADS) 2. Microwave Office 3. Software shop on Web: 4. APPCAD ( ( or ) 28

29 Concept Test for Planar Transmission Lines Please compare their Z and V p (a) (b) 29

30 (a) (b) (c) 3

31 (a) (b) (c) 31

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33 Loss of Transmission Lines Typically, dielectric loss is quite small -> G =. Thus Z where x R jwc jwl L C ( 1 jx) r ( R jwl )( jwc ) a j R wl 1/ 2 Highly Lossy w R L Near Lossless w Lossless case : x = Near Lossless: x << 1 Highly Lossy: x >> 1 w 33

34 Loss of Transmission Lines For Lossless case: a Z L C L C Time delay T L C Z For Near Lossless case: a 2 L R L C L C / C F HG L NM 1 Time delay T x O QP R j 2wL L C I KJ L 1 where C 2T / R C jwc 34

35 Loss of Transmission Lines For highly loss case: (RC transmission line) a Z wr C 2 wr C 2 R 2wC 1 [ 1 ] 2x 1 [ 1 ] 2x 1 [ 1 ] 2x That s why telephone company terminate the lines with 6 ohm Nonlinear phase relationship with f introduces signal distortion Example of RC transmission line: AWG 24 telephone line in home Z F HG R iwl ( w) 648( 1 j) jwc where R. 42 / in L 1nH / in C 1pF / in 1/ 2 I KJ w 1, rad / s( 16Hz) : voice band 35

36 Loss of Transmission Lines ( Dielectric Loss) The loss of dielectric loss is described by the loss tangent tan D G FR4 PCB tan D 35. wc GZ a D ( wc tan DZ) / 2 f tan D LC 2 36

37 Loss of Transmission Lines (Skin Effect) Skin Effect DC resistance AC resistance 37

38 Loss of Transmission Lines (Skin Effect) s 1 2 a w Rw 1 length w ( ) area NOTE: In the near lossless region ( the characteristic impedance Z is not much affected by the skin effect R / wl 1), R(w) w R( w) / wl ( 1/ w) 1 38

39 Loss of Transmission Lines (Skin Effect) f (MHz) 1 s f R s ( ) Trace resistance um 4.7um 3.3um 2.4um 1.9um 1.7um 1.5um 2.6m ohm 3.7m ohm 5.2m ohm 7.4m ohm 9.m ohm 1.8m ohm 11.6m ohm ohm ohm ohm ohm ohm ohm ohm 6mil Cu 17um Skin depth resistance R = s = H / m 7 ( Cu) = S / m Length of trace = 2cm f ( ) 39

40 Loss Example: Gigabit differential transmission lines For comparison: (Set Conditions) 1. Differential impedance = 1 2. Trace width fixed to 8mil 3. Coupling coefficient = 5% 4. Metal : 1 oz Copper Question: 1. Which one has larger loss by skin effect? 2. Which one has larger loss of dielectric? 4

41 Loss Example: Gigabit differential transmission lines Skin effect loss 41

42 Loss Example: Gigabit differential transmission lines Skin effect loss Why? 42

43 Loss Example: Gigabit differential transmission lines Look at the field distribution of the common-mode coupling Coplanar structure has more surface for current flowing 43

44 Loss Example: Gigabit differential transmission lines How about the dielectric loss? Which one is larger? 44

45 Loss Example: Gigabit differential transmission lines The answer is dual stripline has larger loss. Why? The field density in the dielectric between the trace and GND is higher for dual stripline. 45

46 Loss Example: Gigabit differential transmission lines Which one has higher ability of rejecting common-mode noise? 46

47 Loss Example: Gigabit differential transmission lines The answer is coplanar stripline. Why? 47

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52 Intuitive concept to determine Z and T d How physical dimensions affect impedance and delay Sensitivity is defined as percent change in impedance per percent change in line width, log-log plot shows sensitivity directly. Z is mostly influenced by w / h, the sensitivity is about 1%. It means 1% change in w / h will cause 1% change of Z The sensitivity of Z to changes in is about 4% r 52

53 Intuitive concept to determine Z and T d Striplines impedance Delay 53

54 Ground Perforation: BGA via and impedance 54

55 Ground Perforation: Cross-talk (near end) 55

56 Ground Perforation : Cross-talk (far end) 56

57 Example(II): Transmission line on non-ideal GND Reasons for splits or slits on GND planes 57

58 Example(II): Transmission line on non-ideal GND 58

59 Example(II): Transmission line on non-ideal GND 59

60 Example(II): Transmission line on non-ideal GND 6

61 Example(II): Transmission line on non-ideal GND 61

62 Example(II): Transmission line on non-ideal GND 62

63 Example(II): Transmission line on non-ideal GND 63

64 Input side 64

65 Output side 65

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69 Example: Rambus RDRAM and RIMM Design RDRAM Signal Routing 69

70 Example: Rambus RDRAM and RIMM Design Power: VDD = 2.5V, Vterm = 1.8V, Vref = 1.4V Signal:.8V Swing: Logic -> 1.8V, Logic 1 -> 1.V 2x4MHz CLK: 1.25ns timing window, 2ps rise/fall time Timing Skew: only allow 15ps - 2ps Rambus channel architecture: (3 controlled impedance and matched transmission lines) Two 9-bit data buses (DQA and DQB) A 3-bit ROW bus A 5-bit COL bus CTM and CFM differential clock buses 7

71 Example: Rambus RDRAM and RIMM Design RDRAM Channel is designed for 28 +/- 1% Impedance mismatch causes signal reflections Reflections reduce voltage and timing margins PCB process variation -> Z variation -> Channel error 71

72 Example: Rambus RDRAM and RIMM Design Intel suggested coplanar structure Ground flood & Stitch Intel suggested strip structure Ground flood & Stitch 72

73 Example: Rambus RDRAM and RIMM Design PCB Parameter sensitivity: H tolerance is hardest to control W & T have less impact on Z 73

74 Example: Rambus RDRAM and RIMM Design How to design Rambus channel in RIMM Module with uniform Z = 28 ohm?? How to design Rambus channel in RIMM Module with propagation delay variation in +/- 2ps?? 74

75 Example: Rambus RDRAM and RIMM Design Impedance Control: (Why?) Loaded trace Unloaded trace Connector 75

76 Example: Rambus RDRAM and RIMM Design Multi-drop Buses Unloaded Z Stub Device input Capacitance C d Equivalent loaded Z L Electric pitch L A Multidrop Bus Z L L C T C L L L L Z 2 28 (for Rambus design) where C is the per - unit - length equivalent capacitance at length L, T including the loading capacitance and the unloaded trace capacitance C is the loading capacitance including the device input capacitance C L d, the stub trace capacitance, and the via effect. 76

77 Example: Rambus RDRAM and RIMM Design In typical RIMM module design stub via Device input capacitance If C L. 2pF +.1pF + 2.2pF, and If you design unloaded trace Z the electric pitch L = 7.6mm to reach loaded Z 56 L 28 L C T Z psec / mm = 379 ph / mm = 9.5 ph / mil CL L 2. 5pF 379 ph / mm. 475 pf / mm 2 2 L Z 7. 6mm 56 L Z L C T 77

78 Example: Rambus RDRAM and RIMM Design Modulation trace Device pitch = Device height + Device space Electrical pitch L is designed as L C Z L 2 L ( Z Z 2 Z 2 L ) If device pitch > electric pitch, modulation trace of 28ohm should be used. Modulation trace length = Device pitch Electric pitch 78

79 Example: Rambus RDRAM and RIMM Design Effect of PCB parameter variations on three key module electric characteristics 79

80 Example: Rambus RDRAM and RIMM Design Controlling propagation delay: Bend compensation Via Compensation Connector compensation Bend Compensation Rule of thumb:.3ps faster delay of every bend Solving strategies: 1. Using same numbers of bends for those critical traces(difficult) 2. Compensate each bend by a.3ps delay line. 8

81 Example: Rambus RDRAM and RIMM Design Via Compensation (delay) For a 8 layers PCB, a via with 5mil length can be modeled as (L, C) = (.485nH,.385pF). Delay T LC 137. psec Impedance Z = 1 LC 38 Inductive Rule of thumb: delay of a specific via depth can be calculated by scaling the inductance value which is proportional to via length. 3mil 3mil via has delay psec 5mil This delay difference can be compensated by adding a 1.566mm to the unloaded trace (56 ) 81

82 Example: Rambus RDRAM and RIMM Design Via Compensation (impedance) 82

83 Example: Rambus RDRAM and RIMM Design Connector Compensation 83

84 Example: EMI resulting from a trace near a PCB edge Experiment setup and trace design 84

85 Example: EMI resulting from a trace near a PCB edge Measurement Setup 85

86 Example: EMI resulting from a trace near a PCB edge EMI caused by Common-mode current : magnetic coupling Measured by current probe 86

87 Example: EMI resulting from a trace near a PCB edge EMI measured by the monopole : E field Low effect at high frequency 87

88 Example: EMI resulting from a trace near a PCB edge Trace height effect on EMI 88

89 Reference 1. Howard W. Johnson, High-speed digital design, Prentice-Hall, Ron K. Poon, Computer Circuits Electrical Design, Prentice-Hall, David M. Pozar, Microwave Engineering, John Wiley & Sons, William J. Dally, Digital System Engineering, Cambridge, Rambus, Direct Rambus RIMM Module Design Guide, V..9,