MC10H Bit Arithmetic Logic Unit/ Function Generator
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1 C0H8 4Bit Arithmetic Logic Unit/ unction Generator The C0H8 is a highspeed arithmetic logic unit capable of performing 6 logic operatio and 6 arithmetic operatio on two fourbit words. ull internal carry is incorporated for ripple through operation. Arithmetic logic operatio are selected by applying the appropriate binary word to the select inputs (S0 through S3) as indicated in the tables of arithmetic/logic functio. Group carry propagate ( ) and carry generate ( ) are provided to allow fast operatio on very long words using a second order lookahead. The internal carry is enabled by applying a low level voltage to the mode control input (). When used with the C0H79, fullcarry lookahead, as a second order lookahead block, the C0H8 provides highspeed arithmetic operatio on very long words. This 0H part is a functional/pinout duplication of the standard ECL 0K family part with 00% improvement in propagation delay and no increase in power supply current. Improved Noise argin, 50 mv (Over Operating Voltage and Temperature Range) Voltage Compeated ECL 0K Compatible CDIP L SUIX CASE 758 PDIP P SUIX CASE 7 PLCC28 N SUIX CASE 776 ARKING DIAGRAS C0H8L AWLYYWW C0H8P AWLYYWW 0H8 AWLYYWW A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week ORDERING INORATION Device Package Shipping C0H8L CDIP 5 Units/Rail C0H8P PDIP 5 Units/Rail C0H8N PLCC28 37 Units/Rail Semiconductor Components Industries, LLC, 2006 June, 2006 Rev. 8 Publication Order Number: C0H8/D
2 C0H8 S3 3 S2 5 7 S0 4 LOGIC DIAGRA 2 0 B0 20 A B2 A B3 9 8 A V CC = Pin V CC2 = Pin V EE = Pin 2 2
3 C0H LOGIC DIAGRA S0 S2 S3 A0 B0 A2 B2 A3 B UNCTION SELECT TABLE unction Select S3 S2 S0 Logic unctio is High C = D.C. Arithmetic Operation is Low is low L L L L = A = A L L L H = A + B = A plus (A B) L L H L = A + B = A plus (A B) L L H H = Logical = A times 2 L H L L = A B = (A + B) plus 0 L H L H = B = (A + B) plus (A B) L H H L = A B = A plus B L H H H = A + B = A plus (A + B) H L L L = A B = (A + B) plus 0 H L L H = A B = A minus B minus H L H L = B = (A + B) plus (A B) H L H H = A + B = A plus (A + B) H H L L = Logical 0 = minus (two s complement) H H L H = A B = (A B) minus H H H L = A B = (A B) minus H H H H = A = A minus DIP PIN ASSIGNENT V CC V CC C N 4 2 A0 C N B B3 9 6 A2 A3 0 5 S2 B2 4 S0 V EE 2 3 S3 Pin assignment is for DualinLine Package. or PLCC pin assignment, see the Pin Conversion Tables on page 8 of the ON Semiconductor ECL Data Book (DL22/D). AXIU RATINGS Symbol Characteristic Rating Unit V EE Power Supply (V CC = 0) 8.0 to 0 Vdc V I Input Voltage (V CC = 0) 0 to V EE Vdc I out Output Current Continuous 50 ma Surge 00 T A Operating Temperature Range 0 to +75 C T stg Storage Temperature Range Plastic Ceramic 55 to to +65 C C 3
4 C0H8 ELECTRICAL CHARACTERISTICS (V EE = 5.2 V ±5.0%) (See Note.) Characteristic Symbol in ax in ax in ax Unit Power Supply Current I E ma Input Current High I inh μa Pin 22 Pi 4,23 Pi 3,5,7 Pi 0,6,8,2 Pi 9,,9, Input Current Low Pi 9, 322 I inl 0.3 μa High Output Voltage V OH Vdc Low Output Voltage V OL Vdc High Input Voltage V IH Vdc Low Input Voltage V IL Vdc. Each ECL 0H series circuit has been designed to meet the dc specificatio shown in the test table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and traverse air flow greater than 500 Ifpm is maintained. Outputs are terminated through a 50ohm resistor to volts. AC PARAETERS AC Switching Characteristics 0 C +25 C +75 C Characteristic Symbol Input Output Conditio in ax in ax in ax Unit t+ +, t t+, t t+ +, t+, t +, t t+, t t+ +, t+, t +, t t+, t t+ +, t t+, t t+ +, t t+, t t+, t + t+, t t+ +, t + t+, t t+ +, t t+, t t+ +, t t+, t t+, t + t+, t t+ +, t+ t+, t t+, t + t+, t t +, t+ t+, t t+, t + t+, t t+, t + t+, t A0,,A2,A3 A0,,A2,A3 A0 S0,S3 S0,S A0,A2,A3, A0,A2,A3, A0,A2,A3, A0,A2,A3, S3, S3, S0, S0, S3, S3, S3, S3,,, Logic high level (+. Vdc) applied to pi listed. All other input pi are left floating or tied to +0.3 Vdc. V CC = V CC2 = + Vdc, V EE = 3.2 Vdc 4
5 C0H8 PACKAGE DIENSIONS PLCC28 N SUIX PLASTIC PLCC PACKAGE CASE ISSUE D N Y BRK B (0.80) T L S N S U (0.80) T L S N S D L Z 28 V W D X VIEW DD G 0.00 (0.250) S T L S N S Z A R (0.80) T L S N S (0.80) T L S N S H (0.80) T L S N S C E K G G J VIEW S (0.00) T SEATING PLANE K (0.80) T L S N S 0.00 (0.250) S T L S N S VIEW S NOTES:. DATUS L,, AND N DETERINED WHERE TOP O LEAD SHOULDER EXITS PLASTIC BODY AT OLD PARTING LINE. 2. DIENSION G, TRUE POSITION TO BE EASURED AT DATU T, SEATING PLANE. 3. DIENSIONS R AND U DO NOT INCLUDE OLD LASH. ALLOWABLE OLD LASH IS 0.00 (0.250) PER SIDE. 4. DIENSIONING AND TOLERANCING PER ANSI Y, CONTROLLING DIENSION: INCH. 6. THE PACKAGE TOP AY BE SALLER THAN THE PACKAGE BOTTO BY UP TO 0.02 (0.300). DIENSIONS R AND U ARE DETERINED AT THE OUTEROST EXTREES O THE PLASTIC BODY EXCLUSIVE O OLD LASH, TIE BAR BURRS, GATE BURRS AND INTERLEAD LASH, BUT INCLUDING ANY ISATCH BETWEEN THE TOP AND BOTTO O THE PLASTIC BODY. 7. DIENSION H DOES NOT INCLUDE DABAR PROTRUSION OR INTRUSION. THE DABAR PROTRUSION(S) SHALL NOT CAUSE THE H DIENSION TO BE GREATER THAN (0.940). THE DABAR INTRUSION(S) SHALL NOT CAUSE THE H DIENSION TO BE SALLER THAN (0.635). INCHES ILLIETERS DI IN AX IN AX A B C E G BSC.27 BSC H J K R U V W X Y Z G K
6 C0H8 T SEATING PLANE A 3 G E G D PL 0.25 (0.00) T A A 2 D PL 3 2 N N B K C 0.25 (0.00) T PACKAGE DIENSIONS CDIP L SUIX CERAIC DIP PACKAGE CASE ISSUE A B L P K PDIP P SUIX PLASTIC DIP PACKAGE CASE 703 ISSUE D A C T L J J PL SEATING PLANE NOTE 0.25 (0.00) T B NOTES:. DIENSIONING AND TOLERANCING PER ANSI Y, CONTROLLING DIENSION: INCH. 3. DIENSION L TO CENTER O LEADS WHEN ORED PARALLEL. INCHES ILLIETERS DI IN AX IN AX A B C D G 0.00 BSC 2.54 BSC J K L N P NOTES:. CHAERED CONTOUR OPTIONAL. 2. DIENSION L TO CENTER O LEADS WHEN ORED PARALLEL. 3. DIENSIONING AND TOLERANCING PER ANSI Y, CONTROLLING DIENSION: INCH. INCHES ILLIETERS DI IN AX IN AX A B C D E BSC.27 BSC G 0.00 BSC 2.54 BSC J K L BSC 7.62 BSC N ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, coequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specificatio can and do vary in different applicatio and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any licee under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applicatio intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless agait all claims, costs, damages, and expees, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INORATION LITERATURE ULILLENT: Literature Distribution Center for ON Semiconductor P.O. Box 563, Denver, Colorado 8027 USA Phone: or Toll ree USA/Canada ax: or Toll ree USA/Canada orderlit@oemi.com N. American Technical Support: Toll ree USA/Canada Europe, iddle East and Africa Technical Support: Phone: Japan Customer ocus Center Phone: ON Semiconductor Website: Order Literature: or additional information, please contact your local Sales Representative C0H8/D
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More informationIs Now Part of To learn more about ON Semiconductor, please visit our website at
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