MC14175B. MARKING DIAGRAMS. MAXIMUM RATINGS (Voltages Referenced to V SS ) (Note 2.) ORDERING INFORMATION PDIP 16 P SUFFIX CASE 648
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1 The MC14175B quad type D flip flop is cotructed with MOS P channel and N channel enhancement mode devices in a single monolithic structure. Each of the four flip flops is positive edge triggered by a common clock input (C). An active low reset input (R) asynchronously resets all flip flops. Each flip flop has independent Data (D) inputs and complementary outputs (Q and Q). These devices may be used as shift register elements or as type T flip flops for counter and toggle applicatio. Complementary Outputs Static Operation All Inputs and Outputs Buffered Diode Protection on All Inputs Supply Voltage Range = 3.0 Vdc to 18 Vdc Output Compatible with Two Low Power TTL Loads or One Low Power Schottky TTL Load Functional Equivalent to TTL MAXIMUM RATINGS (Voltages Referenced to V SS ) (Note 2.) Symbol Parameter Value Unit V DD DC Supply Voltage Range 0.5 to V V in, V out Input or Output Voltage Range (DC or Traient) 0.5 to V DD V I in, I out P D Input or Output Current (DC or Traient) per Pin Power Dissipation, per Package (Note 3.) ±10 ma 500 mw T A Ambient Temperature Range 55 to +125 C T stg Storage Temperature Range 65 to +150 C T L Lead Temperature (8 Second Soldering) 260 C 2. Maximum Ratings are those values beyond which damage to the device may occur. 3. Temperature Derating: Plastic P and D/DW Packages: 7.0 mw/c From 65C To 125C This device contai protection circuitry to guard agait damage due to high static voltages or electric fields. However, precautio must be taken to avoid applicatio of any voltage higher than maximum rated voltages to this high impedance circuit. For proper operation, V in and V out should be cotrained to the range V SS (V in or V out ) V DD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either V SS or V DD ). Unused outputs must be left open. A WL, L YY, Y WW, W PDIP 16 P SUFFIX CASE 648 SOIC 16 D SUFFIX CASE 751B SOEIAJ 16 F SUFFIX CASE 966 = Assembly Location = Wafer Lot = Year = Work Week ORDERING INFORMATION MARKING DIAGRAMS Device Package Shipping MC14175BCP PDIP /Box MC14175BD SOIC 16 48/Rail MC14175BDR2 SOIC /Tape & Reel 1. For ordering information on the EIAJ version of the SOIC packages, please contact your local ON Semiconductor representative MC14175BCP AWLYYWW 14175B AWLYWW MC14175B ALYW MC14175BF SOEIAJ 16 See Note 1. MC14175BFEL SOEIAJ 16 See Note 1. Semiconductor Components Industries, LLC, 2000 August, 2000 Rev. 4 1 Publication Order Number: MC14175B/D
2 PIN ASSIGNMENT BLOCK DIAGRAM TRUTH TABLE Inputs Outputs Clock Data Reset Q Q X 1 Q Q X X X = Don t Care No Change 2
3 ELECTRICAL CHARACTERISTICS (Voltages Referenced to V SS ) ÎÎ 55C 25C ÎÎ 125C V DD Î Characteristic Î Symbol Vdc Min MaxÎ Min Typ (4.) Î Max Min Max Unit Î Output Voltage 0 Level Î V OL Î 0 Î Vdc V Î in = V DD or Î 1 Level V OH ÎÎ 5.0 Î V in = 0 or V DD Î Î 9.95 Vdc Input Voltage 0 Level V Î (V O = 4.5 or 0.5 Vdc) Î IL Vdc 5.0 Î (V O = 9.0 or 1.0 Vdc) Î Î (V O = 13.5 or 1.5 Vdc) Level V Î (V O = 0.5 or 4.5 Vdc) Î IH Vdc 5.0 Î (V O = 1.0 or 9.0 Vdc) Î Î 7.0 (V O = 1.5 or 13.5 Vdc) Output Drive Current I Î (V OH = 2.5 Vdc) Source Î OH madc Î Î 1.7 Î (V OH = 4.6 Vdc) Î Î 0.36 (V Î OH = 9.5 Vdc) (V OH = 13.5 Vdc) Î Î 2.4 Î (V OL = 0.4 Vdc) Sink Î I OL 5.0 Î (V OL = 0.5 Vdc) Î Î 0.9 madc (V OL = 1.5 Vdc) ÎÎ Î Input Current I in 15 ± 0.1 ± ± 0.1 ± 1.0 µadc Input Capacitance C Î (V in = 0) Î in Î Î 5.0Î 7.5 Î pf Î Quiescent Current Î I DD 5.0 Î (Per Package) Î Î 0.010Î µadc Total Supply Current (5.) (6.) I Î (Dynamic plus Quiescent, Î T 5.0 I 10 ÎÎ T = (1.7 µa/khz) f + I DD µadc I T = (3.4 µa/khz) f + I DD Per Package) 15 I Î (C L Î T = (5.0 µa/khz) f + I DD = 50 pf on all outputs, all Î buffers switching) 4. Data labelled Typ is not to be used for design purposes but is intended as an indication of the IC s potential performance. 5. The formulas given are for the typical characteristics only at 25C. 6. To calculate total supply current at loads other than 50 pf: I T (C L ) = I T (50 pf) + (C L 50) Vfk where: I T is in µa (per package), C L in pf, V = (V DD V SS ) in volts, f in khz is input frequency, and k =
4 SWITCHING CHARACTERISTICS (7.) (C L = 50 pf, T A = 25C) Î V Î All Types DD Characteristic ÎÎ Symbol Î Vdc Î Min Î Typ (8.) Î Max Unit Output Rise and Fall Time t t TLH, t THL = (1.35 /pf) C L ÎÎ TLH, t THL Î Î Î t TLH, t THL = (0.6 /pf) C L + 20 ÎÎ 10 Î Î 50 Î 100 t TLH, t THL = (0.4 /pf) C L Propagation Delay Time Clock to Q, Q t t PLH, t PHL = (0.9 /pf) C L ÎÎ PLH, t PHL Î 5.0 Î Î 220 Î 400 t PLH, t PHL = (0.36 /pf) C L + 72 ÎÎ 10 Î Î 90 Î 160 t PLH, t PHL = (0.26 /pf) C L Î Propagation Delay Time Reset to Q, Q t PHL, t PLH Î Î Î t PHL = (0.9 /pf) C L ÎÎ 5.0 Î Î 325 Î 500 t PHL = (0.36 /pf) C L t PHL = (0.26 /pf) C L + 87 ÎÎ 15 Î Î 100 Î 150 Clock Pulse Width ÎÎ t WH Î 5.0 Î 250 Î 110 Î Î 10 Î 100 Î 45 Î Î Reset Pulse Width t WL Î Î Î Î 10 Î 80 Î 40 Î Clock Pulse Frequency f Î cl mhz Î 10 Î Î 11 Î 5.0 Î 15 Î Î 14 Î 6.5 Clock Pulse Rise and Fall Time t Î TLH, t THL s Î Î Î Î 15 Î Î Î 4.0 Data Setup Time ÎÎ t su Î 5.0 Î 120 Î 60 Î Î 15 Î 40 Î 20 Î Data Hold Time ÎÎ t h Î 5.0 Î 80 Î 40 Î Reset Removal Time ÎÎ t rem Î 5.0 Î 250 Î 125 Î Î 10 Î 100 Î 50 Î 7. The formulas given are for the typical characteristics only at 25C. 8. Data labelled Typ is not to be used for design purposes but is intended as an indication of the IC s potential performance
5 TIMING DIAGRAM FUNCTIONAL BLOCK DIAGRAM 5
6 PACKAGE DIMENSIONS H A G B F C S K D 16 PL PDIP 16 P SUFFIX PLASTIC DIP PACKAGE CASE ISSUE R T J L M T G A D 16 PL K B C SOIC 16 D SUFFIX PLASTIC SOIC PACKAGE CASE 751B 05 ISSUE J P 8 PL M R X 45 J F 6
7 PACKAGE DIMENSIONS e Z D b E A H E A 1 SOEIAJ 16 F SUFFIX PLASTIC EIAJ SOIC PACKAGE CASE ISSUE O VIEW P M L E Q 1 L DETAIL P c 7
8 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, coequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specificatio can and do vary in different applicatio and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any licee under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applicatio intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless agait all claims, costs, damages, and expees, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. PUBLICATION ORDERING INFORMATION NORTH AMERICA Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado USA Phone: or Toll Free USA/Canada Fax: or Toll Free USA/Canada ONlit@hibbertco.com Fax Respoe Line: or Toll Free USA/Canada N. American Technical Support: Toll Free USA/Canada EUROPE: LDC for ON Semiconductor European Support German Phone: (+1) (Mon Fri 2:30pm to 7:00pm CET) ONlit german@hibbertco.com French Phone: (+1) (Mon Fri 2:00pm to 7:00pm CET) ONlit french@hibbertco.com English Phone: (+1) (Mon Fri 12:00pm to 5:00pm GMT) ONlit@hibbertco.com EUROPEAN TOLL FREE ACCESS*: *Available from Germany, France, Italy, UK CENTRAL/SOUTH AMERICA: Spanish Phone: (Mon Fri 8:00am to 5:00pm MST) ONlit spanish@hibbertco.com ASIA/PACIFIC: LDC for ON Semiconductor Asia Support Phone: (Tue Fri 9:00am to 1:00pm, Hong Kong Time) Toll Free from Hong Kong & Singapore: ONlit asia@hibbertco.com JAPAN: ON Semiconductor, Japan Customer Focus Center Nishi Gotanda, Shinagawa ku, Tokyo, Japan Phone: r14525@oemi.com ON Semiconductor Website: For additional information, please contact your local Sales Representative. 8 MC14175B/D
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