STSPIN32F0A advanced 3-phase BLDC driver with embedded STM32 MCU single shunt evaluation board. Description
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1 STEVALSPIN0 STSPINF0A advanced phase BLDC driver with embedded STM MCU single shunt evaluation board Data brief Applications Smart manufacturing equipment Battery powered home appliances and pumps Fans Drones Power tools Features Input voltage from 7 V to V Output current up to Arms Power stage based on STD0NF7 MOSFETs Embedded. V buck regulator Embedded V LDO regulator Single shunt current sensing Digital Hall sensors and encoder input Overcurrent comparator Bus voltage sensing Fully compatible with STM PMSM FOC software development kit step sensorless and sensored firmware supported Embedded STLINK/V Easy user interface with buttons and trimmer STM FW boot loader supported RoHS compliant Description The STEVALSPIN0 threephase brushless DC motor driver board is an evaluation board based on the STSPINF0A and STD0NF7 MOSFETs. It provides an affordable and easytouse solution for the implementation of low voltage motor driving applications. The board is designed for sensored or sensorless vector control FOC and sixstep algorithms with single shunt sensing. November 07 DocID009 Rev /7 For further information contact your local STMicroelectronics sales office
2 BOURNS 8G0LF J0 00 R 00K R 0R C UF TP TP VM VREG C.7NF C 0NF TP9 TPSMDMM PA JP SPEED L uh C0 7UF C 0UF SW C 00NF D STPS00Z 0808 USER TP OPP OPN OPO PF0 PF PA0 PA R7 C 00NF 00R U R 0R C NF C 00NF OPP OPN OPO PF0 PF VREG VM SW A PA0 PA DL YELLOW STSPINF0A SW USER PF0 PF 0808 R 0K LSU VBOO TU OUTU HSU LSV VBOO TV 0 OUTV 9 HSV LSW 8 VBOO TW 7 OUTW HSW R8 00R J9 JUMPER 00 C7 00NF C8 00NF C9 00NF R 0R DL YELLOW C NF LSU RESET OUTU HSU LSV OUTV HSV LSW OUTW HSW SW 0808 R 00R R 9K C.NF TP R 0R DL RED STEVALSPIN0 Figure : STEVALSPIN0 schematic ( of ) SWD_IO SWD_CLK PA UART_TX UART_RX OPP OPN OPO PA PA PA PB PB7 BOO T0 RESE RVED GND OPP OPN OPO OCCOMP OPP OPN OPO TESTMODE PB PA7 PA PA PA PA PA OCC OMP OPP OPN OPO PB GPIO_BEMF CURR ENT_REF PA PA PA PA EPA D PA PA SWD_CLK /7 DocID009 Rev
3 STEVALSPIN0 DocID009 Rev /7 Figure : STEVALSPIN0 schematic ( of ) S7R R0 R7 OUTU 0R R9 0K R TP HO 0NF C9 0µF M D R R 0R R7 R HOLE_.MM_ HO 80R R9 R 0R VM LSV HSU SENSEP C C _ 8WS 00 0NF LE_.MM N D8 K R OUTW TP OPTICAL_TARGET 0µF C JP7 0µF 0PF J GX_xx 00 0PF M _ 0.0R HO R R Q 0K R D 8WS JP Q LE_.MM M C C7 R8 R R8 K 000 PA 8WS LE_.MM PA TP0 8WS 80R LSU JUMPER M8 LSW R7 K M J 9000 D7 C 0PF _ DL RED S7R R R D 8WS C0 M Q OPTICAL_TARGET Q R0 R 80R R8 PA0 R 0R S7R 8WS J 9000 TP7 D R R Q 00JP C8 0µF J 9000 R 0.0R JP Q SENSEN N R M R 0R OUTV C 0NF OPTICAL_TARGET M7 JP 0R R HSV S7R 0K R HSW R9
4 CURR ENT_REF GPIO _BE M F SE NSE N SE NSE P OPN OPO OPP OPN OPO OPP OUTU OUTV OUTW PA 0 PA PA TP R 8.K R R7 K R 0K TPS M DM M R9 0R J R9 K D9 BA T0KFILM 0K R8 R.K C.K C 8PF 8PF D JUM PE R BA T0KFILM R9 K R 0 R C9 00 NF JP9 R.K J C 00 PF R0.K R7 JUM PE R TP8 TPS M DM M R8 8K D0 BA T0KFILM D BA T0KFILM TP TPS M DM M R 8K JP0 PA R 0K D R BA T0KFILM.K D BA T0KFILM OPN OPO OPP C 8PF JP SE NSE P JUM PE R JP8 00 R.7K TP TPS M DM M C 0 PF R 9.K OCREF VB US R0 9 K D OC Comp OCC OM P BA T0KFILM C8.7NF PB Feedback OC Figure : STEVALSPIN0 schematic ( of ) STEVALSPIN0 STEP FOC R.K K Jumper Jumper D Jumper D /7 DocID009 Rev
5 SWD_CLK SWD_IO J8 R 00R JUMPE R D D 00 V_STLINK J R7.7K STLINK FW LOAD V_STLINK V_STLINK V_STLINK UART_TX UART_RX RX R TX C 0PF V_STLINK C9 00 NF C 0NF V_STLINK R7 0K TP S7R STEVALSPIN0 Figure : STEVALSPIN0 schematic ( of ) USB DM 0K U PCTAMPERRTC PCOSC_IN PCOSC_OUT J 00 LED_STLINK TP TP7 USB _VCC USB DP ID USB _G ND R 0R R 0R R 00R A T_ LD T_JTCK T_JTMS K A REDGREEN K C0 00NF U I/O# GND I/O# USBLCSC I/O# VB US I/O# Q7 R7 USB_DM USB_RENU M R7.7K R0 00 K C7 00 NF R USB_DP.K C 0PF JP N X 8MHz C 00 NF R K J R R 0R R0 0R C7 00 NF STLINK_TX STLINK_RX C8 00 NF T_JTCK LED_STLINK USB_DM USB_DP FM_SWDIO FM_SWCLK USB_RENU M R70 00 K U PA0WKUP PA PA PA PA PA PA PA7 PA8 PA9 PA0 PA PA PA PA PA OSCIN/PD0 OSCOUT/PD BOOT0 NRST VBAT 8 _ 9 A C0 UF STMF0 CBT C 00NF TP S7R VIN INH IBIT BYPAS S LD98MR OUT GND PB0 PB PB/BOOT PB PB PB7 PB/JNTRST 0 PB/JTDO 9 PB8 PB9 PB0 PB PB PB PB PB VSS_ VSS_ VSS_ VSSA C 00NF T_ T_JTMS T_JTCK SWDIO R7 R7 C UF 00 R R8.7K R9.7K DocID009 Rev /7
6 Revision history STEVALSPIN0 Revision history Table : Document revision history Date Version Changes 9Sep07 Initial release. 0Nov07 Modified title in first page /7 DocID009 Rev
7 STEVALSPIN0 IMPORTANT NOTICE PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries ( ST ) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. 07 STMicroelectronics All rights reserved DocID009 Rev 7/7
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