CYPRESS SEMICONDUCTOR

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1 CYRESS SEMICONDUCTOR RODUCT CHANGE NOTIFICATION CN: DATE: 8/16/2002 Subject: SoC Silicon Revision D fixed Revision AC Errata To: Description of change: The following Silicon Revision AC errata are now fixed in Silicon Revision D. 1) Serial receiver status bits cleared by RAM reads 2) Initial Flash access may be corrupted when waking from sleep 3) Using internal Low Speed Oscillator in conjunction with sleep may cause a reset. 4) Use valid power supply ranges to avoid 4.1 volt flash operating mode transition. Benefit of change: Fewer firmware workarounds needed which will result in faster firmware development. Vcc operating range is now continuous from 3.0V to 5.25V for 12MHz operation. Qualification status: Qualification is complete. QT is attached for reference. Sample status: Samples are available now.

2 CYRESS SEMICONDUCTOR RODUCT CHANGE NOTIFICATION CN: DATE: 8/16/2002 Subject: SoC Silicon Revision D fixed Revision AC Errata Cypress part numbers affected: CY8C I CY8C I CY8C VI CY8C SI CY8C I CY8C VI CY8C SI CY8C AI CY8C I CY8C VI Customer part numbers affected: Approximate Implementation Date: roduction release of the new product will be implemented as per your response requirements or September 30,2002. Response Required: Sincerely, Mike Burke Director of Quality Al Laxman CN rocess Manager

3 Cypress Semiconductor roduct Qualification Report QT# VERSION 1.0 August, 2002 SoC Microcontrollers Family S4AD-5 Technology, Fab 2 CY8C25122 CY8C26233 CY8C26443 CY8C K Flash x 256 SRAM 8K Flash x 256 SRAM 16K Flash x 256 SRAM

4 CYRESS TECHNICAL CONTACT FOR QUALIFICATION DATA: Ed Russell Al Laxman Reliability Director Quality Engineering (408) (408)

5 Qual Report RODUCT QUALIFICATION HISTORY Description of Qualification urpose New Technology S4AD-5 / New roduct, rogrammable Clock Generator, CY2414ZC, its product family and bond option. Date Comp Technology Derivative S4D-5 /New Neuron Devices, CY7C53150 and CY7C53120 Jul 01 Apr New SoC CY8C25xxx/26xxx device and its product family Sept Three layer mask change to enhance functionality Jul 02

6 RODUCT DESCRITION (for qualification) Qualification urpose: Qualify New device CY8C25xxx/CY8C26xxx and its product family in Technology S4D-5 in Fab 2 Marketing art #: CY8C25122, CY8C26233, CY8C26443, CY8C26643 Device Description: 3.3V and 5.5V, Industrial, available in 8/16/20/28/48 lead DI, 20/28/-lead SOIC, 20/28/48-lead SSO and 44-lead TQF package respectively. Cypress Division: Cypress Microsystems Inc Subsidiary (CMS) WA Overall Die (or Mask) REV Level (pre-requisite for qualification): Rev. D Die Size (stepping): 91.0 mils x mils What ID markings on Die: 8C25001A TECHNOLOGY/FAB ROCESS DESCRITION S4AD-5 Number of Metal Layers: 2 Metal Composition: Metal 1: 500A Ti/6,000A Al 0.5% Cu /1,200A TiW Metal 2: 500A Ti/8,000A Al 0.5% Cu/300A TiW assivation Type and Materials: 3,000A TeOs / 6,000A Si 3 N 4 Free hosphorus contents in top glass layer(%): 0% Number of Transistors in Device: 300,000 Number of Gates in Device 50,000 Generic rocess Technology/Design Rule (µ-drawn): Single oly, Double Metal, 0.35 µm Gate Oxide Material/Thickness (MOS): SiO 2 / 110A Name/Location of Die Fab (prime) Facility: Cypress Semiconductor - Round Rock, TX Die Fab Line ID/Wafer rocess ID: Fab2, S4AD-5 ACKAGE AVAILABILITY ACKAGE 8/20/28-lead DI 48-lead DI 20/28-lead SOIC 20/28-lead SSO 48-lead SSO 44-pin TQF ASSEMBLY SITE FACILITY Omedata Indonesia Alphatec Thailand Omedata Indonesia OSE Taiwan Cypress CML-R ASE Taiwan Note: ackage Qualification details upon request.

7 MAJOR ACKAGE INFORMATION USED IN THIS QUALIFICATION ackage Designation: 283 ackage Outline, Type, or Name: 28-lead lastic-dual-in Line lastic (DI) Mold Compound Name/Manufacturer: NITTO M8000CH Mold Compound Flammability Rating: V-O per UL94 Oxygen Rating Index: >28% Lead Frame Material: Copper Lead Finish, Composition / Thickness: Solder late, 85%Sn, 15%b Die Backside reparation Method/Metallization: N/A Die Separation Method: Wafer Saw Die Attach Supplier: Ablestik Die Attach Material: 8361H Die Attach Method: Epoxy Bond Diagram Designation: Wire Bond Method: Thermosonic Wire Material/Size: Au, 1.3mil Thermal Resistance Theta JA C/W: C/W ackage Cross Section Yes/No: N/A Assembly rocess Flow: Name/Location of Assembly (prime) facility: OMEDATA Indonesia (INDNS-O) ELECTRICAL TEST / FINISH DESCRITION Test Location: OMEDATA Indonesia (INDNS-O) Fault Coverage: 100% Note: lease contact a Cypress Representative for other packages availability.

8 RELIABILITY TESTS ERFORMED ER SECIFICATION REQUIREMENT Stress/Test Test Condition (Temp/Bias) Result /F High Temperature Operating Life Early Failure Rate 1) QT #022505, QT #013507, QT # Dynamic Operating Condition, Vcc Max=5.75V, 125 C 2) QT #003605, QT # Dynamic Operating Condition, Vcc Max=5.75V, 150 C High Temperature Operating Life Latent Failure Rate 1) QT # , QT #003605, QT # Dynamic Operating Condition, Vcc Max=5.75V, 125 C Temperature Cycle 1) QT #013507, QT #003605, QT # MIL-STD-883C, Method 1010, Condition C, -65 C to 150 C 2) QT # recondition: JESD22 Moisture Sensitivity MSL 3 3) QT # Hrs., 30 C/60%RH+3IR-Reflow, 235 C+5, -0 C recondition: JESD22 Moisture Sensitivity MSL Hrs, 85C/85%RH+3IR-Reflow, 235 C+5, 0 C ressure Cooker 1) QT #013507, QT #003605, QT # C, 100%RH MIL-STD-883C, Method 1010, Condition C, -65 C to 150 C 2) QT # recondition: JESD22 Moisture Sensitivity MSL Hrs., 30 C/60%RH+3IR-Reflow, 235 C+5, -0 C 3) QT # High Accelerated Saturation Test (HAST) recondition: JESD22 Moisture Sensitivity MSL Hrs, 85C/85%RH+3IR-Reflow, 235 C+5, 0 C 1) QT #003605, QT # C, 5.5V, 85%RH recondition: JESD22 Moisture Sensitivity MSL 3 2) QT # C, 3.63V, 85%RH 192 Hrs., 30 C/60%RH+3IR-Reflow, 235 C+5, -0 C recondition: JESD22 Moisture Sensitivity MSL Hrs, 85C/85%RH+3IR-Reflow, 235 C+5, 0 C

9 RELIABILITY TESTS ERFORMED ER SECIFICATION REQUIREMENT (continuation) Stress/Test Test Condition (Temp/Bias) Result /F Data Retention 1) QT #013507, QT #003605, QT # C ± 5 C no bias High Temperature Steady State Life 1) QT # Electrostatic Discharge Human Body Model (ESD-HMB) Electrostatic Discharge Charge Device Model (ESD-CDM) Age Bond Strength Acoustic Microscopy Current Density Low Temperature Operating Life Sem X-Section Alpha article Sensitivity Endurance Test 150 C, 363V, Vcc Max 1) QT #022505, QT #013507, 2,200V 2) QT #003605, QT #010702, 2,000V MIL-STD-883, Method ) QT #022505, QT #013507, QT #003605, QT # V Cypress Spec ) QT #013507, QT # MIL-STD-883C, Method ) QT #003605, MSL3 2) QT #010702, MSL1 Cypress Spec ) QT # Cypress Spec ) QT # C, 4.3V, 8MHZ 1) QT #003605, QT # MIL-STD-883C, Method ) FIT = 0 Cypress Spec ) QT #013507, QT #003605, QT # MIL-STD-883C, Method 1033 Dynamic Latchup Sensitivity 1) QT # Cypress Spec Static Latchup Sensitivity 1) QT #022505, QT #013507, QT # C, ± 300mA In accordance with JEDEC 17. Cypress Spec

10 RELIABILITY FAILURE RATE SUMMARY Stress/Test Device Tested/ Device Hours # Fails Activation Energy Thermal 3 A.F Failure Rate 4 High Temperature Operating Life Early Failure Rate High Temperature Operating Life 1,2 Long Term Failure Rate 9,107 Devices 3 N/A N/A 329 M 888, 356 DHRs FITs 1 Assuming an ambient temperature of 55 C and a junction temperature rise of 15 C. 2 Chi-squared 60% estimations used to calculate the failure rate. 3 Thermal Acceleration Factor is calculated from the Arrhenius equation AF = exp E k A 1 T T1 where: of the device E A =The Activation Energy of the defect mechanism. k = Boltzmann's constant = 8.62x10-5 ev/kelvin. T 1 is the junction temperature of the device under stress and T 2 is the junction temperature at use conditions. 4 EFR Failure Rate based on QT #022505, QT #013507, QT # and QT # LFR FIT Rate based on QT #013507, QT # and QT #

11 Reliability Test Data QT #: Device Fab Lot # Assembly Lot # Assy Loc Duration Samp Rej Failure Mechanism HIGH TEM DYNAMIC OERATING LIFE-EARLY FAILURE RATE, 125C, 5.75V, Vcc Max CY8C26443 (8C26443D) INDNS CY8C26443 (8C26443D) INDNS CY8C26443 (8C26443D) INDNS ESD-CHARGE DEVICE MODEL, 500V CY8C26443 (8C26443D) /8 INDNS-0 COM 9 0 ESD-HUMAN BODY CIRCUIT ER MIL STD 883, METHOD 3015, 2,200V CY8C26443 (8C26443D) /8 INDNS-0 COM 9 0 STATIC LATCH-U TESTING, 125C, 12V, ±300mA CY8C26443 (8C26443D) /8 INDNS-0 COM 3 0 TC COND. C -65C TO 150C CY8C26443 (8C26443D) /8 INDNS CY8C26443 (8C26443D) /8 INDNS

12 Reliability Test Data QT #: Device Fab Lot # Assembly Lot # Assy Loc Duration Samp Rej Failure Mechanism HIGH TEM DYNAMIC OERATING LIFE-EARLY FAILURE RATE, 125C, 5.75V, Vcc Max CY8C26443 (8C26443A) INDNS CY8C26443 (8C26443A) INDNS ISB Failure HIGH TEM DYNAMIC OERATING LIFE-LATENT FAILURE RATE, 125C, 5.75V, Vcc Max CY8C26443 (8C26443A) INDNS CY8C26443 (8C26443A) INDNS CY8C26443 (8C26443A) INDNS CY8C26443 (8C26443A) INDNS AGE BOND STRENGTH CY8C26443 (8C26443A) INDNS-0 COM 150 ESD-CHARGE DEVICE MODEL, 500V CY8C26443 (8C26443A) CSI-R COM 9 0 CY8C26443 (8C26443A) INDNS-0 COM 9 0 ESD-HUMAN BODY CIRCUIT ER MIL STD 883, METHOD 3015, 2,200V CY8C26443 (8C26443A) CSI-R COM 9 0 CY8C26443 (8C26443A) INDNS-0 COM 9 0 STATIC LATCH-U TESTING, 125C, 12V, ±300mA CY8C26443 (8C26443A) INDNS-0 COM 3 0 DATA RETENTION, LASTIC, 150C CY8C26443 (8C26443A) INDNS CY8C26443 (8C26443A) INDNS

13 Reliability Test Data QT #: Device Fab Lot # Assembly Lot # Assy Loc Duration Samp Rej Failure Mechanism ENDURANCE TEST CY8C26443 (8C26443A) INDNS-0 COM 48 0 CY8C26443 (8C26443A) INDNS-0 COM 46 0 RESSURE COOKER TEST 121C, 100%RH CY8C26443 (8C26443A) INDNS TC COND. C -65C TO 150C CY8C26443 (8C26443A) INDNS CY8C26443 (8C26443A) INDNS CY8C26443 (8C26443A) INDNS

14 Reliability Test Data QT #: Device Fab Lot # Assy Lot # Assy Loc Duration Samp Rej Failure Mechanism ACOUSTIC-MSL3 CY7C53150-AI (7C53150A) /90 TAIWN-G COM 15 0 CY7C53150-AI(7C53150B) TAIWN-G COM 15 0 CY7C53150-AI (7C53150B) /1 TAIWN-G COM 15 0 HIGH TEM DYNAMIC OERATING LIFE-EARLY FAILURE RATE, 150C, 5.75V, Vcc Max CY7C53120-SI (7C53120B) CSI-R CY7C53120-SI (7C53120B) CSI-R HIGH TEM DYNAMIC OERATING LIFE-EARLY FAILURE RATE, 125C, 5.75V, Vcc Max CY7C53120-SI (7C53120B) CSI-R MISSING LICON CY7C53120-SI (7C53120B) /7707 CSI-R HIGH TEM DYNAMIC OERATING LIFE-LATENT FAILURE RATE, 150C, 5.75V, Vcc Max CY7C53120-SI (7C53120B) CSI-R CY7C53120-SI (7C53120B) CSI-R CY7C53120-SI (7C53120B) CSI-R UNKNOWN CY7C53120-SI (7C53120B) CSI-R ESD-CHARGE DEVICE MODEL, 500V CY7C53150-AI (7C53150B) TAIWN-G COM 9 0 HI-ACCEL SATURATION TEST, 130C, 85%RH, 5.5V, RE COND 192 Hrs., 30ºC/60%RH, MSL3 CY7C53150-AI (7C53150A) /90 TAIWN-G CY7C53150-AI (7C53150B) TAIWN-G CY7C53150-AI (7C53150B) TAIWN-G

15 Reliability Test Data QT #: Device Fab Lot # Assy Lot # Assy Loc Duration Samp Rej Failure Mechanism ESD-HUMAN BODY CIRCUIT ER MIL STD 883, METHOD 3015, 2,000V CY7C53150-AI (7C53150B) TAIWN-G COM 9 0 STATIC LATCH-U TESTING, 125C, 12V, ±300mA CY7C53150-AI (7C53150A) /90 TAIWN-G COM 3 0 CY7C53150-AI (7C53150B) TAIWN-G COM 3 0 ENDURANCE TEST, -25C/+85 CY7C53150-AI (7C53150B) TAIWN-G DATA RETENTION, LASTIC, 150C CY7C53150-AI (7C53150B) TAIWN-G CY7C53150-AI (7C53150B) /1 TAIWN-G RESSURE COOKER TEST, 121C, 100%RH), RE COND 192 HR 30ºC/60%RH, MSL3 CY7C53150-AI (7C53150A) /90 TAIWN-G CY7C53150-AI (7C53150B) TAIWN-G TC COND. C -65C TO 150C, RECONDITION 192 HR 30ºC/60%RH, MSL3 CY7C53150-AI (7C53150A) /90 TAIWN-G CY7C53150-AI (7C53150A) /90 TAIWN-G CY7C53150-AI (7C53150A) /90 TAIWN-G CY7C53150-AI (7C53150B) TAIWN-G CY7C53150-AI (7C53150B) TAIWN-G CY7C53150-AI (7C53150B) TAIWN-G CY7C53150-AI (7C53150B) /1 TAIWN-G CY7C53150-AI (7C53150B) /1 TAIWN-G CY7C53150-AI (7C53150B) /1 TAIWN-G

16 Reliability Test Data QT #: Device Fab Lot # Assy Lot # Assy Loc Duration Samp Rej Failure Mechanism ACOUSTIC-MSL1 CY2414ZC (7C841400A) /1/2 TAIWN-T COM 15 0 CY2414ZC (7C841400A) /4/5 TAIWN-T COM 15 0 CY2414ZC (7C841400A) /7/8 TAIWN-T COM 15 0 HIGH TEM DYNAMIC OERATING LIFE-EARLY FAILURE RATE, 150C, 3.8V, Vcc Max CY2414ZC (7C841400A) /1/2 TAIWN-T CY2414ZC (7C841400A) /4/5 TAIWN-T NON VISUAL CY2414ZC (7C841400A) /7/8 TAIWN-T HIGH TEM DYNAMIC OERATING LIFE-LATENT FAILURE RATE, 150C, 3.8V, Vcc Max CY2414ZC (7C841400A) /1/2 TAIWN-T CY2414ZC (7C841400A) /1/2 TAIWN-T CY2414ZC (7C841400A) /4/5 TAIWN-T CY2414ZC (7C841400A) /4/5 TAIWN-T CY2414ZC (7C841400A) /7/8 TAIWN-T CY2414ZC (7C841400A) /7/8 TAIWN-T AGE BOND STRENGTH CY2414ZC (7C841400A) /1/2 TAIWN-T COM 15 0 CY2414ZC (7C841400A) /4/5 TAIWN-T COM 15 0 CY2414ZC (7C841400A) /7/8 TAIWN-T COM 15 0 DYNAMIC LATCH-U TESTING, 11.5V CY2414ZC (7C841400A) /1/2 TAIWN-T COM 3 0 LOW TEMERATURE OERATING LIFE, -30C, 4.3V CY2414ZC (7C841400A) /1/2 TAIWN-T

17 Reliability Test Data QT #: Device Fab Lot # Assy Lot # Assy Loc Duration Samp Rej Failure Mechanism ESD-CHARGE DEVICE MODEL, 500V CY2414ZC (7C841400A) /1/2 TAIWN-T COM 9 0 CY2414ZC (7C841400A) /4/5 TAIWN-T COM 9 0 CY2414ZC (7C841400A) /7/8 TAIWN-T COM 9 0 ESD-HUMAN BODY CIRCUIT ER MIL STD 883, METHOD 3015, 2,000V CY2414ZC (7C841400A) /1/2 TAIWN-T COM 9 0 CY2414ZC (7C841400A) /4/5 TAIWN-T COM 9 0 CY2414ZC (7C841400A) TAIWN-T COM 10 0 STATIC LATCH-U TESTING, 125C, 10V, ±300mA CY2414ZC (7C841400A) /1/2 TAIWN-T COM 3 0 CY2414ZC (7C841400A) /4/5 TAIWN-T COM 3 0 CY2414ZC (7C841400A) /7/8 TAIWN-T COM 3 0 HI-ACCEL SATURATION TEST, 130C, 85%RH, 3.63V, RE COND 168 HR 85C/85%RH, MSL1 CY2414ZC (7C841400A) /1/2 TAIWN-T CY2414ZC (7C841400A) /1/2 TAIWN-T CY2414ZC (7C841400A) /4/5 TAIWN-T CY2414ZC (7C841400A) /7/8 TAIWN-T HIGH TEM STEADY STATE LIFE TEST, 150C, 3.63V CY2414ZC (7C841400A) /1/2 TAIWN-T CY2414ZC (7C841400A) /1/2 TAIWN-T ENDURANCE TEST CY2414ZC (7C841400A) /1/2 TAIWN-T COM 45 0 Reliability Test Data QT #:

18 Device Fab Lot # Assy Lot # Assy Loc Duration Samp Rej Failure Mechanism DATA RETENTION, LASTIC, 150C CY2414ZC (7C841400A) /1/2 TAIWN-T CY2414ZC (7C841400A) /1/2 TAIWN-T CY2414ZC (7C841400A) /4/5 TAIWN-T CY2414ZC (7C841400A) /4/5 TAIWN-T CY2414ZC (7C841400A) /7/8 TAIWN-T CY2414ZC (7C841400A) /7/8 TAIWN-T RESSURE COOKER TEST, 121C, 100%RH, RE COND 168 HR 85C/85%RH, MSL1 CY2414ZC (7C841400A) /1/2 TAIWN-T CY2414ZC (7C841400A) /4/5 TAIWN-T CY2414ZC (7C841400A) /7/8 TAIWN-T TC COND. C -65C TO 150C, RECONDITION 168 HRS 85C/85%RH, MSL1 CY2414ZC (7C841400A) /1/2 TAIWN-T CY2414ZC (7C841400A) /1/2 TAIWN-T CY2414ZC (7C841400A) /1/2 TAIWN-T CY2414ZC (7C841400A) /4/5 TAIWN-T CY2414ZC (7C841400A) /4/5 TAIWN-T CY2414ZC (7C841400A) /4/5 TAIWN-T CY2414ZC (7C841400A) /7/8 TAIWN-T CY2414ZC (7C841400A) /7/8 TAIWN-T CY2414ZC (7C841400A) /7/8 TAIWN-T

Cypress Semiconductor Package Qualification Report

Cypress Semiconductor Package Qualification Report Cypress Semiconductor ackage Qualification Report QT #015108 VERSION 1.0 March, 2002 24-lead SOIC ackage using NITTO M-8500 Mold Compound and Ni/d re-lated Leadframe, MSL1, 235 C Cypress hilippines (CSI-R)