Nanoscale Thermal Transport and Microrefrigerators on a Chip

Transcription

1 INVITED PAPER Nanoscale Thermal Transport and Microrefrigerators on a Chip Devices for cooling high power density and dynamic hot spots can be formed by solid-state thin films on the chip, or they could be buried in, bonded to, or mounted on substrates. By Ali Shakouri ABSTRACT In this paper we review recent advances in nanoscale thermal and thermoelectric transport with an emphasis on the impact on integrated circuit (IC) thermal management. We will first review thermal conductivity of lowdimensional solids. Experimental results have shown that phonon surface and interface scattering can lower thermal conductivity of silicon thin films and nanowires in the sub-100-nm range by a factor of two to five. Carbon nanotubes are promising candidates as thermal vias and thermal interface materials due to their inherently high thermal conductivities of thousands of W/mK and high mechanical strength. We then concentrate on the fundamental interaction between heat and electricity, i.e., thermoelectric effects, and how nanostructures are used to modify this interaction. We will review recent experimental and theoretical results on superlattice and quantum dot thermoelectrics as well as solid-state thermionic thin-film devices with embedded metallic nanoparticles. Heat and current spreading in the three-dimensional electrode configuration, allow removal of high-power hot spots in IC chips. Several III-V and silicon heterostructure integrated thermionic (HIT) microcoolers have been fabricated and characterized. They have achieved cooling up to 7 C at 100 C ambient temperature with devices on the order of 50 m in diameter. The cooling power density was also characterized using integrated thin-film heaters; values ranging from 100 to 680 W/cm 2 were measured. Response time on the order of ms has been demonstrated. Calculations show that with an improvement in material properties, hot spots tens of micrometers in diameter with heat fluxes in excess of 1000 W/cm 2 could be cooled down by 20 C 30 C. Finally we will review some of the more exotic techniques such as Manuscript received May 4, 2006; revised June 5, This work was supported by Packard Fellowship, Intel Corp., Canon Corp., DARPA HERETIC and ONR MURI Thermionic Energy Conversion Center. The author is with the Jack Baskin School of Engineering, University of California at Santa Cruz, CA USA ( ali@soe.ucsc.edu). Digital Object Identifier: /JPROC /$20.00 Ó2006 IEEE thermotunneling and analyze their potential application to chip cooling. KEYWORDS Carbon nanotubes (CNTs); embedded nanoparticles; microrefrigeration; nanoscale heat transport; nanotechnology; quantum dots; superlattices; thermal boundary resistance; thermionics; thermotunneling; thermoelectrics I. INTRODUCTION Individual micro- and nanoscale electronic devices can generate heat fluxes exceeding thousands of watts per centimeter square in very small areas on the order of micrometers in size. Typical integrated circuit (IC) chips have millions of transistors. Variations in the activity of the transistors for different functional units create hot spots only a couple of hundred micrometers in diameter that can be 10 C 40 C hotter than the rest of the chip. Most of the conventional cooling techniques can be used to cool the whole chip. Since thermal design requirements are mostly driven by peak temperatures, reducing or eliminating hot spots could alleviate the design requirements for the whole package. In existing commercial silicon chips, since the substrate thickness is several hundred micrometers, and since silicon has a high thermal conductivity, the extremely nonuniform power dissipation in individual transistors and functional units gives rise to hot spots proportional in size to the silicon substrate s thickness (a couple of hundred micrometers to millimeters). This is substantially smaller than the size of the whole chip, so hot spot removal is a key enabler for future generation IC chips. On the other hand, as the silicon wafer thickness is reduced and stacked chips or threedimensional (3-D) chips are investigated, there is less heat spreading in the bulk silicon. This can create smaller hot spots on the order of m in size with more severe temperature nonuniformity. In addition, when the device dimensions shrink enough and new materials such as Vol. 94, No. 8, August 2006 Proceedings of the IEEE 1613

2 carbon nanotubes (CNTs) are used, the conventional bulk diffusive heat equation will not be valid; moreover, boundary effects and ballistic heat conduction will need consideration. In this paper we briefly review main nanoscale heat transport issues and describe techniques to remove small hot spots in IC chips with the use of solidstate refrigerators. Nanoscale engineering of material to provide desirable properties is a key enabler for the future improvements of IC thermal management. Nanotechnology and nanometerscale engineering can be broadly defined as Bworking at atomic, molecular and supra molecular levels, in the length scale of approximately nm range, in order to understand and create materials, devices and systems with fundamentally new properties and functions due to their small structure[ [1]. The usefulness of miniaturization has been known for many years in various fields such as in microelectronics and more recently in microelectromechanical systems (MEMS). Systems with faster performance, less space, material, and energy can be realized. In addition, in the nanometer domain there are new unique effects due to quantum phenomena and enhanced surface to volume ratios [2], [3]. We will first review nanoscale thermal and thermoelectric transport and then concentrate on active solid-state devices for hot spot removal. Latest experimental results and the potential for improvementinthelongtermwillbediscussed. II. NANOSCALE THERMAL PROPERTIES Research in nanoscale thermal properties is relatively more recent compared to nanoscale electronic properties, which started in the 1960s [4]. Perhaps this is because measuring and modeling micro- and nanoscale thermal properties accurately is very difficult [5], [6]. Only recently several techniques have been introduced that allow measuring temperature and heat flow at atomic scales. Small thermocouples at the tip of atomic force microscopes [also called scanning thermal microscopy (SThM)] have been successfully used to measure temperatures with G 100-nm resolution [7]. Scanning Seebeck voltage measurements have reached 2 3 nm spatial resolution with the use of sharp heated metallic tips in ultrahigh vacuum environment [8]. Femtosecond laser technology has permitted the measurement of heat transfer and acoustic velocities in thin-film submicrometer structures [9], [10]. Thermoreflectance imaging using visible wavelengths has been used to measure the surface temperature of IC chips with submicrometer spatial resolution and mk temperature resolution [11] [15]. Heat transfer at the nanoscale may differ significantly from that in the macroand microscales. When a device or structure s dimensions are comparable to the mean free path and wavelength of heat carriers, classical laws are no longer valid and new approaches must be taken to predict heat transfer at the nanoscale. Before we continue the discussion of nanoscale heat transport and the differences with bulk heat conduction, we need to introduce the concept of phonons. A. What Are Phonons? In analyzing the random thermal vibrations of atoms in a solid, one typically uses the eigenmodes of the collective vibrations, which are called phonons. Depending on the type of these vibrations, we can have longitudinal and transverse modes. Acoustic and optical phonons refer to the case where neighboring atoms oscillate in phase or out of phase, respectively. In the later case, an atomic dipole is formed that could interact with photons, thus the name optical phonon. Electron transport in devices often generates optical phonons. Since these phonons have low group velocities, they have to decay to acoustic phonons so that heat is transported. When one area of the sample is hot, the interaction between neighboring atoms causes the random vibrations to propagate in the material. It is more intuitive to write these random vibrations in terms of the normal modes (phonons) and explain how different phonons are transported. Heat conduction is usually described by the bulk parameter of thermal conductivity, which is of great importance in electronic thermal management. It has been recognized for some time that at the microscale or at very short times, the parabolic heat conduction equation that assumes an instantaneous effect of boundaries everywhere in the domain is not a good approximation. The hyperbolic heat equation and the more general phonon Boltzmann transport equation have been investigated [16], [17], [142]. Additional parameters such as heat drag are introduced in order to take into account the finite propagation velocity of vibrations and nonequilibrium effects [18]. In practice, the heat diffusion equation and thermal conductivity parameter can still explain majority of thermal transport phenomena at nanoscale. Under high drive conditions, different populations of electrons and phonons will not be in equilibrium and one may not be able to define a single temperature. For example, in short length transistors, the strong nonequilibrium between electron and phonon populations and between optical phonons and acoustic phonons leads to submicrometer hot spots and heating in the electron gas (see the paper by Pop et al. in this special issue [19]). Ballistic electron and phonon transport without any scattering over nanometer distances also has a strong impact on heat generation in submicrometer electronic devices [20], [21]. Furthermore, at an interface between two solids, depending on the coupling between atoms, there could be an extra thermal boundary resistance (this is also called Kapitza resistance which was introduced in the 1950s for liquid helium). There is no theory that can reliably predict heat conduction across boundaries and in nanometers-thick layers [22], [23]. Sometimes, phonons are treated as particles and their transport across an interface is described using a specular or diffuse reflectance model. This depends on the roughness and scattering 1614 Proceedings of the IEEE Vol.94,No.8,August2006

3 at the interface. In some other applications, heat and phonons are treated as waves and their transport across an interface or a multilayer is described by the acoustic mismatch model. Various experimental results have been explained using these two theories [5], [24], [25]. Since thermal conductivity is an average bulk effect involving many lattice vibrations (phonons modes), it is hard to differentiate between various contributions in order to gain an accurate understanding of heat transport in nanometer structures. In the case of electron transport, charge carriers interact with both electric and magnetic fields. Effects such as Hall voltage and Shubnikov de Haas oscillations are used to measure electron effective mass, mobility, and number of free carriers. They are also used to differentiate between electrons from different bands in the solid. This has been extremely useful to study electron transport in nanometer-thick layers. Lack of similar complementary measurements in the case of phonon transport, and the added difficulty due to the fact that phonons are Bquasi[ particles(eigenmodes)thatcouldbe annihilated or created, makes detailed analysis very difficult. Very recently the phonon Hall effect under a magnetic field has been observed. This could provide a useful source of information about phonons and their transport in solids [26]. B. Thermal Transport in Thin Films Heat conduction and phonon transport along singleand polycrystalline monolayers is important for silicon-oninsulator (SOI) circuits, novel 3-D multilayer electronics, and MEMS with semiconducting or dielectric membranes. The interface between silicon and silicon dioxide film scatters phonons and can affect the thermal conductivity. For bulk material, interface effects only dominate at low temperatures where the phonon mean free path is large. However, in nanometer-scale thin films, the room temperature thermal conductivity could be significantly modified. Fig. 1 displays thermal conductivity along silicon films of different thicknesses. At sub-100-nm scales, a reduction of the conductivity by a factor of two to five comparedtobulkdataisobserved[27],[143],[162],[163]. C. Thermal Transport in Nanowires and CNTs One-dimensional (1-D) nanostructures such as CNTs and semiconductor nanowires have recently received a lot of attention [28]. Phonons in nanowires can be different from bulk material mainly because the dispersion relation could be significantly modified due to confinement. In addition, the presence of a surface can introduce surface phonon modes and scattering. On one hand, in the case of semiconducting silicon nanowires, a significant reduction in the thermal conductivity along the wire was observed due to phonon scattering at the boundaries [29]. On the other hand, CNTs with their unique geometry made of rolled two-dimensional (2-D) graphite sheets have high mechanical strength and good thermal conductivity. First Fig. 1. Thermal conductivity of silicon thin films versus film thickness at room temperature (courtesy of Prof. M. Asheghi [27], [159]). theoretical predictions for high thermal conductivity were made by Berber [30] and by Osman and Srivastava [144]. Recent calculations by Mingo and Broido have shown that some of the earlier calculations overestimated thermal conductance of CNTs [31]. An upper bound of W/m 2 K was found at room temperature. They also found that phonon transport remains ballistic over large distances. On the experimental side, the first attempts to measure thermal conductivity of a collection of CNTs gave values much lower than predicted [32], [145], [146]. This is due to weak coupling between CNTs in the array that can affect the thermal transport. Subsequent measurements by Kim et al. [33], [147] were done on single CNTs suspended between thin-film microheaters. Yu et al. [158] have recently reported that the measured thermal conductance of a 2.76-m single-wall carbon nanotube (SWCNT) is very close to the calculated ballistic thermal conductance of a 1-nm-diameter SWCNT, with an effective thermal conductivity comparable to earlier measurement results of a multiwall CNT (3000 W/mK). Fig. 2 shows the plot of the thermal conductivity of multiwall CNTs (MWCN) as a function of temperature. The T 2 temperature dependence suggests that MWCN behaves thermally as a 2-D solid. Recently, there has been a lot of research on the incorporation of CNTs arrays inside polymers, solders, or even copper in order to obtain high thermal conductivity thermal interface materials (TIMs) with good mechanical compliance properties [34]. The details of TIMs are described in the paper by Prasher in this special issue [35]. III. NANOSCALE THERMOELECTRIC PROPERTIES Conventional thermoelectric (TE) coolers are described in the article by Sharp et al. in this special issue [36]. The Peltier effect is due to the fact that electron gas carries not Vol. 94, No. 8, August 2006 Proceedings of the IEEE 1615

4 Fig. 2. Thermal conductivity of individual single-wall (SW) and multiwall (MW) CNTs as well as CNT bundles versus temperature (courtesy of Prof. L. Shi [33], [147]). only a charge but also some average transport (kinetic) energy. When electrons flow from a material to another material in which their average transport energy is higher, they absorb thermal energy from the lattice, and this will cool the junction between the two materials. One could think of electron gas expanding in the energy space as they enter the second material. This is the main reason for refrigeration. This process is reversible, if the direction of current is changed, energy is released to the lattice, and there will be heating at the junction. When electrons move under an external electric field, their Baverage kinetic energy with respect to the Fermi level[ is the exact definition of the Peltier coefficient, which is the Seebeck coefficient times absolute temperature. The efficiency of a conventional thermoelectric cooler is described by a dimensionless parameter ZT. It is given by ZT ¼ S 2 T=, where T is the absolute temperature, and are the electrical and thermal conductivities of the material, respectively, and S is the Seebeck coefficient. [37], [38], [148]. conductivity) and ZT can be achieved (see Fig. 3). This is due to the fact that electron motion perpendicular to the potential barrier is quantized creating sharp features in the electronic density of states (DOS) [40]. Sometimes it is claimed that low-dimensional structures have an Bincreased[ DOS. This is not strictly correct. The quantum confinement of electrons eliminates some states that electrons can occupy, since they do not obey the boundary A. Low-Dimensional Thermoelectrics In 1993 the outstanding pioneering work of Hicks and Dresselhaus renewed interest in thermoelectrics, becoming the inspiration for most of the recent developments in the field [39]. Dresselhaus and coworkers showed that electrons in low-dimensional semiconductors such as quantum wells and wires have an improved thermoelectric power factor (Seebeck coefficient squared times electrical Fig. 3. Thermoelectric figure-of-merit ZT of Bi quantum well and quantum wire as a function of dimension [39]. Inset shows the density of electronic states for 3-D, 2-D, 1-D and 0-D conductors Proceedings of the IEEE Vol.94,No.8,August2006

5 1 Even though this makes sense intuitively, there are no detailed calculations of the effect of size nonuniformity on low-dimensional thermoelectric properties. conditions for electronic wavefunction. Thus, the number of available states (quantum numbers) associated with any given energy is either reduced or unchanged. The main benefit is that the quantum confinement changes the energy of the bandedge of the semiconductor. Near this bandedge, some sharp features in DOS are created. One can use these sharp features to increase the asymmetry between hot and cold electron transport and thus obtain a large average transport energy and a large number of carriers moving in the material, i.e., a large Seebeck coefficient square times electrical conductivity. Despite the fact that the concept of low-dimensional thermoelectrics is rigorously correct and proof-of-principle has been demonstrated [41], the recent breakthroughs in materials with ZT 9 1 (Venkatasubramanian et al. [42], Harman et al. [43], or Kanatizidis et al. [44]) have mainly benefited from reduced phonon thermal conductivity [45] with power factors similar to the existing state-of-the-art material. There are two reasons why it is hard to improve the thermoelectric power factor of quantum well materials [46] [48]. First, we live in a 3-D world and any lowdimensional quantum well structure should be imbedded in barriers. These barriers are electrically inactive but they add to thermal heat loss between the hot and the cold junctions. This can reduce the performance significantly [49]. One cannot make the barrier too thin, since the tunneling between adjacent quantum wells will broaden energy levels and reduce the improvement due to the DOS. The second reason is that the sharp features in the DOS of 2-D nanostructures disappear quickly as soon as there is size nonuniformity in the material. 1 A natural extension of quantum wells and superlattices is to quantum wires [50], [51], [149]. Theoretical studies predict a large enhancement of ZT inside quantum wires due to additional electron confinement (see Fig. 3). Experimentally, different quantum wire deposition methods have been explored [52] [58]. However, so far, there are no experimental results indicating any significant enhancement of thermoelectric properties due to quantum wires. This is because contacting individual wires and making accurate thermo electric measurements is difficult. Some progresses have been made in this direction recently. Zhou et al. [159] reported the measurement of temperature-dependant thermal conductivity, four-probe resistance, Seebeck coefficient, and ZT of individual bismuth telluride nanowires. Most recently, a new microfabricated device has been developed by Mavrokefalos et al. [160] to measure the thermoelectric properties and to characterize the crystal structure and chemical composition using transmission electron micrograph and energy dispersive spectral analysis of the same individual nanowire assembled on the microdevice so as to establish the structurethermoelectric property relationship. In the case of nanowire arrays, the whole structure has been embedded in an alumina template or in a polymer. The difficulty of ensuring good electrical contact to all wires in an array and quantum wire size variations has impeded, so far, the quantitative characterization of low-dimensional properties. Quantum dot structures have been proposed as the zero-dimensional (0-D) extension of the low-dimensional thermoelectrics [42]. However, there is a fundamental difference. The original theory developed by Dresselhaus et al. [39] does not rigorously apply to quantum dots. The enhanced power factor in quantum confined 2-D and 1-D structures happens in the direction perpendicular to the confinement. Thus, we benefit from sharp features in the DOS, but we can still use free electron approximation with an effective mass in the direction where electric field is applied and heat is transported. However, in the case of a matrix of quantum dots, electrons have to move between the dots in order to transfer heat from one location to another. If the electronic bands in the dots are very narrow, then electrons are highly confined and it is not easy to take them out of the dots. On the other hand, it is easy to take electrons out of shallow quantum dots but at the same time the density of electronic states in the dot will have broad features. Recent theoretical analysis by Humphrey et al. has shown that the electronic efficiency for thermoelectric cooling or power generation can approach the Carnot limit if electron transport between the hot and the cold reservoirs happens in a narrow energy band under a finite temperature gradient and a finite external voltage [59]. This is due to the reduction in electronic thermal conductivity, e.g., the breakdown of the Wiedermann Franz law that relates thermal and electrical conductivities. This could be achieved with an appropriately designed embedded quantum dot material having a graded composition or dot sizes from the hot to the cold junctions. As we will see in the next section, another significant benefit of quantum dots can be in hot electron filtering [60], [61]. It is also possible to have increased phonon scattering and reduced thermal conductivity, further increasing the ZT of materials with embedded nanoparticles. Recent experimental results by Kim et al. show that room temperature thermal conductivity of InGaAs with embedded ErAs semimetallic nanoparticles can be reduced by a factor of two compared to the bulk alloy [62]. ErAs particles 2 4 nm in diameter can effectively scatter long wavelength phonons and reduce the lattice thermal conductivity of the alloy substantially. Since the underlying InGaAs matrix is of high crystalline quality, electron mobility in these structures is only slightly lower than pure InGaAs crystals [63]. B. Physics of Electron Transport in Solid-State Thermionic Devices Heterostructure integrated thermionic (HIT) coolers have been fabricated and characterized for applications in Vol. 94, No. 8, August 2006 Proceedings of the IEEE 1617

6 the integrated cooling of optoelectronic and electronic devices [64] [67]. The idea of thermionic energy conversion was first seriously explored in the mid-1950s during the development of vacuum diodes and triodes. A vacuum diode thermionic refrigerator was proposed by Mahan [68] in In the early to mid-1990s, several groups pointed out the advantage of electron energy filters in bulk thermoelectric materials [69] [71], [150]. To overcome the limitations of vacuum thermionics at lower temperatures, thermionic emission cooling in heterostructures was proposed by Shakouri and Bowers [64]. In these structures, a potential barrier is used for the selective emission of hot electrons and the evaporative cooling of the electron gas. The HIT cooler can be based on a single-barrier or a multibarrier structure (see Fig. 4). In a single-barrier structure in the ballistic transport regime, which is strongly nonlinear, electric current is dominated by the supply of electrons in the cathode layer and large cooling power densities exceeding kw/cm 2 can be achieved [64], [65]. In this design, it is necessary to use a barrier several micrometers thick with an optimum barrier height at the cathode, on the order of the thermal energy of electrons k B T,wherek B is Planck s constant. A large barrier height at the anode to reduce reverse current is also needed [65]. A few single-barrier InGaAs/InGaAsP/InGaAs thin-film devices that were lattice matched to InP substrate were fabricated and characterized [72]. The InGaAsP barrier ð gap 1.3 mþ was 1 m thick and 100 mev high. Even though cooling by 1 C and cooling power density exceeding 50 W/cm 2 were achieved [72], [73], it was not possible to increase the bias current substantially there by Fig. 4. Hot electron filtering and thermionic emission in single-barrier and superlattice structures Proceedings of the IEEE Vol.94,No.8,August2006

7 Fig. 5. Transmission electron micrograph of 3-m-thick 200 ð5nmsi 0:7 Ge 0:3 =10 nm SiÞ superlattice grown symmetrically strained on a buffer layer designed so that the in-plane lattice constant was approximately that of relaxed Si 0:9 Ge 0:1. The n-type doping level (Sb) is cm 3. The relaxed buffer layer has a ten-layer structure, alternating between 150-nm Si 0:9 Ge 0:1 and 50-nm Si 0:845 Ge 0:150 C 0: mSi 0:9 Ge 0:1 cap layer was grown with a high doping to get a good ohmic contact. fully benefiting from the large thermionic emission cooling. This is due to nonideal metal semiconductor contact resistance and Joule heating in the substrate. The single-barrier HIT device in a nonlinear transport regime was not anticipated to have an improved energy conversion efficiency. High efficiency typically requires small perturbations from equilibrium. Electrons that are ballistically emitted release all their excess energy in the anode and produce significant heating. The main motivation of the original study was to do temperature stabilization of optoelectronic devices with monolithic structures [67], [74]. In 1998 Mahan and Woods proposed to use thermionic emissions in multilayer structures in a linear transport regime. They estimated an increase in the figure-of-merit ZT by a factor of two [75]. Based on this idea, a few structures were synthesized by Kim et al.; however, due to the poor material quality no improvement was reported [76]. Later calculations by Radtke et al. [77] showed that, in the linear transport regime, the thermoelectric power factor in multilayer thermionic devices is smaller than that of a thermoelectric one; thus, the main advantage of superlattices is in the reduction of phonon thermal conductivity. Mahan and Vining in a subsequent publication reached the same conclusion [78]. This analysis was also based on linearized ballistic transport over symmetric barriers. In contrast to the previous publications, Shakouri et al. in 1999 proposed that tall barrier, highly degenerate Vol. 94, No. 8, August 2006 Proceedings of the IEEE 1619

8 superlattice structures can achieve thermoelectric power factors (the square of the Seebeck coefficient times the electrical conductivity) an order of magnitude higher than bulk values [79]. In this analysis no assumption about ballistic transport was made. The improvement was solely due to the filtering of hot electrons in a highly degenerate sample. For a multibarrier structure at small biases, one can define an effective Seebeck coefficient and electrical conductivity [80], [81]. In the linear transport regime, calculations based on effective thermoelectric materials or based on solid-state thermionics will converge representing two points of view for the same electron transport phenomena in superlattices. One can describe the effect of potential barriers as a means to increase the thermoelectric power factor. Recently the theoretical analysis of electric and thermoelectric transport perpendicular to the superlattice direction has been expanded [80] [82]. It is shown that highly degenerate semiconductors and metallic-based superlattices in the quasi-linear transport regime have the potential to achieve thermoelectric power factors significantly larger than bulk values. Assuming a lattice contribution to thermal conductivity on the order of 1 W/mK, ZT values exceeding 5 6 are predicted. The key requirement is nonconservation of lateral momentum during the thermionic emission process. Basically, planar barriers are only effective to filter out hot electrons moving with large kinetic energy perpendicular to the barrier. Many of the hot electrons with large in-plane kinetic energy can not be selectively emitted. Nonconservation of lateral momentum will allow a much larger number of hot electrons to participate in the conduction process. This couldbeachievedusingnonplanarbarriersorembedded nanoparticles [40], [83]. It is important to note that the role of nanoparticles in this case is quite different from low-dimensional thermoelectrics. Discrete energy states are not directly used. Quantum dots act as 3-D scattering centers and energy filters for electrons moving in the material. Novel metallic-based superlattices with embedded nano particles are synthesized by molecular beam epitaxy (MBE) and by pulsed laser deposition systems. These techniques allow a precise layer by layer growth with a growth rate of m per hour. Large-scale MBE growth of GaAs chips for cell phones and laser diodes for compact disc applications have been demonstrated [84], [151]. The epitaxial growth is done simultaneouslyonfivetosixwaferseach2 4inindiameter. Once the research phase is completed and electronic and thermal properties of nanostructured materials optimized,othertechniquessuchaschemicalvapordeposition could also be used for larger scale production of microrefrigerators. Fig. 6. Diagram showing current flow and heat exchange at various junctions in a single-element microrefrigerator Proceedings of the IEEE Vol.94,No.8,August2006

9 Fig. 7. Scanning electron micrograph of microrefrigerators on a chip. Device size ranges from up to m 2. IV. HETEROSTRUCTURE INTEGRATED THERMIONIC MICROREFRIGERATORS ON A CHIP Using the idea of heterostructure electron energy filtering, thin-film coolers based on various materials have been fabricated and characterized. InGaAsP/InP [67], [72], [85], and InGaAs/InP [86], were grown with metal organic chemical vapor deposition (MOCVD), and InGaAs/InAlAs [87], InGaAsSb/InGaAs [88], SiGe/Si [89], [90], and SiGeC/Si [66]) were grown with MBE. These structures were lattice matched to either InP or silicon substrates to ease their monolithic integration. Si-based heterostructures are particularly useful for monolithic integration with silicon-based electronics. The basic idea was to use a band offset between the different layers as a hot carrier filter. The superlattice structure has also the potential to reduce the lattice thermal conductivity. Different superlattice periods (5 30 nm), dopings ( cm 3 ), and thicknesses (1 7 m) were analyzed. A typical SiGe/Si microrefrigerator shown in Fig. 5 consists of a 3-m-thick superlattice layer with a 200 ð3-nm Si=12-nm Si 0:75 Ge 0:25 Þ structure doped to 5e19 cm 3,a1-m Si 0:8 Ge 0:2 buffer layer with the same doping concentration as the superlattice, and a 0.3-m Si 0:8 Ge 0:2 cap layer with doping concentration of 1.9e20 cm 3. Various microrefrigerator devices were fabricated using standard thin-film processing technology (photolithography, wet and dry etching, and metallization). In the single-leg microcooler geometry, a gold or aluminum metal contact was used to send current to the cold side of the device (Fig. 6). The Joule heating and heat conduction in this metal layer had a strong impact on the overall cooler performance. An electrical contact on the backside of the silicon substrate, or on the front surface far away from the device, was used as the second electrode. Thus, 3-D heat and current spreading in the substrate helped the localized cooling of the device. Fig. 7 shows a scanning electron micrograph of thin-film coolers of the various sizes ( m 2 ). Fig. 8 illustrates typical cooling curves (maximum cooling below ambient versus supplied current) for m 2 microrefrigerators. For comparison, results for identical devices based on bulk silicon and two different superlattice periods are shown [90], [91]. Bulk Peltier effect in Vol. 94, No. 8, August 2006 Proceedings of the IEEE 1621

10 Fig. 8. Cooling versus supplied current for bulk silicon microrefrigerator and for 3-m-thick superlattice devices with two different superlattice periods. Device size is m 2. silicon can produce G 1 C cooling while superlattice structures can increase the performance to 9 4 C. By increasing the current thermoelectric/thermionic cooling increases linearly but at some point Joule heating, which is proportional to the square of the current, dominates and the net cooling is reduced. Fig. 9 shows the experimental and theoretical cooling for different size microrefrigerators. Calculations are based on commercial finite element 3-D electrothermal simulations in which thermoelectric cooling and heating with an effective Seebeck coefficient was added [92]. Fig. 10 shows the calculated temperature distribution of a m 2 device at its maximum cooling at room temperature. Fig. 11 shows the thermal image of a microrefrigerator under operation. One can see uniform cooling on top of the device. No significant temperature rise on the metal contact layer adjacent to the device can be seen. A ring of localized heating around the device is attributed to the Joule heating in the buffer layer beneath the superlattice [93]. In Fig. 9 we can see that due to nonideal effects (Joule heating in the substrate, at the metal semiconductor junction, and in the top metal contact layer), there is an optimum device size on the order of m in diameter that achieves maximum cooling [94], [95], [152]. This is due to the fact that various parameters scale differently with the device size. For example, both of the substrate s 3-D thermal and electrical resistances scale as thesquarerootofthedevicearea,whilethejouleheating from the metal semiconductor contact resistance scales directly proportional to it [93] [95], [152]. Cooling temperature in these miniature refrigerators was measured using two techniques. First, a small m-diameter type E thermocouple is placed on top of the device and another thermocouple is placed farther away, on the heat sink. Even though the thermocouple had the same diameter as the refrigerator, accurate temperature measurements with 0.01 C resolution was achieved on devices with diameter larger than m. We also used 1622 Proceedings of the IEEE Vol.94,No.8,August2006

11 Fig. 9. Theoretical and experimental cooling versus supplied current for different microrefrigerator sizes. Microcooler devices consist of a 3-mthick superlattice layer with the structure of 200 ð3-nm Si=12-nm Si 0:75 Ge 0:25 Þ and doping concentration of 5e19 cm 3,a1-m Si 0:8 Ge 0:2 buffer layer with the same doping concentration as the superlattice; and a 0.3-m Si 0:8 Ge 0:2 cap layer with doping concentration of 1.9e20 cm 3. Fig D electrothermal simulation showing temperature distribution in the SiGe microrefrigerator under bias. an integrated thin-film resistor sensor on top of the microcooler. To electrically isolate the thin-film resistor, a m-thick SiN layer was deposited on the top electrode of the microrefrigerator. The resistance versus temperature was calibrated on a variable temperature heating stage and this was used to measure cooling on top of the device. A resistor could also be used as heat load directly on top of the device if a large current is applied Vol. 94, No. 8, August 2006 Proceedings of the IEEE 1623

12 Fig. 11. Thermal image of a m 2 microrefrigerator at an applied current of 500 ma. Stage temperature is 30 Cand the device is cycled at a frequency of 1 khz. (see Fig. 12 inset). The experimental results showed in Fig. 12 illustrate the cooling temperature of a m square microrefrigerator device as a function of heat load density. During these measurements, we heat the heater using a constant current; at the same time we also measure the cooling of the microrefrigerators using a thermocouple or the resistance value of the heater. By increasing the constant current to the heaters, more heat load was added on top of the refrigerators, and the cooling T was decreased. The maximum cooling power density of the device was defined as the maximum heat flux per area that device could absorb when T ¼ 0. The maximum cooling power density for different microrefrigerator with a device sizes m 2 is W/cm 2 as indicated in Fig. 13. Maximum cooling values at zero heat load shown in Fig. 13 are smaller than the ones presented in Fig. 9. Placing resistive heaters on top of the superlattice introduces parasitic heat conduction paths to the substrate that reduce the maximum cooling of the micro refrigerator. It is interesting to note that contrary to the maximum cooling temperature results, the smallest samples (30 40 m in diameter) had the largest cooling power densities [96]. This was explained using theoretical models. It is due to the fact that certain parasitic mechanisms, e.g., heat conduction from the heat sink to the cold junction through the metal contact layer, will reduce maximum cooling below the ambient temperature, but, in fact, this can improve the cooling power density of the microrefrigerator by creating additional paths for heat spreading. Attaching a metal contact directly to the cold surface of the microcooler is a source of parasitic joule heating and heat leak to the sink. This limits the maximum cooling of thedeviceby10% 30%[95],[161].However,fabrication process of these single-leg devices is much simpler than the conventional thermoelectric coolers where an array of n-type and p-type semiconductors are used electrically in series and thermally in parallel. The cooling power density is only a function of the element leg length and it is independent of the number of elements. The main reason for choosing array structures is that they benefit from reduced heat loss in the metal leads, which stems from the trade off between operation current and voltage. If the goal is to remove a small hot spot, a single-element thermoelectric cooler is much easier to integrate on top of a chip. The ZT of bulk SiGe is about ten times smaller than BiTe at room temperature. III-V semiconductors have also a very low ZT of about [57], [97]. The main use of the HIT coolers mentioned above is not to achieve high efficiencies in order to cool big macroscopic size chips. The key idea is to selectively cool small regions of the chip removing hot spots locally. If a small fraction of the chip power is dissipated in localized regions, low thermoelectric efficiency is not the most important factor. It is more critical to incorporate small-size refrigerators with high cooling power density and with minimum additional thermal resistances inside the chip package. When comparing HIT microcoolers with bulk thermoelectric modules, there are three primary advantages. First of all, both microsize and standard microprocessor fabrication methods make HIT refrigerators suitable for monolithic integration inside IC chips. It is possible to put the refrigerator near the device and cool the hot spot directly. The 3-D geometry of a device with a small-size cold junction and large-size hot junction allows heat spreading from the small hot region to the heat sink [94], [152]. Second, the high cooling power density surpasses that of commercial bulk TE refrigerators. In fact, the directly measured cooling power density, a figure exceeding 680 W/cm 2 [96], is one of the highest numbers 1624 Proceedings of the IEEE Vol.94,No.8,August2006

13 Fig. 12. The maximum cooling temperature versus heat load. Inset shows the fabricated thin-film heater on top of the SiGe superlattice microrefrigerator. reported so far and it is similar to the best values achieved by thin-film BiTe/PbTe superlattice coolers having a ZT 2.4 [42]. Third, the transient response of the current SiGe/Si superlattice refrigerator is several orders of magnitude better than the bulk TE refrigerators. This is due to their small thermal mass. The standard commercial TE refrigerator has a response on the order of tens of seconds. The measured transient response of a typical HIT superlattice sample is on the order of s, again very similar to BiTe/PbTe superlattices (see Fig. 14, [98], [99], and [153]). Thus, microcoolers could be used to remove dynamic hot spots in the chip. According to the theoretical simulation, the current limitation of the superlattice coolers comes from the contact resistance at the metal/semiconductor interface and the resistance of the buffer layer, which are on the order of 10 6 cm 2. Detailed modeling predicts that 15 C 20 C of cooling with a cooling power density exceeding several thousand W/cm 2 is possible with optimized SiGe superlattice structures [94], [95], [100], [152]. A. SiGe and SiGeC Superlattice Optimization Microrefrigerators based on superlattices of Si 1 x Ge x =Si [89], [90], Si 1 x Ge x =Si 1 y Ge y [101], and Si/Ge [101] have been demonstrated. Since the lattice constant of Si 1 x Ge x ðx 9 0:1Þ is substantially different from silicon substrate, a graded buffer layer was used in order to gradually change the lattice constant to that of the average value of the two superlattice layers. This buffer layer, which is 1 2 m thick, can accommodate lots of dislocations and it allows growth of very high quality 3 5-m-thick superlattice on top of it. Maximum cooling of 4.5 C at room temperature, Vol. 94, No. 8, August 2006 Proceedings of the IEEE 1625

14 Fig. 13. The maximum cooling power density at zero net cooling (solid circles) and the maximum cooling temperature at zero heat load (open squares) versus device size for the SiGe superlattice microrefrigerator (see Fan [101] and Zeng et al. [96]). 7 C at 100 C [90], [101], and 14 C at 250 C have been demonstrated [102]. Detailed thermal imaging of these structures have shown that Joule heating in the buffer layer is one of the key nonideal effects that limit the maximum performance [14], [93], [95]. In addition, since the average lattice constant of the superlattice corresponds to SiGe alloy with x , only electronic devices based on SiGe could be monolithically integrated on top of these refrigerators. The addition of 1% 2% carbon to SiGe can decrease its lattice constant and make it matched to that of silicon. High-quality 3-m-thick SiGeC/Si superlattices have been grown without any buffer layer (see Fig. 15). Room temperature cooling was lower, about 2.5 C for m square device [66]. However, the cooling performance increased substantially with temperature and 7 Ccoolingat100 C ambient temperature was similar to the best SiGe/Si superlattice devices (see Fig. 16). An important question is: what is the role of the superlattice and its effect on the thermoelectric figure-ofmerit ZT? Superlattice structures could lower lattice thermal conductivity and increase the thermoelectric power factor (Seebeck coefficient square times electrical conductivity). Huxtable et al. characterized the thermal conductivity of various SiGe superlattices [103], [154]. The 3! technique was used to measure the thin-film thermal conductivity in the direction perpendicular to superlattice plane [104]. Thermal conductivity scaled almost linearly with interface density and approached that of the alloy SiGe, but was never lower than that of the alloy (8 9 W/mK). With a larger difference in the germanium content of the layers, e.g., with Si 0:2 Ge 0:8 = Si 0:8 Ge 0:2 and Si/Ge, a larger acoustic impedance mismatch could be achieved. This resulted in lattice thermal conductivity lower than that of the alloy (3 W/mK) [103], [154]. However, there were large amounts of dislocations in the 1626 Proceedings of the IEEE Vol.94,No.8,August2006

15 Fig. 14. Microrefrigerator s cooling response as a function of frequency for different device sizes (see Dilhaire et al. [93]). 3-m-thick sample that reduced the electrical conductivity. Microrefrigerator devices based on this material with low thermal conductivity did not show substantial cooling (only 1 C), thus a good crystalline quality of the material is essential for high thermoelectric performance [101]. In order to characterize the electron filtering (effective Seebeck coefficient) of SiGe superlattices, test structures were fabricated that included thin-film heaters on top of the device. This is similar to the structures used for cooling power density characterization. This thin-film heater could create a temperature difference across the superlattice and the substrate. By measuring the resulting thermovoltage, the combined Seebeck coefficients of the thin film (perpendicular to the layers) and the substrate could be obtained [105]. Using a reference based on a similar test structure on the substrate, the superlattice Seebeck coefficient could be deduced. Measurement of electrical conductivity of the superlattice perpendicular to thelayersismoredifficult;noreliablemeasurementshave been presented to date for highly conductive material which is typically used in thermoelectric applications. Full microrefrigerators devices based on bulk thin-film SiGe alloy and based on SiGe/Si superlattice were fabricated and their cooling characterized. Similar metallization and device geometry was used in order to facilitate the comparison between material properties (see Table 1). Room temperature cooling of the superlattice was about 5% larger than the bulk alloy film [106]. Given the fact that the thermal conductivity of the alloy was 30% lower than the superlattice (measured independently using the 3! technique), we anticipate that the hot electron filtering in the superlattice had increased the thermoelectric power factor by 37%. This shows that unless techniques for suppressing the lattice thermal conductivity of SiGe superlattices below that of alloys are found (without degradation in the electrical performance), the SiGe alloy films have good cooling performance compared to superlattices and they may be easier to grow and integrate on top of silicon chips. Recently, the transient Harman technique has been applied to measure the ZT of the thin film directly [42], [107], [108]. An electrical pulse is applied to the Vol. 94, No. 8, August 2006 Proceedings of the IEEE 1627

16 Fig. 15. Transmission electron micrograph of Si 0:89 Ge 0:1 C 0:01 =Si superlattice structure grown directly on silicon substrate (see Fan et al. [66]). thermoelectric device. This current pulse creates thermoelectric cooling and heating at the junctions and Joule heating in the bulk of the material. Subsequently, a temperature difference develops across the thin film. As the electrical pulse is turned off, the voltage across the device is monitored. Ohmic voltage drops almost instantaneously (in subpicosecond time scale) while the thermoelectric voltage disappears with the time scale of heatdiffusioninthedevice(10ns 10s for thin films). If the device is under the adiabatic conditions (heat flow from the hot to the cold junction through the contact leads could be neglected), one can obtain the ZT of the device by comparing the thermoelectric voltage pulses when the polarity of the current changes. Joule heating in the material is independent of current direction while Peltier cooling or heating at interfaces depend on the current direction [108]. Using this technique, the ZT of BiTe [42] and ErAs : InGaAs/InGaAlAs [109] superlattices have been measured. This has not been applied to SiGe superlattices. It is hoped that with the use of identical devices with different superlattice thicknesses and with reference structures, ZT at various temperatures could be obtained. This can help to further optimize SiGe microrefrigerators. B. Microrefrigerators in a Packaged IC Chip So far, we have described the cooling performance of microrefrigerators without considering the package effect. In real packaged ICs, the thermal resistance of the heat sink and that of the thermal interface material can significantly affect the cooling performance of microrefrigerators. To study this, an electrothermal model was developed to calculate the hot spot temperature with and without a microrefrigerator in a packaged IC [110], [111]. In this calculation, the superlattice thickness and its operation current are optimized in order to minimize the 1628 Proceedings of the IEEE Vol.94,No.8,August2006

17 Fig. 16. Cooling versus current at different ambient temperatures for Si 0:89 Ge 0:1 C 0:01 =Si superlattice microrefrigerators. hot spot temperature. We assumed a m 2 SiGe/Si superlattice microrefrigerator was fabricated at the center of the silicon substrate ð1 mm 1mm 500 mþ. A package thermal resistance of m 2 K/W is assumed. On top of the microrefrigerator the same size hot spot is placed. Heat flux at the hotspot is assumed to be ten times larger than the background heating applied everywhere else on the chip. The material parameters of Si/SiGe superlattice and Si substrate used for the calculation are listed in Table 1. The contact resistance between metal and semiconductor is assumed to be 10 6 cm 2.Fig.17showstherelationshipsbetweenhot spot heat flux Q h and the hot spot temperature T hotspot for the model with and without a microrefrigerator. As it can be seen from the graph, the superlattice microrefrigerator is able to lower the T hotspot value below what was obtained from the model without a microrefrigerator (standard IC package), although the effectiveness of thin-film microrefrigerator is reduced as Q h increases. By embedding the thin-film superlattice in a packaged IC, a 7.5 Creduction in hot spot temperature can be achieved at a heat flux Q h ¼ 300 W/cm 2. The optimum superlattice thickness for cooling is 10 m. The microrefrigerator will consume a power of 30 mw compared to the power dissipation in the whole chip of 300 mw. For most thermoelectric applications, a higher ZT translates directly to either a larger cooling temperature differences ðtþ or a higher cooling efficiency. As shown in the equation for Z, itispossibletochangeitbycontrolling three material properties:, S and. Tounderstand how each parameter affects the cooling performance, when one parameter is varied to increase Z, theothertwo parameters are kept constant. Fig. 18 shows the predicted cooling performance of microrefrigerators with various ZT values (T ¼ 300 K, room temperature). For the purpose of comparison, the plot for the microrefrigerator with ZT ¼ 0:125 (a value which should be possible with SiGe/Si superlattices) is shown in the same graph. A large Vol. 94, No. 8, August 2006 Proceedings of the IEEE 1629

18 reduction in hot spot temperature can be seen when ZT is improved. We can see that the effect of decreasing thermal conductivity or increasing electrical conductivity on T hotspot is identical, but the effect of increasing Seebeck coefficient is much larger. This result indicates that the Seebeck coefficient of thin-film materials is a more important factor to maximize the cooling performance for a 3-D superlattice microrefrigerator in a packaged chip [112]. It can be seen that with moderate improvement in material properties (i.e. a ZT 0.6), hot spots in tens of micrometers in diameter with heat fluxes in excess of 1000 W/cm 2 could be cooled down by 20 C 30 C. C. Active Coolers Embedded Inside the Substrate As we have seen in the previous section, the optimum thickness of SiGe microrefrigerators in a packaged IC is on the order of 10 m. In the short term, for conventional silicon complementary metal oxide semiconductor (CMOS) circuits, it is quite challenging to include such thick SiGe layers in a processing which is optimized to make hundreds of millions of nanoscale silicon transistors on a chip. The main application could be in future highperformance nanoelectronic chips or in optoelectronic ICs for the temperature stabilization of individual elements. On the other hand, it is possible to use buried microcoolers inside the substrate as a smart heat sink. One can bond a microrefrigerator chip at the back of silicon substrate [113], [155]. For example, gold gold fusion bonding can be used, which has very low thermal interface resistance. Since the two chips are made from the same silicon material, there are no issues due to the thermal expansion coefficient mismatch. In such two-chip configurations, the embedded microcoolers inside the composite substrate provide a means to actively control the temperature of the hot spots. Initial results showed only a cooling of 0.4 Cat the hot spot with cooling power densities of W/cm 2 [114]. The problem is due to the high thermal conductivity of silicon and even with 50-m-thick top silicon IC, the cooling of the embedded refrigerator could not be localized at the hot spot. A trenched structure inside the silicon substrate was used to improve the localize cooling, and 1.7 C cooling with cooling power density of 110 W/cm 2 was demonstrated for a hot spot of m 2 [115]. D. Bulk Silicon 3-D Microcoolers If large cooling temperature is not required, microcoolers placed directly on bulk silicon substrates could provide cooling on the order of 1 C [116], [117]. This uses the inherent Seebeck coefficient of silicon. Silicon ZT is very low 0.01, but the thermoelectric power factor of silicon (Seebeck coefficient square times electrical conductivity) is comparable to that of best thermoelectric materials such as BiTe. The thermoelectric power factor determines the capacity of electron gas to absorb thermal energy from one contact and move it to the other one. In addition, the unique asymmetric geometry of microrefrigerator device with a small area cold junction and a large Table 1 Material Parameters for BiTe Alloy, p-type Silicon, SiGe Alloys and Si/SiGe Superlattices. Maximum Cooling Temperature of Microrefrigerator Devices Based on Some of the Material Is Also Given. Typical Microrefrigerator Device Size is m square and Alloy or Thin-Film Thickness Is 3 m. ðkþ Refers to In-Plane Material Properties and ð?þ Refers to Cross-Plane Material Properties. The Estimated Cross-Plane Power Factors and ZTs for Superlattices are Based on the Measured Maximum Cooling of Microrefrigerators and the Comparison With Identical Thin-Film Devices Based on Alloy Material 1630 Proceedings of the IEEE Vol.94,No.8,August2006

19 Fig. 17. Hot spot temperature for packaged IC chip with and without SiGe microrefrigerator. For comparison the effect of replacing silicon substrate entirely with copper is shown (see Fukutani et al. [110]). area hot junction allows 3-D heat and current spreading in the substrate. This can result in large cooling power densities exceeding 300 W/cm 2 (seefig.19).inmakinga bulk microcooler, we need to define a small metallic electrode on top of the substrate. It is quite helpful to ensure that the current flows perpendicular to the metal/semiconductor interface; i.e., a small mesa with the height of m shouldbedefinedatthecold side. Peltier cooling is proportional to the flux of electrons going through the interface. If there is a component of the current moving in the plane of the interface, it will create additional Joule heating without any benefit for cooling. We thus used dry etching to make m mesas even with bulk silicon microcoolers. If one wants to make devices that use the heat pumping capability of the electron gas, there are some metals such as Co and Ni and some alloys that have a thermoelectric power factor twice larger than BiTe [118]. Such metalbased devices could be helpful for waste heat recovery (generate electricity from temperature differences) or in 3-D microrefrigerator configuration (small cold side and large hot side). One should note that in 1-D device geometry, thermoelectric heat pumping is not very effective. In configurations where the cold side of the thermoelectric device is hotter than the hot side (due to large heat load), a high lattice thermal conductivity material is much more important than a good electron heat pumping. Peltier cooling could improve the performance of 1-D heat pumps (with large thermal conductivity) by only a couple of degrees. E. Recent Advances in Nonsilicon Microscale Thermoelectric Refrigerators During the last couple of years, significant advances in thin-film thermoelectric coolers have been demonstrated at various research laboratories. Venkatasubramanian et al. at Research Triangle Institute have demonstrated 3 5-mthick, 100-m-diameter BiTe/PbTe superlattice coolers Vol. 94, No. 8, August 2006 Proceedings of the IEEE 1631

20 Fig. 18. The effect of the improvement in material properties on the hot spot cooling. In each case the thin-film thickness and the microrefrigerator device operation current are optimized for maximum cooling (see Fukutani et al. [110]). with maximum cooling of 30 C and cooling power density exceeding 500 W/cm 2 (this cooling power density is an estimated value and not directly measured) [42]. These values have been achieved with the use of electron transmitting, phonon blocking superlattices. Ultralow metal/semiconductor contact resistance on the order of 10 8 cm 2 has been obtained. In addition, the thin-film device was mounted on 10-m-thick metal on top of the silicon substrate in order to improve heat spreading at the hot junction. A variable thickness transient Harman technique was used to estimate the thermoelectric figure-ofmerit. ZT values on the order of 2.4 for p-type devices have been obtained at room temperature. Böttner et al. at Fraunhofer Institute have been working on the monolithic integration of conventional BiTe and BiSbTe bulk materials on a silicon substrate [119]. They have been able to deposit 20-m-thick legs using sputtering and IC fabrication techniques to produce coolers on large scales (on 4-in silicon wafers). They have demonstrated a maximum cooling of C with a 3 p- and n-leg for a current of 1 A. The estimated cooling power density is 100 W/cm 2. Uttam Ghoshal et al. demonstrated improved thermoelectric performance with bulk p-type Bi 0:5 Sb 1:5 Te 3 and n-type Bi 2 Te 2:9 Se 0:1 material systems with the use of sharp nanometer-size point contacts at the cathode electrode. The mechanism for improvement is not yet known but a cooling enhancement by about a factor of two at low current values compared to the bulk modules has been achieved [120]. Snyder, Fleurial et al. at the NASA Jet Propulsion Laboratory have used an electrochemical deposition technique to form thousands of n- and p-type ðbi; SbÞ 2 Te 3 legs with a diameter of 60 m and a thickness of 20 m. Maximum cooling on the order of 2 C has been measured [121]. Even though electrochemical deposition is very cheap and that the JPL group has been able to grow thousands of n- and p-legs directly on top of the array of electrode contacts, it seems that the material quality is not very good and the maximum cooling is quite low Proceedings of the IEEE Vol.94,No.8,August2006

21 Fig. 19. The maximum cooling power density at zero net cooling (solid circles) and the maximum cooling temperature at zero heat load (open squares) versus device size for bulk silicon microrefrigerators (see Zhang et al. [117] and Fan [101]). The bulk silicon is p-type boron doped at a doping concentration of cm 3 ; its resistivity is cm. F. Prospect of Bulk Thermoelectric Materials for Chip Cooling Since the early 1990s, there has been a lot work in the area of bulk thermoelectric materials such as skutterudites, clathrates, half-hausler materials, oxides, etc. [122], [123]. Even though thin-film deposition techniques are not used, the main idea is to engineer nanoscale atomic properties to have a material with good electrical conductivity and low thermal conductivity. This is also called electron crystal phonon glass material following the pioneering work of Slack [38], [124], [148]. For example, the concept of a heavy rattler atom in a cage of covalently bonded crystal is used to scatter dominant phonon modes in heat conduction but ensure good electrical conductivity for electrons. High ZT values on the order of at high temperatures K have been achieved [124]. The performance of thermoelectric coolers for cryogenic applications has also been improved. ZT 0.8 at 225 K is obtained for CsBi 4 Te 6 material [125]. Kanatzitis et al. have demonstrated ZT 9 1:5 at 500 K with AgPbSbTe material [44]. Most of the developments today are for high temperature power generation applications. When a suitable material for room temperature is identified, it is possible to use similar bulk growth techniques for IC chip cooling. A potential candidate could be HgCdTe material, which has a very low thermal conductivity at room temperature and at cryogenic temperatures. The thermoelectric power factor is also low due to very small electron effective mass. However, it has recently been suggested tall barrier superlattices based on Hg x Cd 1 x Te=Hg y Cd 1 y Te can benefit from hot electron filtering and achieve ZT 9 3 both at room temperature and at cryogenic temperatures [126]. V. PROSPECT OF VACUUM THERMIONIC EMISSION FOR CHIP COOLING Thermionic energy conversion is based on the idea that a high-work-function cathode in contact with a heat source Vol. 94, No. 8, August 2006 Proceedings of the IEEE 1633

22 will emit electrons [127]. These electrons are absorbed by a cold, low-work-function anode separated by a vacuum gap. They can flow back to the cathode through an external load where they do useful work. A vacuum is the best electrical conductor (electrons do not have any collisions in the gap) and the worst thermal conductor, since there are no atoms to transmit random vibrations and heat is only transported via radiation. Practical vacuum thermionic generators are, however, limited by the work function of available metals or other materials that are used for cathodes. Another important limitation is caused by the space charge effect. The presence of charged electrons in the otherwise neutral space between the cathode and anode will create an extra potential barrier between the cathode and anode, which reduces the thermionic current. The materials currently used for cathodes have work functions ev, which limits the generator applications to high temperatures K. Mahan [68] proposed these vacuum diodes for thermionic refrigeration. Basically, the same vacuum diodes that are used for the generators will work as a cooler on the cathodesideandaheatpumpontheanodesideunderan applied bias. Mahan predicted efficiencies of over 80% of the Carnot value, but still these refrigerators only work at high temperatures (9 500 K). There has been recent research to make efficient thermionic refrigerators at room temperature with the use of nanometers-thick vacuum gaps [128], [129]. This is sometimes called thermotunneling. This idea is based on the fact that electron tunneling increases exponentially as a function of barrier thickness. Use of G 5 10-nm barriers will allow conventional metal electrodes to achieve appreciable emission currents (hundreds of A/cm 2 ) and cooling power densities (hundreds of W/cm 2 ) at room temperature. There have been detailed theoretical studies and some preliminary experimental results [129]; however, the measured cooling is very small (0.3 mk). The main difficulty to achieve substantial cooling is to produce uniform nanometer size vacuum gaps over large areas. In addition, this narrow gap should be maintained as temperature difference develops and cathode and anode undergo thermal expansion and mechanical stress. In another approach, sometimes called the inverse Nottingham effect, resonant tunneling at an appropriately engineered cathode band structure has been proposed to enhance vacuum emission currents [130], [131]. Use of enhanced field emissions at nanostructured surfaces, such as CNTs or sharp tips, has also been investigated theoretically and experimentally [132], [133], [156]. While significantly increased vacuum currents have been obtained [134], [135], there are no experimental results on refrigeration near room temperature. An important problem with CNTs field emitters is that we do not have yet direct control of the nanotubes chirality, i.e., its electrical conductivity, thus both metallic and semiconducting nanotubes are grown at the same time. It is also important to note that the Bselective[ emission of hot electrons (energies higher than the Fermi level) compared to cold electrons (energies lower than the Fermi level) is necessary in order to achieve refrigeration. Since at room temperature the energy distribution of electrons inside the Fermi window is on the order of mev, a precise engineering of tunneling is necessary to achieve appreciable energy conversion. Recently, Koeck et al. have demonstrated vacuum power generation with a nanostructured nitrogen-doped diamond emitter separated by 80-m gap from the collector. At a cathode temperature of 825 C, substantially below conventional vacuum thermionic modules, 120-mV thermo voltage was generated [136] [138], [157]. It is anticipated that vacuum thermionic emitters could be useful for high-temperature power generation. However, applications to cooling at room temperature will probably not be available any time soon. An interesting question is raised by Fig. 4, which displays cooling by thermionic emission: is it necessary to have a hot junction at the anode side of the device? By bandgap engineering and appropriate doping, it should be possible to enhance interaction of electrons with, for example,photons,sothathotcarriersattheanodeside loose their energy by emitting light rather than heating the lattice. This does not violate the second law of thermodynamics, since light emission could be incoherent and the total entropy of the electron and photon system is still increasing. The light emission could occur in a conventional pn junction or in a more elaborated unipolar quantum cascade laser configuration [139]. Calculation by Pipe et al. showed that semiconductor laser structures could be designed to have heterostructure energy filtering near the active region [140]. This can provide internal cooling by hundreds of W/cm 2 under typical operating conditions. This method of cooling can be viewed as electrically pumped version of the conventional laser cooling which have been used for atom trapping and recently for cooling of macroscopic objects [141]. VI. SUMMARY An overview of recent advances in nanoscale thermal transport and in solid-state and vacuum thermionic devices was given. The main emphasis was how key physical mechanisms and nanoscale material engineering change bulk heat conduction and improve the efficiency and maximum cooling of microrefrigerator devices. Acknowledgment The experimental and theoretical data presented in Fig are the results of the work of outstanding students and postdocs: C. Labounty, X. Fan, G. Zeng, D. Vashaee, J. Christofferson, Y. Zhang, Z. Bian, 1634 Proceedings of the IEEE Vol.94,No.8,August2006

23 K. Fukutani, R. Singh, A. Fitting, Y. Ezzahri, and S. Huxtable. The author would like to acknowledge a very fruitful collaboration with Profs. J. Bowers, A. Gossard, S. Stemmer (UCSB), A. Majumdar, P. Yang (Berkeley), V. Narayanamurti (Harvard), R.Ram(MIT),T.Sands(Purdue),B.Nemanich,B.Davis, Z. Sitar, G. Bilbro (NCSU), A. Bar-Cohen (Maryland), S. Dilhaire (Univ. Bordeaux), L. Shi (Univ. Texas), K. Pipe (Univ. Michigan), and Dr. E. Croke (HRL Laboratories LLC). REFERENCES [1] M. C. Roco. (2000). National Nanotechnology Initiative (NNI), National Science Foundation. [Online]. Available: [2] M. L. Roukes and S. Fritz (Compiler), Understanding Nanotechnology, Scientific American, Dec [3] B. Sheu, P. C. Wu, and S. M. Sze, BSpecial issue on nanoelectronics and nanoscale processing,[ Proc. IEEE, vol. 91, no. 11, pp , Nov [4] R. Waser Ed., Nanoelectronics and Information Technology, 2nd ed. New York: Wiley, [5] D. G. Cahill, W. K. Ford, K. E. Goodson, G. D. Mahan, A. Majumdar, H. J. Maris, R. Merlin, and S. R. Phillpot, BNanoscale thermal transport,[ J. Appl. Phys., vol. 93, no. 2, pp , [6] J. Atlet, W. Claeys, S. Dilhaire, and A. Rubio, BDynamic surface temperature measurements in ICs,[ Proc. IEEE, vol. 94, no. 8, pp , Aug [7] L. Shi, O. Kwon, A. C. Miner, and A. Majumdar, BDesign and batch fabrication of probes for sub-100 nm scanning thermal microscopy,[ J. Microelectromech. Syst., vol. 10, no. 3, pp , Sep [8] H.-K. Lyeo, A. A. Khajetoorians, L. Shi, K. P. Pipe, R. J. Ram, A. Shakouri, and C. K. Shih, BProfiling the thermoelectric power of semiconductor junctions with nanometer resolution,[ Science, vol. 303, pp , [9] H. T. Grahn, H. J. Maris, and J. Tauc, BPicosecond ultrasonics,[ IEEE J. Quantum Electron., vol. 25, no. 12, pp , Dec [10] K. E. O Hara, H. Xiaoyuan, and D. G. Cahill, BCharacterization of nanostructured metal films by picosecond acoustics and interferometry,[ J. Appl. Phys., vol. 90, no. 9, pp , [11] S. Grauby, S. Dilhaire, S. Jorez, and W. Claeys, BImaging setup for temperature, topography, and surface displacement measurements of microelectronic devices,[ Rev. Sci. Instrum., vol. 74, no. 1, pp , Jan [12] T. Ikari, J. P. Roger, and D. Fournier, BPhotothermal microscopy of silicon epitaxial layer on silicon substrate with depletion region at the interface,[ Rev. Sci. Instrum., vol. 74, no. 1, pp , Jan [13] Y. S. Ju and K. E. Goodson, BShort-time-scale thermal mapping of microdevices using a scanning thermoreflectance technique,[ J. Heat Transf., Trans. ASME, vol. 120, no. 2, pp , May [14] J. Christofferson and A. Shakouri, BThermoreflectance based thermal microscope,[ Rev. Sci. Instrum., vol. 76, pp , Jan [15] VV, BThermal measurements of active semiconductor micro-structures acquired through the substrate using near IR thermoreflectance,[ Microelectron. J.VCircuits Syst., vol. 35, no. 10, pp , Oct [16] A. Majumdar, BMicroscale heat conduction in dielectric thin films,[ J. Heat Transf., Trans. ASME, vol. 115, pp. 7 16, [17] G. Chen, BBallistic-diffusive equations for transient heat conduction from nano- to macroscales,[ J. Heat Transf., Trans. ASME, vol. 124, pp , [18] D. Y. Tzou, Macro- to Microscale Heat Transfer: The Lagging Behavior. New York: Taylor & Francis, [19] E. Pop, S. Sinha, and K. E. Goodson, BHeat generation and transport in nanometer-scale transistors,[ Proc. IEEE, vol. 94, no. 8, pp , Aug [20] M. A. Stettler, M. A. Alam, and M. S. Lundstrom, BA critical examination of the assumptions underlying macroscopic transport equations for silicon devices,[ IEEE Trans. Electron Devices, vol. 40, no. 4, pp , Apr [21] P. G. Sverdrup, S. Sinha, M. Asheghi, S. Uma, and K. E. Goodson, BMeasurement of ballistic phonon conduction near hotspots in silicon,[ Appl. Phys. Lett., vol. 78, no. 21, pp , May 21, [22] E. T. Swartz and R. O. Pohl, BThermal boundary resistance,[ Rev. Mod. Phys., vol. 61, pp , [23] R. S. Prasher and P. E. Phelan, BA scattering-mediated acoustic mismatch model for the prediction of thermal boundary resistance,[ J. Heat Transf., Trans. ASME, vol. 123, no. 1, pp , Feb [24] G. Chen, BPhonon transport in low-dimensional structures,[ Semicond. Semimet., vol. 71, pp , [25] A. R. Abramson, C.-L. Tien, and A. Majumdar, BInterface and strain effects on the thermal conductivity of heterostructures: A molecular dynamics study,[ J. Heat Transf., Trans. ASME, vol. 124, no. 5, pp , Oct [26] C. Strohm, G. L. J. A. Rikken, and P. Wyder, BPhenomenological evidence for the phonon hall effect,[ Phys. Rev. Lett., pp , [27] W. Liu and M. Asheghi, BPhonon-boundary scattering in ultrathin single-crystal silicon layers,[ Appl. Phys. Lett., vol. 84, p. 3819, [28] Z. L. Wang, Ed., Nanowires and Nanobelts: Materials, Properties and Devices, vol. 1&2. Berlin, Germany: Springer-Verlag, [29] D. Li, Y. Wu, P. Kim, L. Shi, P. Yang, and A. Majumdar, BThermal conductivity of individual silicon nanowires,[ Appl. Phys. Lett., vol. 83, pp , [30] S. Berber, Y.-K. Kwon, and D. Tománek, Phys. Rev. Lett., vol. 84, p. 4613, [31] N. Mingo and D. A. Broido, BCarbon nanotube ballistic thermal conductance and its limits,[ Phys. Rev. Lett., vol. 95, p , [32] J. Hone, M. C. Llaguno, N. M. Nemes, A. T. Johnson, J. E. Fischer, D. A. Walters, M. J. Casavant, J. Schmidt, and R. E. Smalley, BElectrical and thermal transport properties of magnetically aligned single wall carbon nanotube films,[ Appl. Phys. Lett., vol. 77, p. 666, [33] P. Kim, L. Shi, A. Majumdar, and P. L. McEuen, BThermal transport measurements of individual multiwalled nanotubes,[ Phys. Rev. Lett., vol. 87, p , [34] Q. Ngo, B. A. Cruden, A. M. Cassell, G. Sims, M. Meyyappan, and C. Y. Yang, BThermal interface properties of Cu-filled vertically aligned carbon nanofiber arrays,[ Nano Lett., vol. 4, pp , [35] R. Prasher, BThermal interface materials: Historical perspective, status, and future directions,[ Proc. IEEE, vol. 94, no. 8, pp , Aug [36] J. Sharp, J. Bierschenk, and H. B. Lyon, BOverview of solid state thermoelectric refrigerators and possible applications to on-chip thermal management,[ Proc. IEEE, vol. 94, no. 8, pp , Aug [37] G. Nolas, J. Sharp, and H. J. Goldsmid, Thermoelectrics: Basic Principles and New Materials Developments. Berlin, Germany: Springer, [38] D. M. Rowe, CRC Handbook of Thermoelectrics. Boca Raton, FL: CRC, [39] L. D. Hicks and M. S. Dresselhaus, BEffect of quantum-well structures on the thermoelectric figure of merit,[ Phys. Rev. B, Condens. Matter, vol. 47, no. 19, pp , [40] A. Shakouri, BThermoelectric, thermionic and thermophotovoltaic energy conversion,[ in Int. Conf. Thermoelectrics, Clemson, SC, 2005, pp [41] L. D. Hicks, T. C. Harman, X. Sun, and M. S. Dresselhaus, BExperimental study of the effect of quantum-well structures on the thermoelectric figure of merit,[ Phys. Rev. B, Condens. Matter, vol. 53, no. 16, pp. R10493 R104936, [42] R. Venkatasubramanian, E. Siivola, T. Colpitts, and B. O Quinn, Nature, vol. 413, pp , [43] T. C. Harman, P. J. Taylor, M. P. Walsh, and B. E. LaForge, Science, vol. 297, pp , [44] K. F. Hsu, S. Loo, F. Guo, W. Chen, J. S. Dyck, C. Uher, T. Hogan, E. K. Polychroniadis, and M. G. Kanatzidis, BCubic AgPb/sub m/sbte/sub 2+m/: Bulk thermoelectric materials with high figure of merit,[ Science, vol. 303, no. 5659, pp , [45] G. Chen, BPhonon transport in low-dimensional structures,[ Semicond. Semimet., vol. 71, pp , [46] D. A. Broido and T. L. Reinecke, BEffect of superlattice structure on the thermoelectric figure of merit,[ Phys. Rev. B, Condens. Matter, vol. 51, pp , Vol. 94, No. 8, August 2006 Proceedings of the IEEE 1635

24 [47] J. O. Sofo and G. D. Mahan, BThermoelectric figure of merit of superlattices,[ Appl. Phys. Lett., vol. 65, pp , [48] G. Chen and A. Shakouri, BHeat transfer in nanostructures for solid-state energy conversion,[ J. Heat Transf., Trans. ASME, vol. 124, no. 2, pp , Apr [49] D. A. Broido and T. L. Reinecke, BTheory of thermoelectric power factor in quantum well and quantum wire superlattices,[ Phys. Rev. B, Condens. Matter, vol. 64, p , [50] M. S. Dresselhaus, Y. M. Lin, G. Dresselhaus, X. Sun, Z. Zhang, S. B. Cronin, T. Koga, and J. Y. Ying, BAdvances in 1-D and 2-D thermoelectric materials,[ in 18th Int. Conf. Thermoelectrics Proc., 1999, pp [51] J. Zou and A. Balandin, BPhonon heat conduction in a semiconductor nanowire,[ J. Appl. Phys., vol. 89, no. 5, pp , [52] J. P. Heremans, C. M. Thrush, D. T. Morelli, and M.-C. Wu, BResistance, magnetoresistance, and thermopower of zinc nanowire composites,[ Phys. Rev. Lett., vol. 91, no. 7, pp / /4, Aug. 15, [53] D. Li, A. L. Prieto, Y. Wu, M. S. Martin-Gonzalez, A. Stacy, T. Sands, R. Gronsky, P. Yang, and A. Majumdar, BMeasurements of Bi 2 Te 3 nanowire thermal conductivity and Seebeck coefficient,[ in Proc. 21st Int. Conf. Thermoelectrics (ICT 02), 2002, pp [54] M. S. Sander, A. L. Prieto, R. Gronsky, T. Sands, and A. M. Stacy, BControl and assessment of structure and composition in bismuth telluride nanowire arrays,[ in Materials Research Soc. Symp. Proc.: Synthesis, Functional Properties and Applications of Nanostructures Symp., 2002, pp. Y Y [55] Z. B. Zhang, M. S. Dresselhaus, and J. Y. Ying, BFabrication, characterization and electronic properties of bismuth nanowire systems,[ in Proc. Mater. Res. Soc. Symp. Thermoelectric Materials 1998VNext Generation Materials for Small-Scale Refrigeration and Power Generation Applications, 1999, pp [56] O. Rabin, P. R. Herz, Y. M. Lin, S. B. Cronin, A. I. Akinwande, and M. S. Dresselhaus, BArrays of nanowires on silicon wafers,[ in Proc. 21st Int. Conf. Thermoelectrics (ICT 02), 2002, pp [57] N. Mingo, BThermoelectric figure of merit and maximum power factor in III-V semiconductor nanowires,[ Appl. Phys. Lett., vol. 84, p. 2652, [58] J. Sharp, A. Thompson, L. Trahey, and A. Stacy, BMeasurement of thermoelectric nanowire array properties,[ in Proc. 24th Int. Conf. Thermoelectrics (ICT), 2005, pp [59] T. E. Humphrey and H. Linke, BReversible thermoelectric nanomaterials,[ Phys. Rev. Lett., vol. 94, no. 9, pp , Mar. 11, [60] J. P. Heremans, C. M. Thrush, and D. T. Morelli, BThermopower enhancement in PbTe with Pb precipitates,[ J. Appl. Phys. vol. 98, no. 6, pp , Sep. 15, [61] J. M. Zide, D. Vashaee, G. Zeng, J. E. Bowers, A. Shakouri, and A. C. Gossard, BDemonstration of electron filtering to increase the Seebeck coefficient in ErAs: InGaAs/InGaAlAs superlattices,[ Phys. Rev. B, Condens. Matter, [62] W. Kim, P. Reddy, A. Majumdar, J. Zide, A. Gossard, D. O. Klenov, S. Stemmer, G. Zeng, J. Bowers, and A. Shakouri, BBeating the alloy limit of thermal conductivity in crystalline material,[ Phys. Rev. Lett., vol. 96, no. 4, pp , [63] J. M. Zide, D. O. Klenov, S. Stemmer, A. C. Gossard, G. Zeng, J. E. Bowers, D. Vashaee, and A. Shakouri, BThermoelectric power factor in semiconductors with buried epitaxial semimetallic nanoparticles,[ Appl. Phys. Lett., vol. 87, pp , Sep [64] A. Shakouri and J. E. Bowers, BHeterostructure integrated thermionic coolers,[ Appl. Phys. Lett., vol. 71, pp , [65] A. Shakouri, E. Y. Lee, D. L. Smith, V. Narayanamurti, and J. E. Bowers, BThermoelectric effects in submicron heterostructure barriers,[ Microscale Thermophys. Eng., vol. 2, pp , [66] X. F. Fan, G. H. Zeng, C. LaBounty, J. E. Bowers, E. Croke, C. C. Ahn, S. Huxtable, A. Majumdar, and A. Shakouri, BSiGeC/Si superlattice microcoolers,[ Appl. Phys. Lett., vol. 78, pp , [67] C. LaBounty, A. Shakouri, P. Abraham, and J. E. Bowers, BMonolithic integration of thin-film coolers with optoelectronic devices,[ Opt. Eng., vol. 39, pp , [68] G. D. Mahan, BThermionic refrigeration,[ J. Appl. Phys., vol. 76, pp , [69] B. Y. Moyzhes and V. A. Nemchinsky, Report on the XI International Conference on Thermoelectrics, IEEE, Arlington, TX, 1992, pp [70] D. M. Rowe and G. Min, BMultiple potential barriers as a possible mechanism to increase the Seebeck coefficient and electrical power factor,[ in Proc. 13th Int. Conf. Thermoelectrics, 1994, pp [71] L. W. Whitlow and T. Hirano, BSuperlattice applications to thermoelectricity,[ J. Appl. Phys., vol. 78, pp , [72] A. Shakouri, C. LaBounty, J. Piprek, P. Abraham, and J. E. Bowers, BThermionic emission cooling in single barrier heterostructures,[ Appl. Phys. Lett., vol. 74, no. 1, pp , Jan. 4, [73] C. LaBounty, A. Shakouri, and J. E. Bowers, BDesign and characterization of thin film microcoolers,[ J. Appl. Phys., vol. 89, no. 7, pp , Apr. 1, [74] Y. Zhang, G. Zeng, J. Piprek, A. Bar-Cohen, and A. Shakouri, BSuperlattice microrefrigerators fusion bonded with optoelectronic devices,[ IEEE Trans. Compon. Packag. Technol., vol. 28, no. 4, pp , Dec [75] G. D. Mahan and L. M. Woods, Phys. Rev. Lett., vol. 80, p. 4016, [76] J. G. Kim, H. H. Weitering et al., Abstract Z9.2 at Materials Research Society Spring Meeting, [77] R. J. Radtke, H. Ehrenreich, and C. H. Grein, J. Appl. Phys., vol. 86, p. 3195, [78] G. D. Mahan and C. B. Vining, J. Appl. Phys., vol. 86, p. 6852, [79] A. Shakouri, C. LaBounty, P. Abraham, J. Piprek, and J. E. Bowers, BEnhanced thermionic emission cooling in high barrier superlattice heterostructures,[ in Materials Research Soc. Symp. Proc., 1998, vol. 545, pp [80] D. Vashaee and A. Shakouri, BImproved thermoelectric power factor in metal-based superlattices,[ Phys. Rev. Lett., vol. 92, no. 10, pp , [81] VV, BElectronic and thermoelectric transport in semiconductor and metallic superlattices,[ J. Appl. Phys., vol. 95, no. 3, pp , [82] VV, BHigh performance multi barrier thermionic devices,[ presented at the Int. Conf. Thermoelectrics, Adelaide, Australia, [83] Z. Bian and A. Shakouri, BEnhanced solid-state thermionic emission in nonplanar heterostructures,[ Appl. Phys. Lett., vol. 88, no. 1, pp , Jan. 2, [84] A. Wilk, A. R. Kovsh, S. S. Mikhrin, C. Chaix, I. I. Novikov, M. V. Maximov, Y. M. Shernyakov, V. M. Ustinov, and N. N. Ledentsov, BHigh-power 1.3 m InAs/GaInAs/GaAs QD lasers grown in a multiwafer MBE production system,[ J. Crystal Growth, vol. 278, no. 1 4, pp , [85] R. Singh, D. Vashaee, Y. Zhang, M. Negassi, A. Shakouri, Y. Okuno, G. Zeng, C. LaBounty, and J. Bowers, BExperimental characterization and modeling of InP-based microcoolers,[ presented at the Material Research Soc. Meeting, Boston, MA, Fall, [86] C. J. LaBounty, A. Shakouri, G. Robinson, L. Esparza, P. Abraham, and J. E. Bowers, BExperimental investigation of thin film InGaAsP coolers,[ in Materials Research Society Symp. Proc.: Thermoelectric Materials 2000VThe Next Generation Materials for Small-Scale Refrigeration and Power Generation Applications, 2001, vol. 626, pp. Z Z [87] Y. Zhang, D. Vashaee, R. Singh, A. Shakouri, G. Zeng, and Y.-J. Chiu, BInfluence of doping concentration and ambient temperature on the cross-plane Seebeck coefficient of InGaAs/InAlAs superlattices,[ in Materials Research Society Symp. Proc.: Thermoelectric Materials 2003VResearch and Applications Symp., 2004, vol. 793, pp [88] C. LaBounty, G. Almuneau, A. Shakouri, and J. E. Bowers, BSb-based III-V cooler,[ presented at the 19th Int. Conf. Thermoelectrics, Cardiff, Wales, U.K., Aug [89] G. Zeng, A. Shakouri, C. L. Bounty, G. Robinson, E. Croke, P. Abraham, X. Fan, H. Reese, and J. E. Bowers, BSiGe micro-cooler,[ Electron. Lett., vol. 35, no. 24, pp , Nov. 25, [90] X. Fan, G. Zeng, C. LaBounty, E. Croke, D. Vashaee, A. Shakouri, C. Ahn, and J. E. Bowers, BHigh cooling power density SiGe/Si micro coolers,[ Electron. Lett., vol. 37, no. 2, pp , Jan. 18, [91] X. Fan, G. Zeng, E. Croke, G. Robinson, C. LaBounty, A. Shakouri, and J. E. Bowers, BSiGe/Si superlattice coolers,[ Phys. Low-Dimens. Struct., no. 5 6, pp. 1 9, [92] ANSYS release no. 7.0, ANSYS, Inc., Canonsburg, PA, [93] S. Dilhaire, Y. Ezzahri, S. Grauby, W. Claeys, J. Christofferson, Y. Zhang, and A. Shakouri, BThermal and thermomechanical study of micro-refrigerators on a chip based on semiconductor heterostructures,[ in Proc. 22nd Int. Conf. Thermoelectrics (ICT 03), pp [94] Y. Zhang, D. Vashaee, J. Christofferson, G. Zeng, C. LaBounty, J. Piprek, E. Croke, A. Shakouri et al., B3-D electrothermal simulation of heterostructure thin film microcooler,[ presented at the ASME Symp. Analysis and Applications of Heat Pump and Refrigeration Systems, Washington, DC, Proceedings of the IEEE Vol.94,No.8,August2006

25 [95] D. Vashaee, J. Christofferson, Y. Zhang, A. Shakouri, G. Zeng, C. LaBounty, X. Fan, J. Piprek, J. Bowers, and E. Croke, BModeling and optimization of single-element bulk SiGe thin-film coolers,[ Microscale Thermophys. Eng., vol. 9, no. 1, pp , Mar [96] G. Zeng, X. Fan, C. LaBounty, E. Croke, Y. Zhan, J. Christofferson, D. Vashaee, A. Shakouri, and J. E. Bowers, BCooling power density of SiGe/Si superlattice micro refrigerators,[ in Materials Research Soc. Symp. Proc.: Thermoelectric Materials 2003VResearch and Applications Symp., vol. 793, pp [97] A. Shakouri and C. LaBounty, BMaterial optimization for heterostructure integrated thermionic coolers,[ Proc. 18th Int. Conf. Thermoelectrics (ICT 99), pp [98] A. Fitting, J. Christofferson, A. Shakouri, X. Fan, G. Zeng, C. LaBounty, J. E. Bowers, and E. Croke, BTransient response of thin film SiGe micro coolers,[ presented at the Int. Mechanical Engineering Congr. and Exhibition (IMECE 2001), New York, [99] A. Shakouri and Y. Zhang, BOn-chip solid-state cooling for integrated circuits using thin-film microrefrigerators,[ IEEE Trans. Compon. Packag. Technol., vol. 28, no. 1, pp , Mar [100] K. Fukutani, Y. Zhang, and A. Shakouri, BSolid-state microrefrigerators on a chip,[ Electron. Cooling Mag., Jul. 2006, to be published. [101] X. Fan, Ph.D. dissertation, Univ. California, Santa Barbara, [102] D. Vashaee, Ph.D. dissertation, Univ. California, Santa Cruz, [103] S. T. Huxtable, A. R. Abramson, C.-L. Tien, A. Majumdar, C. LaBounty, X. Fan, G. Zeng, J. E. Bowers, A. Shakouri, and E. T. Croke, BThermal conductivity of Si/SiGe and SiGe/SiGe superlattices,[ Appl. Phys. Lett., vol. 80, no. 10, pp , Mar. 11, [104] D. G. Cahill, BThermal conductivity measurement from 30 to 750 K: The 3omega method,[ Rev. Sci. Instrum., vol. 61, p. 802, [105] Y. Zhang, G. Zeng, R. Singh, J. Christofferson, E. Croke, J. E. Bowers, and A. Shakouri, BMeasurement of seebeck coefficient perpendicular to SiGe superlattice,[ in Proc. 21st Int. Conf. Thermoelectrics (ICT 02), pp [106] X. Fan, G. Zeng, C. LaBounty, D. Vashaee, J. Christofferson, A. Shakouri, and J. E. Bowers, BIntegrated cooling for Si-based microelectronics,[ in Proc. 20th Int. Conf. Thermoelectrics (ICT 01), pp [107] T. C. Harman, BSpecial techniques for measurement of thermoelectric properties,[ J. Appl. Phys., vol. 29, no. 9, pp , Sep [108] Z. Bian, Y. Zhang, H. Schmidt, and A. Shakouri, BThin film ZT characterization using transient Harman technique,[ in Proc. 24th Int. Conf. Thermoelectrics (ICT), 2005, pp [109] R. Singh, Z. Bian, G. Zeng, J. Zide, J. Christofferson, H.-F. Chou, A. Gossard, J. Bowers, and A. Shakouri, BTransient Harman measurement of the cross-plane ZT of InGaAs/InGaAlAs superlattices with embedded ErAs nanoparticles,[ presented at the Materials Research Soc. Fall Meeting, Boston, MA, [110] K. Fukutani and A. Shakouri, BOptimization of thin film microcoolers for hot spot removal in packaged integrated circuit chips,[ in Proc. 22nd Annu. IEEE Semiconductor Thermal Measurement and Management Symp., 2006, pp [111] K. Fukutani, Y. Zhang, and A. Shakouri, IEEE Trans. Compon. Packag. Technol., 2006, submitted for publication. [112] Y. Zhang, G. Zeng, A. Bar-Cohen, and A. Shakouri, BIs ZT the main performance factor for hot spot cooling using 3-D microrefrigerators?,[ presented at the IMAPS on Thermal Management, Palo Alto, CA, 2005, Student Competition Award. [113] A. Bar-Cohen, P. Wang, B. Yang, Y. Zhang, and A. Shakouri, BThermo-electri modeling of multiple micro-coolers for hot-spot thermal management,[ presented at the InterPack 05 Conf., San Francisco, CA, [114] Y. Zhang, A. Shakouri, A. Bar-Cohen, P. Wang, and B. Yang, BExperimental demonstration of microrefrigerator flip-chip bonded with IC chips for hot-spots thermal management,[ presented at the InterPack 05 Conf., San Francisco, CA, Jul [115] Y. Zhang, G. Zeng, A. Shakouri, and A. Bar-Cohen, B3-D microrefrigerators application on hot spot removal with trench structures,[ IEEE Trans. Compon. Packag. Technol., 2006, submitted for publication. [116] Y. Zhang, G. Zeng, and A. Shakouri, BHigh power density spot cooling with bulk thermoelectric,[ Appl. Phys. Lett., vol. 85, no. 14, pp , Oct [117] VV, BSilicon microrefrigerator,[ IEEE Trans. Compon. Packag. Technol., 2006, to be published. [118] A. Shakouri and S. Li, BThermoelectric power factor for electrically conductive polymers,[ Proc. Int. Conf. Thermoelectrics, 1999, pp [119] H. Bottner, BThermoelectric micro devices: current state, recent development and future aspects for technological progress and applications,[ in Proc. 21st Int. Conf. Thermoelectrics (ICT 02), pp [120] U. Ghoshal, S. Ghoshal, C. McDowell, L. Shi, S. Cordes, and M. Farinelli, BEnhanced thermoelectric cooling at cold junction interfaces,[ Appl. Phys. Lett., vol. 80, no. 16, pp , Apr. 22, [121] G. J. Snyder, J. R. Lim, C.-K. Huang, and J.-P. Fleurial, BThermoelectric microdevice fabricated by a MEMS-like electrochemical process,[ Nature Mater., vol. 2, no. 8, pp , Aug [122] T. Caillat, J. P. Fleurial, and A. Borshchevsky, BSkutterudites for thermoelectric applications,[ in Proc. 15th Int. Conf. Thermoelectrics, 1996, pp [123] T. Tritt, Ed., Semiconductors and Semimetals, vol , Recent Trends in Thermoelectric Materials Research, pt. I III. New York: Academic, [124] G. S. Nolas, G. A. Slack, J. L. Cohn, and S. B. Schujman, BThe next generation of thermoelectric materials,[ in Proc. 17th Int. Conf. Thermoelectrics (ICT 98), pp [125] D.-Y. Chung, T. Hogan, P. Brazis, M. Rocci-Lane, C. Kannewurf, M. Bastea, C. Uher, and M. G. Kanatzidis, B CsBi 4 Te 6 : A high-performance thermoelectric material for low-temperature applications,[ Science, vol. 287, pp , Feb. 11, [126] D. Vashaee and A. Shakouri, BHgCdTe superlattices for solid-state cryogenic refrigeration,[ Appl. Phys. Lett., vol. 88, no. 13, pp , Mar. 27, [127] G. N. Hatsopoulos and J. Kaye, BMeasured thermal efficiencies of a diode configuration of a thermo electron engine,[ J. Appl. Phys., vol. 29, pp , [128] Y. Hishinuma, B. Y. Moyzhes, T. H. Geballe, and T. W. Kenny, BVacuum thermionic refrigeration with a semiconductor heterojunction structure,[ Appl. Phys. Lett., vol. 81, no. 22, pp , Nov. 25, [129] Y. Hishinuma, T. H. Geballe, B. Y. Moyzhes, and T. W. Kenny, BMeasurements of cooling by room-temperature thermionic emission across a nanometer gap,[ J. Appl. Phys., vol. 94, no. 7, pp , Oct. 1, [130] R. Tsu and R. F. Greene, BInverse Nottingham effect cooling in semiconductors,[ Electrochem. Solid-State Lett., vol. 2, no. 12, pp , Dec [131] A. N. Korotkov and K. K. Likharev, BPossible cooling by resonant Fowler Nordheim emission,[ Appl. Phys. Lett., vol. 75, no. 16, pp , Oct. 18, [132] T. S. Fisher and D. G. Walker, BThermal and electrical energy transport and conversion in nanoscale electron field emission processes,[ J. Heat Transf., Trans. ASME, vol. 124, no. 5, pp , Oct [133] T. S. Fisher, D. G. Walker, and R. A. Weller, BAnalysis and simulation of anode heating due to electron field emission,[ IEEE Trans. Compon. Packag. Technol., vol. 26, no. 2, pp , Jun [134] Y. Tzeng, Y. Chen, and C. Liu, BFabrication and characterization of non-planar high-current-density carbon-nanotube coated cold cathodes,[ Diam. Relat. Mater., vol. 12, no. 3 7, pp , Mar. Jul [135] J. T. L. Thong, C. H. Oon, W. K. Eng, W. D. Zhang, and L. M. Gan, BHigh-current field emission from a vertically aligned carbon nanotube field emitter array,[ Appl. Phys. Lett., vol. 79, no. 17, pp , Oct. 22, [136] F. A. M. Kock, J. M. Garguilo, B. Brown, and R. J. Nemanich, BEnhanced low-temperature thermionic field emission from surface-treated N-doped diamond films,[ Diam. Relat. Mater., vol. 11, no. 3 6, pp , Mar. Jun [137] F. A. M. Kock, J. M. Garguilo, Y. Wang, B. Shields, and R. J. Nemanich, BVacuum thermionic emission and energy conversion from nanostructured carbon materials,[ presented at the Materials Research Soc. Fall Meeting, Symp. S, Boston, MA, [138] F. A. M. Koeck and R. J. Nemanich, BSulfur doped nanocrystalline diamond films as field enhancement based thermionic emitters and their role in energy conversion,[ Diam. Relat. Mater., vol. 14, no , pp , Nov [139] A. Shakouri and J. E. Bowers, BHeterostructure integrated thermionic refrigeration,[ in Proc. 16th Int. Conf. Thermoelectrics (ICT 97), pp [140] K. P. Pipe, R. J. Ram, and A. Shakouri, BInternal cooling in a semiconductor laser diode,[ IEEE Photon. Technol. Lett., vol. 14, no. 4, pp , Apr [141] C. E. Mungan, M. I. Buchwald, B. C. Edwards, R. I. Epstein, and T. R. Gosnell, BLaser cooling of a solid by 16 K starting from room temperature,[ Phys. Rev. Lett., vol. 78, no. 6, pp , [142] A. Joshi and A. Majumdar, BTransient ballistic and diffusive phonon heat transport in thin films,[ J. Appl. Phys., vol. 74, pp , Vol. 94, No. 8, August 2006 Proceedings of the IEEE 1637

26 [143] Y. S. Ju, BPhonon heat transport in silicon nanostructures,[ Appl. Phys. Lett., vol. 87, p , [144] M. A. Osman and D. Srivastava, BTemperature dependence of the thermal conductivity of single-wall carbon nanotubes,[ Nanotechnology, vol. 12, no. 1, pp , Mar [145] J. Hone, M. Whitney, C. Piskoti, and A. Zettl, Phys. Rev. B, Condens. Matter, vol. 59, p. R2514, [146] J. Hone, M. C. Llaguno, M. J. Biercuk, A. T. Johnson, B. Batlogg, Z. Benes, and J. E. Fischer, BThermal properties of carbon nanotubes and nanotube-based materials,[ Appl. Phys. A, vol. A74, no. 3, pp , Mar [147] M. Fujii, X. Zhang, H. Xie, H. Ago, K. Takahashi, T. Ikuta, H. Abe, and T. Shimizu, BMeasuring the thermal conductivity of a single carbon nanotube,[ Phys. Rev. Lett., vol. 95, p , [148] D. M. Rowe, Thermoelectrics Handbook: Macro to Nano. Boca Raton, FL: CRC, [149] Y.-M. Lin and M. S. Dresselhaus, BThermoelectric properties of superlattice nanowires,[ Phys. Rev. B, Condens. Matter, vol. 68, p , [150] B. Moyzhes, BPossible ways for efficiency improvement of thermoelectric materials,[ in Proc. 15th Int. Conf. Thermoelectrics, 1996, pp [151] K. Bacher, S. Massie, D. Hartzel, and T. Stewart, BPresent ability of commercial molecular beam epitaxy,[ in Proc Int. Conf. Indium Phosphide and Related Materials, pp [152] Y. Zhang, Z. Bian, and A. Shakouri, BImproved energy conversion efficiency by optimizing the geometry of thermoelectric leg elements,[ in Proc. 24th Int. Conf. Thermoelectrics, 2005, pp [153] Y. Zhang, J. Christofferson, A. Shakouri, G. Zeng, J. E. Bowers, and E. Croke, BHigh speed localized cooling using SiGe superlattice microrefrigerators,[ in Proc. 19th Annu. IEEE Semiconductor Thermal Measurement and Management Symp., 2003, pp [154] D. Li, S. T. Huxtable, A. R. Abramson, and A. Majumdar, BThermal transport in nanostructured solid-state cooling devices,[ J. Heat Transf., Trans. ASME, vol. 127, no. 1, pp , Jan [155] G. L. Solbrekken, Y. Zhang, A. Bar-Cohen, and A. Shakouri, BUse of superlattice thermionic emission for Fhot spot_ reduction in convectively-cooled chip,[ in Proc. 9th Intersoc. Conf. Thermal and Thermomechanical Phenomena in Electronic Systems (ITHERM 04), pp [156] D. G. Walker, C. T. Harris, T. S. Fisher, and J. L. Davidson, BEstimation of parameters in thermal-field emission from diamond,[ Diam. Relat. Mater., vol. 14, no. 1, pp , Jan [157] F. A. M. Koeck and R. J. Nemanich, BEmission characterization from nitrogen-doped diamond with respect to energy conversion,[ Diam. Relat. Mater., vol. 15, no. 2 3, pp , Feb. Mar [158] C. Yu, L. Shi, Z. Yao, D. Li, and A. Majumdar, BThermal conductance and thermopower of an individual single-wall carbon nanotube,[ Nano. Lett., vol. 5, pp , [159] J. Zhou, Q. Jin, J. H. Seol, X. Li, and L. Shi, BThermoelectric properties of individual electrodeposited bismuth telluride nanowires,[ Appl. Phys. Lett., vol. 87, pp , [160] A. Mavrokefalos, M. T. Pettes, F. Zhou, and L. Shi, BCombined thermoelectric and structure characterizations of patterned and synthetic nanowires,[ presented at the Int. Conf. Thermoelectrics, Vienna, Austria, Aug [161] P. Wang, A. Bar-Cohen, B. Yang, G. L. Solbrekken, and A. Shakouri, BAnalytical modeling of silicon thermoelectric microcooler,[ J. Appl. Phys., vol. 100, p , [162] W. Liu and M. Asheghi, BModeling and data for thermal conductivity for single crystal SOI layers at high temperature,[ IEEE Trans. Electron Devices, 2006, to be published. [163] VV, BThermal conduction in ultra-thin pure and doped silicon at high temperature,[ J. Appl. Phys., vol. 98, p , ABOUT THE AUTHOR Ali Shakouri received the undergraduate degree from Ecole Nationale Superieure des Telecommunications de Paris, France, in 1990 and the Ph.D. from the California Institute of Technology, Pasadena, in He is Professor of Electrical Engineering at University of California Santa Cruz (UCSC). He was the Technical Director for DARPA Heretic project that demonstrated SiGe-based microrefrigerators on a chip. He is currently the Director of the Thermionic Energy Conversion Center, an Office of Naval Research multiuniversity research initiative aiming to improve direct thermal to electric energy conversion technologies. His current research is on nanoscale heat and current transport in semiconductor devices, submicrometer thermal and ac imaging, microrefrigerators on a chip, and novel optoelectronic ICs. He received the Packard Fellowship in 1999, the NSF Career award in 2000, and the UCSC School of Engineering FIRST Professor Award in Proceedings of the IEEE Vol.94,No.8,August2006