Design of Nonlinear Controller and Analysis of Nonlinear Phenomena in Non-Minimum Phase DC-DC Switched Mode Converter

Transcription

1 Internatnal Jurnal f Scentfc and esearch Publcatns, lume 7, Issue, Octber 7 33 Desgn f Nnlnear Cntrller and Analyss f Nnlnear Phenmena n Nn-Mnmum Phase DC-DC Swtched Mde Cnverter Nehaashsth, ajeev Gupta Department f Electrncs Engneerng Unversty Cllege f Engneerng, ajasthan echncal Unversty, Kta, ajasthan Abstract- hs paper prvdes desgn and mplementatn detals f sldng mde cntrller fr buck-bst cnverter n cntnuus cnductn mde (CCM. hs paper als lks n t the nnlnear dynamcs f the pwer cnverter such as chas and bfurcatn n partcular. MAAB-Smulnk based smulatn has been carred ut t llustrate the smulatn results. Index erms- Buck-Bst cnverter; sldng mde cntrller; chas; bfurcatn I. INODUCION Swtched mde pwer cnverter (SMPC plays a vtal rle n dfferent applcatns rangng frm dstrbuted generatn, electrc vehcle, prtable electrnc prducts and cnsumer electrncs. SMPC s a nnlnear electrnc crcut whse dynamcs change wth the change n the pstn f the swtch. here are numerus tplges f SMPC and bst and buckbst cnverter are sme wdely used cnverter tplgy. he utput vltage t duty cycle transfer functn f bst and buckbst cnverter exhbt nn-mnmum phase behavr whch means a zer n the rght half f s-plane. here are several ways t mtgate the nn-mnmum phase behavr f the cnverter. he man am f swtched mde pwer cnverter s t ether step-dwn r step-up the unregulated DC vltage and prvde regulated DC vltage. here are dfferent cntrllers used fr cntrllng the DC vltage f swtched mde pwer cnverter. he cntrllers can be classfed as lnear cntrller r nnlnear cntrller. In lnear cntrller, classcal PID cntrller are gd ptn but the PID cntrller fals t cntrl the system wth large sgnal dsturbance. herefre, nnlnear cntrllers are used. Sldng mde cntrl s ne f the wdely used cntrl scheme used fr cntrl f DC-DC cnverter as the cntrller s rbust t change n parameters. Mathematcal mdel f buck-bst cnverter n transent state has been frmulated usng aplace transfrm and z-transfrm n []. Buck-bst cnverter s a nn-mnmum phase system because the transfer functn f buck-bst cnverter pssess a rght half plane zer (HPZ n transfer functn. Due t such characterstcs f the duty cycle f the cnverter crsses.5 n peak current mde cntrl, harmnc scllatns are created whch leads t chas. he cmplete analyss f bfurcatn and chas f buck-bst cnverter has been reprted n [,5,,4]. Fr wde range f peratn f buck-bst cnverter, duble lp cntrl s used where current lp s cnsdered as the nner lp and vltage lp s cnsdered as the utput lp [3]. bust cntrl f buck-bst cnverter s presented n [4]. Adaptve back-steppng cntrl f buck-bst cnverter s presented n [6]. Cascaded PID cntrl f buck-bst cnverter s studed n [7]. PWM based sldng mde cntrl f DC-DC cnverter peratng n dscntnuus cnductn mde (DCM has been studed n [8]. here are dfferent ways t cntrl the chatc behavr f DC-DC cnverter whch has been presented n []. Perd-dublng bfurcatn f DC-DC cnverter has been reprted n []. Current cntrlled Buck-Bst cnverter wth ramp cmpensatn peratng n DCM has been studed n [3]. Dscrete tme map fr analyss f bfurcatn and chas n DC- DC cnverter s reprted n [5]. Matyet al., studed the bfurcatn f vltage mde cntrlled Buck cnverter usng exact dscrete mdel [6]. Frm the abve dscussn t can be bserved that the nnlnear analyss and nnlnear cntrller desgn has been an emergng area f research fr pwer electrncs prfessnal. hs paper attempts t prvde a detaled analyss f nnlnearty f SMPC and aspects f nnlnear cntrller desgn. hs paper prvdes desgn detals f sldng mde cntrller fr buck-bst cnverter and prvdes detals f nnlnear dynamcs f buckbst cnverter. hs paper s rganzed as fllws. Sectn II prvdes mathematcal mdel f buck-bst cnverter (state-space average mdel and dscrete-tme mdel. Sectn III prvdes sldng mde cntrl f buck-bst cnverter under CCM and DCM. Sectn I prvdes prelmnary cncepts f bfurcatn and chas. Sectn prvdes nnlnear phenmena f buck-bst cnverter. Sectn I presents smulatn results. Sectn II cncludes the paper. II. MAHEMAICA MODE OF BUCK-BOOS CONEE he crcut dagram f buck-bst cnverter s shwn n Fgure. n Fg.. Crcut dagram f buck-bst cnverter D C

2 Internatnal Jurnal f Scentfc and esearch Publcatns, lume 7, Issue, Octber 7 34 d he vltage gan f Buck-Bst Cnverter s d he current rpple f Buck-Bst Cnverter s I I ( d s he vltage rpple f Buck-Bst cnverter s ds C he cnverter has tw states.e ON state and OFF state. he dynamcs f cnverter n these states can be represented as x Ax Bu ON State y Cx Du x Ax Bu OFF State y Cx Du Here the state varables are defned as x u n y c n A B C( C ( ( A B C( C( C he dynamcs f ON state can be represented as n d dt c C( c c he dynamcs f OFF state can be represented as n ( d dt c C( C( c c he state-space average methd can be represented as ( ( ( ( ( ( ( ( x Ad d A x Bd d B u y Cd d C x Dd d D u Frm the small-sgnal mdel, the transfer functn f buck-bst cnverter can be derved. ( s sc ( s ( D s Cs ( D ( D Cntrl current gan f buck-bst cnverter C ( ( s s D D 3 d( s ( D s Cs ( D ( D Aud susceptblty f buck-bst cnverter ( s D ( s ( D s Cs ( D ( D Cntrl vltage gan f buck-bst cnverter D s ( s ( D n d( s ( D s Cs ( D ( D III. CONOE DESIGN FO DC-DC BUCK-BOOS CONEE he basc cntrl scheme fr DC-DC buck-bst cnverter s vltage mde cntrller. But the vltage mde cntrller has dfferent lmtatns such as (a pr lne and lad regulatn, (b pr current cntrl and (c slwer transent respnse. n

3 Internatnal Jurnal f Scentfc and esearch Publcatns, lume 7, Issue, Octber 7 35 herefre, current mde cntrl scheme s used. In current mde cntrl scheme, the nductr current s measured and the current s cmpared wth a reference current t derve PWM sgnal fr the swtch. Fg. (a shws the current mde cntrl (CMC f Buck-Bst cnverter and Fg. (b shws the wavefrm f CMC. S D C I Iref Clck (a Fg. 3. Fxed-frequency sldng mde cntrl f buck-bst cnverter under CCM Fg. 3 shws the fxed-frequency sldng mde cntrl f buckbst cnverter under CCM. In the sldng mde cntrl, three state varables are cnsdered such as (a vltage errr, (b dervatve f vltage errr and (c ntegratn f vltage errr. he state-varables fr the sldng mde cntrl can be defned as (b Fg.. (a Buck-Bst cnverter n current mde cntrl, (b Output vltage and current f cnverter n current mde cntrl Sldng Mde Cntrller Sldng mde cntrl s a partcular type f the varable structure cntrl system (SCS, whch s characterzed by a dscntnuus feedback cntrl structure that swtches as the system crsses certan manfld n the state space t frce the system state t reach, and subsequently t reman n a specfed surface wthn the state space called sldng surface. he swtchng functn (sldng varable s a functn f the states and the sldng surface represents a relatnshp between the state varables. he system dynamcs when cnfned t the sldng surface s referred as an deal sldng mtn and represents the cntrlled system behavur, whch results n reduced rder dynamcs wth respect t the rgnal plant. ref βv x d x x ( ref βv dt x 3 ( ref βv dt he abve equatn can be further smplfed as ref βv x ( u x x dt βv βvu B rc C x 3 ( ref β v dt he tme dfferentatn f abve equatn can be represented as x x βv βv x x ub u B u rc C C x 3 x 3 he swtchng functn f generalzed sldng mde cntrl S > can be represented as u S < 3 Where S x J x α Here J [ α α α ] 3 ensure exstence cndtn, fllwng reachablty cndtn must be satsfed lm SS < S

4 Internatnal Jurnal f Scentfc and esearch Publcatns, lume 7, Issue, Octber 7 36 ds J Ax dt J Bueq ds akng dt, we get u eq J B J Ax Substtutng the values, we get β α α3c u β βu B α rc αβ u B eq eq ( eq c ref he equvalent cntrl functn s derved as * α α3 < ueq β c C ( ref β βu Beq < βu Beq α rc α he cntrl sgnal and ramp sgnal are represented as α α3 β C ( β β u α rc α ramp βu beq c c ref beq I. BIFUCAION AND CHAOS A sudden change n the qualtatve behavr f a system s termed a bfurcatn. Successve bfurcatns lead t nstablty n pwer electrnc cnverters. he type f bfurcatn s classed by the qualtatve change that takes place when a parameter s vared. Hw far a system s frm nstablty s termed the stablty margn. here are tw metrcs t cnsder; the phase margn and the gan margn. Bfurcatns that ccur n pwer electrnc cnverters are typcally classed as standard (smth bfurcatns r nnstandard (nn-smth bfurcatns. Smth bfurcatns d nt nvlve any structural change asscated wth the lss n stablty. In cntnuus tme systems, they ccur when the real part f ne, r mre, f the egenvalues f the system s greater than zer. In dscrete-tme systems, they ccur when the magntude f the egenvalue s greater than. ypcally, fr pwer electrnc cnverters, smth bfurcatns can be classfed nt tw categres; slw-scale bfurcatns and fast-scale bfurcatns whch lead t slw scale nstablty and fast-scale nstablty. ypcal types f bfurcatns that ccur n pwer electrnc cnverters are Hpf bfurcatns and perddublng bfurcatns. Nn-smth bfurcatns d cause a structural change and are characterzed by a sudden jump f the peratng pnt. hey ccur due t nteractns between system trajectres and state-space bundares where the system swtches frm ne cnfguratn t anther. Brder cllsn bfurcatns and grazng bfurcatns are types exhbted by pwer electrnc cnverters. Fg. 4 llustrate the classfcatn f dfferent bfurcatn n nnlnear dynamcs whereas Fg. 5 shws the dfferent bfurcatn dagram. Bfurcatn Bfurcatn Hpf Dublng Saddle-nde Cllsn Fg. 4. Classfcatn f Bfurcatn Fg. 5. (a Saddle-nde bfurcatn, (b transcrtcal bfurcatn, (c supercrtcal bfurcatn (d Super-crtcal ptch frk bfurcatn (e Hpf bfurcatn (f Perd dublng bfurcatn Chas ccurs n nnlnear systems and results n the seemngly randm mvement f trajectres wthn a bunded state-space. A chatc trajectry s unpredctable n the lng term; knwng the trajectry nw des nt guarantee knwng where the trajectry wll end up. hs cntradcts the defntn f a determnstc system. Hwever, determnstc systems can exhbt chatc behavr. he key prperty f chas s the senstvty f nnlnear systems t ntal cndtns. Even a small errr n specfyng the ntal cndtns t a system can result n large dfferences n the utput as tme evlves. Hence, the lng term predctablty f a chatc system s unpredctable n a practcal sense. Cnsder a lgstc map x rx ( x k k k Fg. 6 shws the bfurcatn dagram f abve lgstc map.

5 Internatnal Jurnal f Scentfc and esearch Publcatns, lume 7, Issue, Octber 7 37 x n Bfurcatn dagram f the lgstc map tn tn where t n Iref vn exp τc τc a ω a Iref Fg. 6. Bfurcatn dagram f lgstc map functn. NONINEA PHENOMENA OF BUCK-BOOS CONEE he dfference equatn f the cnverter can be represented by ( α N x f x,, x, α n Where [ ] n x c d S clsed dt When S s clsed, dvc vc C S clsed dt ( ref n I he slutn f the abve equatn s tn he capactr vltage at the sad tme can be represented as tn c( tn nexp C d vc S pen dt When S s pen, dvc vc C S pen dt Frm the abve cndtn, the secnd rder dfferental equatn can be btaned as d d ( ( ( dt C dt C C he slutn fr abve hmgeneus equatn can be represented as λ, C ± 4 C C he fnal hmgeneus slutn can be represented as t ( t exp ( asn ωt acsωt τ C r I. SIMUAION ESUS hs sectn prvdes smulatn results f the sad cntrller and the cnverter. MAAB-Smulnk has been used t carry ut the necessary smulatns. ABE I. SYSEM PAAMEES Parameters Symbl alue Input ltage n Capactance C 7µF Capactr ES c.ω Inductance µh Inductr esstance.ω Swtchng Frequency f sw khz ad.5ω t 5Ω Desred Output ltage 4 (Bst, ref 5 (Buck Fgure 7(a and Fgure 7(b shws the vltage and current f buck-bst cnverter peratng n CCM n bst mde and cntrlled usng fxed-frequency sldng mde cntrller. Fgure 8(a and Fgure 8(b shws the vltage and current f buck-bst cnverter peratng n CCM n buck mde and cntrlled usng fxed-frequency sldng mde cntrller. he lne regulatn and the lad regulatn prperty f the sldng mde cntrller s shwn n able II and able III. ltage ( Current (A me (sec me (sec (a

6 Internatnal Jurnal f Scentfc and esearch Publcatns, lume 7, Issue, Octber 7 38 Fg. 8. Bfurcatn behavr f buck-bst cnverter wth varatn f nductr current and reference current ltage ( me (sec Current (A me (sec Fg. 7. Output vltage and current f cnverter f buck-bst cnverter n (a Bst mde (b Buck mde ABE II. (b INE EGUAION INPU OAGE OAGE DEIAION % CHANGE n..5% n 6.5.8% n 8.8.5% ABE III. OAD EGUAION OAD OAGE DEIAION % CHANGE Mnmum lad..8% Half lad.35.6% Full lad.8.% In nnlnear analyss, the effect f change f nductr current and the effect f change f nput vltage has been shwn n Fgure 8 and Fgure 9 respectvely. he perd dublng bfurcatn behavr can be seen due t the change n nductr current and nput vltage. Fg. 9. Bfurcatn behavr f buck-bst cnverter wth varatn f nductr current and vltage II. CONCUSIONS hs paper prvdes sldng mde cntrller desgn fr buckbst cnverter. he sldng mde cnverter s used because t s faster than cnventnal PI type cntrller and easer t desgn and mplement. As cnverter s a nnlnear entty, sldng mde cntrller s ne f the best sutable chce fr ts cntrl. Nnlnear dynamcs such as chas and bfurcatn n swtched mde pwer cnverter has als been analyzed n ths paper. EFEENCES [] Hamed Mashnch Mahery, Ebrahm Babe, Mathematcal mdelng f buck-bst DC-DC cnverter and nvestgatn f cnverter elements n transent and steady state respnses, Electrcal Pwer and Energy Systems, 44, 3, pp [] K.W.E Cheng, M. u, J. Wu, Chas study and parameter-space analyss f the DC-DC buck-bst cnverter, IEEE Prc. Electrc Pwer Applcatn, vl. 5, n., 3, pp [3] Z.Chen, Duble lp cntrl f buck-bst cnverters fr wde range f lad resstance and reference vltage, IE Cntrl hery and Applcatns, vl. 6, ss. 7,, pp [4] Smne Bus, Desgn f rbust vltage cntrller fr a buck-bst cnverter usng µ-synthess, IEEE rans. Cntrl Syst. echnl., vl. 7, n., Mar 999, pp. -9. [5] K.W.E Cheng, M. u, J. Wu, Expermental study f bfurcatn and chas n the buck-bst cnverter, IEEE Prc. Electrc Pwer Applcatn, vl. 5, n., 3, pp [6] Mahd Salm, Jafar Sltan, Ghlamreza Arab Markadeh, Navd eza Abjad, Indrect utput vltage regulatn f DC-DC buck/bst cnverter peratng n cntnuus and dscntnuus cnductn mdes usng adaptve backsteppng apprach, IE Pwer Electrncs, vl. 6, ss. 4,, pp [7] Zhng Wu, Janhu Zha, Jyang Zhang, Cascaded PID cntrl f buckbst type DC/DC pwer cnverters, n Prc. 6 th wrld cngress n ntellgent cntrl, 6, pp [8] S.C an, Y.M a, C. K se,. Martnez-Salamer, Specal famly f PWM based sldng mde vltage cntrllers fr basc DC-DC cnverters n dscntnuus cnductn mde, IE Electr. Pwer Appl., vl., n., Jan 7, pp [9] K Davd Yung, adm I. Utkn and Umt Ozguner, A cntrl engneer s gude t sldng mde cntrl, IEEE ransactns n Cntrl Systems echnlgy, vl. 7, n. 3, May 999, pp

7 Internatnal Jurnal f Scentfc and esearch Publcatns, lume 7, Issue, Octber 7 39 [] Ammar N. Natsheh, J. Grdn Kettlebrugh, Natala B. Jansn, Expermental study f cntrllng chas n a DC-DC bst cnverter. Chas, Sltns and Fractals, 4, 9, pp [] ghayeh Gavagsaz-Ghachan, Matheept Phattanasak, Jean-Phlppe Martn, Serge Perfederc, Babak Nahd-Mbarakeh, Bernard Davat, Generalsatn f an averaged mdel apprach t estmate the perd dublng bfurcatn nset n pwer cnverters, IE Pwer Electrncs, vl. 9, ss. 5, 6, pp [] A. Gupta, S. Banerjee, D. Kastha, Expermental study f bfurcatns n the current cntrlled DC-DC buck-bst cnverter, n Prc. Natnal Cnference n Nnlnear Systems and Dynamcs, 3, pp [3] Ba B-Cheng, Xu Jan-Png, u Zhng, Mde shft and stablty cntrl f a current mde cntrlled buck-bst cnverter peratng n dscntnuus cnductn mde wth ramp cmpensatn, Chenese Physcs B, vl. 8, n., 9, pp [4] Hngchen u and Shuang Yang, Study n nnlnear phenmena n buckbst cnverter wth swtch nductr structure, Mathematcal prblems n engneerng, 3, pp. -9. [5] Mar d Bernard, and Francesc asca, Dscrete-tme maps fr the analyss f Bfurcatn and chas n DC/DC cnverters IEEE ransactns n Crcuts and Systems-Part I: Fundamental hery and Applcatns, vl. 47, n., Feb, pp [6] Smnath Maty, Dvyendu rpathy, apas Kumar Bhattacharya, and Sumtr Banerjee, Bfurcatn Analyss f PWM-I vltage mde Cntrlled Buck Cnverter Usng the Exact Dscrete Mdel, IEEE ransactns n Crcuts and Systems-I: egular Paper, vl 54, n. 5, May 7, pp. -3.