6545(Print), ISSN (Online) Volume 4, Issue 3, May - June (2013), IAEME & TECHNOLOGY (IJEET)
|
|
- Jean Lewis
- 5 years ago
- Views:
Transcription
1 INTERNATIONAL International Journal of JOURNAL Electrical Engineering OF ELECTRICAL and Technology (IJEET), ENGINEERING ISSN 0976 & TECHNOLOGY (IJEET) ISSN (Print) ISSN (Online) Volume 4, Issue 3, May - June (2013), pp IAEME: Journal Impact Factor (2013): (Calculated by GISI) IJEET I A E M E PERFORMANCE EVALUATION OF REVERSIBLE LOGIC BASED CNTFET DEMULTIPLEXER Y.Varthamanan 1, V.Kannan 2 1 Research scholar, Sathyabama University, Chennai, Tamilnadu, India Principal, Jeppiaar Institute of Technology, Kunnam, Tamilnadu, India ABSTRACT This paper discuss about the design and analysis of a demultiplexer that is realized using carbon nano tube transistor using reversible logic. Reversible logic realization of the digital circuits offers numerous advantages then the conventional circuit design. Power analysis has been performed using HSPICE simulation software and the results are obtained for the 1:2 and 1:4 demultiplexer transient behavior and the power consumption obtained is 0.8 and 1.6 nano watts respectively. Comparative analysis has been performed with the conventional demultiplexer design to validate the proposed design performance. Keywords: CNTFET, Demultiplexer, Power, Reversible Logic I. INTRODUCTION The nano electronic is one of the greatest emerging fields of Nano Technology for developing such kinds of computer systems and other electronic gadgets. The Nano technology is being introducing in every fields of the Science and Technology such as in Bio technology, Bio Medical Science, Medical Science, Research, Aerospace and education etc. Nanotechnology is increasingly being used in consumer products across the globe. Nanoelectronics encompass nanoscale circuits and devices including (but not limited to) ultra-scaled FETs, quantum SETs, RTDs, spin devices, super lattice arrays, quantum coherent devices, molecular electronic devices, and carbon nanotubes. 53
2 In designing of computer depends upon the fundamental components as AND, NAND, OR, NOR, NOT and XOR gates. The designing of combinational circuits, memory and registers also depends upon these basic gates. To develop these logic gates at nano scale (10-9 ), the whole computer can be developed with nano electronics components. [8]. CNT as a channel in the Field Effect Transistors (FET) of both n-cnfet and p- CNFET types that are used. Because of its very small size, it has been s that a CNT-based FET switches reliably using much less power than a silicon-based device, and thus the new device will consume less power than traditional t-gate multiplexer. CNT device uses the fundamental Lorentz magnetic force from the basic laws of Electromagnetic as a switching mechanism between two conducting CNTs. Since a demultiplexer is a fundamental logic block, the new devices can have a wide range of applications in a wide variety of nano circuits. The most desirable future work involved in CNTFETs will be the transistor with higher reliability, cheap production cost, or the one with more enhanced performances. II. CARBON NANO TUBE FET Carbon nano tube structures are prominent in reducing the packaging density of the very large scale integrated circuits. The exceptional electrical properties of carbon nanotubes arise from the unique electronic structure of graphene itself that can roll up and form a hollow cylinder. The circumference of such carbon nanotube can be expressed in terms of a chiral vector: Ĉ h =nâ 1 +mâ 2 which connects two crystallographically equivalent sites of the two-dimensional graphene sheet. Here n and m are integers and â 1 and â 2 are the unit vectors of the hexagonal honeycomb lattice. Therefore, the structure of any carbon nanotube can be described by an index with a pair of integers (n,m) that define its chiral vector. A carbon Nanotube s band gap is directly affected by its chirality and diameter. If those properties can be controlled, CNTs would be a promising candidate for future nanoscale transistor devices. Moreover, because of the lack of boundaries in the perfect and hollow cylinder structure of CNTs, there is no boundary scattering. CNTs are also quasi- 1D materials in which only forward scattering and back scattering are allowed, and elastic scattering mean free paths in carbon nanotubes are long, typically on the order of micrometers. As a result, quasi-ballistic transport can be observed in nanotubes at relatively long lengths and low fields.[1]. Multi walled carbon nanotubes (MWCNTs) have huge potential for applications in electronics because of both their metallic and semiconducting properties and their ability to carry high current. CNTs can carry current density of the order 10 µa/nm2, while standard metal wires have a current carrying capability of the order 10 na/nm2. Semiconducting CNTs have been used to fabricate CNTFETs, which show promise due to their superior electrical characteristics over silicon based MOSFETs.[7]. 54
3 Fig..1 Multi-Walled Nanotube Transistor Ballistic model of CNTFET has numerous advantages over other models. Carbon nano tube is embedded between the insulator and the sio 2 layers. Chirality plays an important role in deciding the electrical characteristics. Fig. 2. Ballistic Carbon Nano Tube Field Effect Transistor The valence and conduction ction bands of the carbon nanotube are symmetric, which allows complementary structures in applications. The nearly ballistic transport at low bias implies the possibility of deriving carbon nanotube transistors. Both the metallic and semi conducting nanotubes can be exploited in integrated circuits as interconnection and active devices respectively [3-6]. Carbon nanotubes have shown reliability issues when operated under high electric field or temperature gradients.[7] ]. 55
4 III. REVERSIBLE LOGIC IN DIGITAL CIRCUITS A Reversible circuit has the facility to generate a unique output vector from each input vector, and vice versa.the gate/ circuit does not loose information is called reversible. Number of inputs is equal to the number of outputs. Every gate output that is not used as input to other gate or as a primary output is called garbage. The unutilized outputs from a gate are called garbage. Fig.3 represents reversible logic gate with garbage. Fig.4 represents typical Feynman gate. Table I represents the truth table of 2X2 Feynman Gate. Fig. 3. A typical reversible logic component Fig. 4. Feynman gate Table I: 2 x 2 Feynman Gate truth table Use as many outputs of every gate as possible, and thus minimize the garbage outputs. Do not create more constant inputs to gates that are absolutely necessary. Use as less number of reversible gates as possible to achieve the goal. 56
5 Fig. 5. Fredkin gate Table II is the truth table of the 4X4 Feynman gate. Table II: 4x 4 Feynman Gate truth table IV. REVERSIBLE LOGIC IMPLEMENTATION IN CNTFET Logically reversible process is that the output can be obtained by knowing the binary input of a logic gate, and the converse is true. A one to one mapping exists between the input string and output string. Mathematically speaking the function is bijective. An example of the logically reversible gate is NOT gate. Realization of the reversible logic using CNTFET is shown in the Fig.6 and Fig.7 for the proposed 1X2 and 1X4 demultiplexer circuits respectively. 57
6 DEMUX 1:2 S 2 S 2 1 Vdd M1 M6 S' 3 4 A B=0 5 M2 M7 6 S'A M3 M8 S 2 B=0 5 4 A M4 M9 S' 3 M5 M10 7 SA Fig. 6. 1:2 DEMUX Realization Demultiplexer realization using ballistic model of CNTFET is a novel approach in the digital circuit designing. This model has electrical and physical properties that are superior to other models. 2 S Fig. 7. 1:4 DEMUX Realization 58
7 V. RESULTS AND CONCLUSION Fig. 8 and Fig.9 represents the 1X2 and 1X4 demultiplexer transient response using reversible logic respectively. Fig.8 Transient Response of Reversible Logic 1:2 Demultiplexer Fig.9 Transient Response of Reversible Logic 1:4 Demultiplexer Fig.10 and Fig.11 represents the 1X2 and 1X4 CNTFET demultiplexer transient response using reversible logic respectively. 59
8 Fig. 10Transient Response of Reversible Logic based CNTFET 1:2 Demultiplexer Fig.11 Transient Response of Reversible Logic based CNTFET 1:4 Demultiplexer Table III gives the details of the number of transistors that have been used for reversible CNTFET and other models. Table IV elaborates the power consumption of 1X2 and 1X4 demultiplexer circuits using CNTFET reversible implementation and CMOS implementation. 60
9 Table III: No. of transistors for Different Demultiplexer design No. of Transistors Description Reversible CMOS Reversible CNTFET 1:2 DEMUX :4 DEMUX Table 1V: Power Analysis of Different Demultiplexer Design Total Power Dissipation in nano watts Description Reversible CMOS Reversible CNTFET 1:2 DEMUX :4 DEMUX Fig.12 represents the comprehensive analysis of power consumed by CMOS, Reversible and Reversible realized CNTFET. Fig. 12 Comparative analysis of Power Consumption Demultiplexer has been designed using CNTFET with reversible logic. Comparison table of power dissipation shows a greatest amount of power reduction has been achieved with the standard CNTFET model over a conventional CMOS. The dynamically reconfigurable universal cells exhibit the possibility to realize dense, regular and highly reconfigurable circuits in platform-based system on chip design. The unwanted growth of metallic tubes during the fabrication of CNTs is a major challenge that will affect the fabrication of robust CNT-based circuits. 61
10 REFERENCES [1] H. Dai, A. Javey, E. Pop, D. Mann, Y. Lu, "Electrical Properties and Field-Effect Transistors of Carbon Nanotubes," Nano: Brief Reports and Reviews 1, 1 (2006). [2] Anisur Rahman, Jing Guo, Supriyo Datta, and Mark S. Lundstrom. Theory of ballistic nanotransistors. Electron Devices, IEEE, 50(9): , September [3] Dafeng Zhou, Tom J Kazmierski and Bashir M Al-Hashimi, VHDL-AMS implementation of a numerical ballistic CNT model for logic circuit simulation - In IEEE Forum on Specification and Design Languages 2008, Southampton, SO17 1BJ, UK, [4] I. O Connor, J. Liu, F. Gaffiot. CNTFET-based logic circuit design. IEEE-June [5] Bipul C. Paul, Shinobu Fujita, Masaki Okajima, and Thomas Lee.Modeling and analysis of circuit performance of ballistic CNFET. In 2006 Design Automation Conference, San Francisco, CA, USA, July [6] experts/uc_b erkeley.htm [7] [8] Comparative Study: MOSFET and CNTFET and the Effect of Length Modulation Kuldeep Niranjan, Sanjay Srivastava, Jaikaran Singh, Mukesh Tiwari International Journal of Recent Technology and Engineering (IJRTE) ISSN: , Volume-1, Issue-4, October 2012 [9] Kavita L.Awade and Dr.Babasaheb Ambedkar, Emerging Trends of Nanotechnology in Biomedical Engineering, International Journal of Electronics and Communication Engineering & Technology (IJECET), Volume 1, Issue 1, 2010, pp , ISSN Print: , ISSN Online: AUTHORS Y.Varthamanann was born in Arani, Tamilnadu, India in He received Master Degree in Applied Electronics from Sathyabama University in the year Currently he is doing PhD in Sathyabama University. He is working as Assistant Professorr in Department of ECE in Jeppiaar Engineering College, Chennai. His interested areas of research are Nano Electronics, VLSI Design and Mixed Signal circuits. V.Kannan was born in Ariyalore, Tamilnadu, India in He received his Bachelor Degree in Electronics and Communication Engineering from Madurai Kamarajar University in the year1991, Masters Degree in Electronics and control from BITS, Pilani in the year 1996 and Ph.D., from Sathyabama University, Chennai, in the year His interested areas of research are Optoelectronic Devices, VLSI Design, Nano Electronics, Digital Signal Processing and Image Processing. He has 170 Research publications in National / International Journals / Conferences to his credit. He has 20 years of experience in teaching and presently working as Principal, Jeppiaar Institute of Technology, Kunnam, Tamilnadu, India. He is a life member of ISTE. 62
Diameter Optimization for Highest Degree of Ballisticity of Carbon Nanotube Field Effect Transistors I. Khan, O. Morshed and S. M.
Diameter Optimization for Highest Degree of Ballisticity of Carbon Nanotube Field Effect Transistors I. Khan, O. Morshed and S. M. Mominuzzaman Department of Electrical and Electronic Engineering, Bangladesh
More informationDesign Of Ternary Logic Gates Using CNTFET
International Journal of Research in Computer and Communication Technology, Vol 4, Issue 3, March -2015 ISSN (Online) 2278-5841 ISSN (Print) 2320-5156 Design Of Ternary Logic Gates Using CNTFET Aashish
More informationSEU RADIATION EFFECTS ON GAA-CNTFET BASED DIGITAL LOGIC CIRCUIT
International Journal of Mechanical Engineering and Technology (IJMET) Volume 9, Issue 7, July 2018, pp. 345 353, Article ID: IJMET_09_07_039 Available online at http://www.iaeme.com/ijmet/issues.asp?jtype=ijmet&vtype=9&itype=7
More informationA Novel Design of Penternary Inverter Gate Based on Carbon Nano Tube
Journal of Optoelectronical Nanostructures Islamic Azad University Winter 2017 / Vol. 2, No. 4 A Novel Design of Penternary Inverter Gate Based on Carbon Nano Tube Mahdieh Nayeri 1, Peiman Keshavarzian*,1,
More informationMinimization of CNTFET Ternary Combinational Circuits Using Negation of Literals Technique
DOI 10.1007/s13369-014-1147-y RESEARCH ARTICLE - ELECTRICAL ENGINEERING Minimization of CNTFET Ternary Combinational Circuits Using Negation of Literals Technique V. Sridevi T. Jayanthy Received: 24 August
More informationRAJASTHAN TECHNICAL UNIVERSITY, KOTA
RAJASTHAN TECHNICAL UNIVERSITY, KOTA (Electronics & Communication) Submitted By: LAKSHIKA SOMANI E&C II yr, IV sem. Session: 2007-08 Department of Electronics & Communication Geetanjali Institute of Technical
More informationFPGA IMPLEMENTATION OF BASIC ADDER CIRCUITS USING REVERSIBLE LOGIC GATES
FPGA IMPLEMENTATION OF BASIC ADDER CIRCUITS USING REVERSIBLE LOGIC GATES B.Ravichandra 1, R. Kumar Aswamy 2 1,2 Assistant Professor, Dept of ECE, VITS College of Engineering, Visakhapatnam (India) ABSTRACT
More informationA Novel Ternary Content-Addressable Memory (TCAM) Design Using Reversible Logic
2015 28th International Conference 2015 on 28th VLSI International Design and Conference 2015 14th International VLSI Design Conference on Embedded Systems A Novel Ternary Content-Addressable Memory (TCAM)
More informationI-V characteristics model for Carbon Nanotube Field Effect Transistors
International Journal of Engineering & Technology IJET-IJENS Vol:14 No:04 33 I-V characteristics model for Carbon Nanotube Field Effect Transistors Rebiha Marki, Chérifa Azizi and Mourad Zaabat. Abstract--
More informationModeling and Simulation of Carbon Nanotubes based FET for Cervical Cancer Detection
Modeling and Simulation of Carbon Nanotubes based FET for Cervical Cancer Detection Gopinath.P.G. 1, S. Aruna Mastani 2, V.R. Anitha 3 Research Scholar, Department of ECE, JNTUA, Anantapuramu, Andhra Pradesh,
More informationRealization of programmable logic array using compact reversible logic gates 1
Realization of programmable logic array using compact reversible logic gates 1 E. Chandini, 2 Shankarnath, 3 Madanna, 1 PG Scholar, Dept of VLSI System Design, Geethanjali college of engineering and technology,
More informationDESIGN AND ANALYSIS OF A FULL ADDER USING VARIOUS REVERSIBLE GATES
DESIGN AND ANALYSIS OF A FULL ADDER USING VARIOUS REVERSIBLE GATES Sudhir Dakey Faculty,Department of E.C.E., MVSR Engineering College Abstract The goal of VLSI has remained unchanged since many years
More informationImplementation of Quantum dot Cellular Automata based Novel Full Adder and Full Subtractor
Implementation of Quantum dot Cellular Automata based Novel Full Adder and Full Subtractor Peer Zahoor Ahmad 1, Firdous Ahmad 2, b, Syed Muzaffar Ahmad 3, Dr. Rafiq Ahmad Khan 4 1 Department of Computer
More informationUltralow-Power Reconfigurable Computing with Complementary Nano-Electromechanical Carbon Nanotube Switches
Ultralow-Power Reconfigurable Computing with Complementary Nano-Electromechanical Carbon Nanotube Switches Presenter: Tulika Mitra Swarup Bhunia, Massood Tabib-Azar, and Daniel Saab Electrical Eng. And
More informationDESIGN OF REVERSIBLE ARITHMETIC AND LOGIC UNIT USING REVERSIBLE UNIVERSAL GATE
DESIGN OF REVERSIBLE ARITHMETIC AND LOGIC UNIT USING REVERSIBLE UNIVERSAL GATE R.AARTHI, K.PRASANNA* Department of Electronics and Communication Engineering, Arasu Engineering College, Kumbakonam 612501.
More informationDELAY EFFICIENT BINARY ADDERS IN QCA K. Ayyanna 1, Syed Younus Basha 2, P. Vasanthi 3, A. Sreenivasulu 4
DELAY EFFICIENT BINARY ADDERS IN QCA K. Ayyanna 1, Syed Younus Basha 2, P. Vasanthi 3, A. Sreenivasulu 4 1 Assistant Professor, Department of ECE, Brindavan Institute of Technology & Science, A.P, India
More informationP.Geetha, Dr.R.S.D.Wahida Banu.
International Journal of Scientific & Engineering Research, Volume 5, Issue 5, MAY-2014 62 Performance Characterization of Capacitance Modeling for Carbon Nanotube MOSFET P.Geetha, Dr.R.S.D.Wahida Banu.
More informationCOMPARATIVE ANALYSIS OF CARBON NANOTUBES AS VLSI INTERCONNECTS
International Journal of Science, Engineering and Technology Research (IJSETR), Volume 4, Issue 8, August 15 COMPARATIVE ANALYSIS OF CARBON NANOTUBES AS VLSI INTERCONNECTS Priya Srivastav, Asst. Prof.
More informationComputer Science. 19. Combinational Circuits. Computer Science COMPUTER SCIENCE. Section 6.1.
COMPUTER SCIENCE S E D G E W I C K / W A Y N E PA R T I I : A L G O R I T H M S, M A C H I N E S, a n d T H E O R Y Computer Science Computer Science An Interdisciplinary Approach Section 6.1 ROBERT SEDGEWICK
More informationA Novel Design of Reversible Universal Shift Register
Available Online at www.ijcsmc.com International Journal of Computer Science and Mobile Computing A Monthly Journal of Computer Science and Information Technology IJCSMC, Vol. 3, Issue. 3, March 2014,
More information3/10/2013. Lecture #1. How small is Nano? (A movie) What is Nanotechnology? What is Nanoelectronics? What are Emerging Devices?
EECS 498/598: Nanocircuits and Nanoarchitectures Lecture 1: Introduction to Nanotelectronic Devices (Sept. 5) Lectures 2: ITRS Nanoelectronics Road Map (Sept 7) Lecture 3: Nanodevices; Guest Lecture by
More informationDesign of A Efficient Hybrid Adder Using Qca
International Journal of Engineering Science Invention ISSN (Online): 2319 6734, ISSN (Print): 2319 6726 PP30-34 Design of A Efficient Hybrid Adder Using Qca 1, Ravi chander, 2, PMurali Krishna 1, PG Scholar,
More informationReversible Implementation of Ternary Content Addressable Memory (TCAM) Interface with SRAM
International Journal of Electrical Electronics Computers & Mechanical Engineering (IJEECM) ISSN: 2278-2808 Volume 5 Issue 4 ǁ April. 2017 IJEECM journal of Electronics and Communication Engineering (ijeecm-jec)
More informationDesigning a Carbon Nanotube Field-Effect Transistor with High Transition Frequency for Ultra-Wideband Application
Engineering, 2017, 9, 22-35 http://www.scirp.org/journal/eng ISSN Online: 1947-394X ISSN Print: 1947-3931 Designing a Carbon Nanotube Field-Effect Transistor with High Transition Frequency for Ultra-Wideband
More information1. Introduction : 1.2 New properties:
Nanodevices In Electronics Rakesh Kasaraneni(PID : 4672248) Department of Electrical Engineering EEL 5425 Introduction to Nanotechnology Florida International University Abstract : This paper describes
More informationPerformance Enhancement of Reversible Binary to Gray Code Converter Circuit using Feynman gate
Performance Enhancement of Reversible Binary to Gray Code Converter Circuit using Feynman gate Kamal Prakash Pandey 1, Pradumn Kumar 2, Rakesh Kumar Singh 3 1, 2, 3 Department of Electronics and Communication
More informationTransistor Implementation of Reversible Comparator Circuit Using Low Power Technique
Transistor Implementation of Reversible Comparator Circuit Using Low Power Technique Madhina Basha, V.N.Lakshmana Kumar Department of ECE, MVGR COLLEGE OF ENGINEERING Visakhapatnam, A.P, INDIA Abstract:
More informationDepartment of ECE, Vignan Institute of Technology & Management,Berhampur(Odisha), India
IJESRT INTERNATIONAL JOURNAL OF ENGINEERING SCIENCES & RESEARCH TECHNOLOGY Efficient Design Of 4-Bit Binary Adder Using Reversible Logic Gates Abinash Kumar Pala *, Jagamohan Das * Department of ECE, Vignan
More informationGRAPHENE NANORIBBONS Nahid Shayesteh,
USC Department of Physics Graduate Seminar GRAPHENE NANORIBBONS Nahid Shayesteh, Outlines 2 Carbon based material Discovery and innovation of graphen Graphene nanoribbons structure and... FUNCTIONS 3 Carbon-based
More informationElectrostatics of Nanowire Transistors
Electrostatics of Nanowire Transistors Jing Guo, Jing Wang, Eric Polizzi, Supriyo Datta and Mark Lundstrom School of Electrical and Computer Engineering Purdue University, West Lafayette, IN, 47907 ABSTRACTS
More informationDesign of Digital Adder Using Reversible Logic
RESEARCH ARTICLE Design of Digital Adder Using Reversible Logic OPEN ACCESS Gowthami P*, RVS Satyanarayana ** * (Research scholar, Department of ECE, S V University College of Engineering, Tirupati, AP,
More informationDesign of Sequential Circuits Using MV Gates in Nanotechnology
2015 IJSRSET Volume 1 Issue 2 Print ISSN : 2395-1990 Online ISSN : 2394-4099 Themed Section: Engineering and Technology Design of Sequential Circuits Using MV Gates in Nanotechnology Bahram Dehghan 1,
More informationI. INTRODUCTION. CMOS Technology: An Introduction to QCA Technology As an. T. Srinivasa Padmaja, C. M. Sri Priya
International Journal of Scientific Research in Computer Science, Engineering and Information Technology 2018 IJSRCSEIT Volume 3 Issue 5 ISSN : 2456-3307 Design and Implementation of Carry Look Ahead Adder
More informationDESIGN OF AREA-DELAY EFFICIENT ADDER BASED CIRCUITS IN QUANTUM DOT CELLULAR AUTOMATA
International Journal on Intelligent Electronic System, Vol.9 No.2 July 2015 1 DESIGN OF AREA-DELAY EFFICIENT ADDER BASED CIRCUITS IN QUANTUM DOT CELLULAR AUTOMATA Aruna S 1, Senthil Kumar K 2 1 PG scholar
More informationHSPICE implementation of a numerically efficient model of CNT transistor
HSPICE implementation of a numerically efficient model of CNT transistor Tom J Kazmierski, Dafeng Zhou and Bashir M Al-Hashimi School of Electronics and Computer Science, University of Southampton, Southampton,
More informationGRAPHENE NANORIBBONS Nahid Shayesteh,
USC Department of Physics Graduate Seminar 1 GRAPHENE NANORIBBONS Nahid Shayesteh, Outlines 2 Carbon based material Discovery and innovation of graphen Graphene nanoribbons structure Application of Graphene
More informationDesign and Implementation of Carry Adders Using Adiabatic and Reversible Logic Gates
Design and Implementation of Carry Adders Using Adiabatic and Reversible Logic Gates B.BharathKumar 1, ShaikAsra Tabassum 2 1 Research Scholar, Dept of ECE, Lords Institute of Engineering & Technology,
More informationA Novel Design and Implementation of New Double Feynman and Six-correction logic (DFSCL) gates in Quantum-dot Cellular Automata (QCA)
A Novel Design and Implementation of New Double Feynman and Six-correction logic (DFSCL) gates in Quantum-dot Cellular Automata (QCA) Dr. Sajjad Waheed Sharmin Aktar Ali Newaz Bahar Department of Information
More informationKINGS COLLEGE OF ENGINEERING DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING QUESTION BANK
KINGS COLLEGE OF ENGINEERING DEPARTMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING QUESTION BANK SUBJECT CODE: EC 1354 SUB.NAME : VLSI DESIGN YEAR / SEMESTER: III / VI UNIT I MOS TRANSISTOR THEORY AND
More informationBasic Logic Gate Realization using Quantum Dot Cellular Automata based Reversible Universal Gate
Basic Logic Gate Realization using Quantum Dot Cellular Automata based Reversible Universal Gate Saroj Kumar Chandra Department Of Computer Science & Engineering, Chouksey Engineering College, Bilaspur
More informationA comparative study of quantum gates and classical logic gates implemented using Solid-State Double-Gate Nano-MOSFETs
Int. J. Nanoelectronics and Materials 9 (2016) 123-132 A comparative study of quantum gates and classical logic gates implemented using Solid-State Double-Gate Nano-MOSFETs Ooi Chek Yee 1*, Lim Soo King
More informationPERFORMANCE ANALYSIS OF CLA CIRCUITS USING SAL AND REVERSIBLE LOGIC GATES FOR ULTRA LOW POWER APPLICATIONS
PERFORMANCE ANALYSIS OF CLA CIRCUITS USING SAL AND REVERSIBLE LOGIC GATES FOR ULTRA LOW POWER APPLICATIONS K. Prasanna Kumari 1, Mrs. N. Suneetha 2 1 PG student, VLSI, Dept of ECE, Sir C R Reddy College
More informationCarbon Nanotube Electronics
Carbon Nanotube Electronics Jeorg Appenzeller, Phaedon Avouris, Vincent Derycke, Stefan Heinz, Richard Martel, Marko Radosavljevic, Jerry Tersoff, Shalom Wind H.-S. Philip Wong hspwong@us.ibm.com IBM T.J.
More informationDepartment of ECE, Assistant professor, Sri Padmavatimahilavisvavidyalayam, Tirupati , India
American International Journal of Research in Science, Technology, Engineering & Mathematics Available online at http://www.iasir.net ISSN (Print): 2328-3491, ISSN (Online): 2328-3580, ISSN (CD-ROM): 2328-3629
More informationAn FPGA Implementation of Energy Efficient Code Converters Using Reversible Logic Gates
An FPGA Implementation of Energy Efficient Code Converters Using Reversible Logic Gates Rakesh Kumar Jha 1, Arjun singh yadav 2 Assistant Professor, Dept. of ECE, Corporate Institute of Science & Technology,
More information3-month progress Report
3-month progress Report Graphene Devices and Circuits Supervisor Dr. P.A Childs Table of Content Abstract... 1 1. Introduction... 1 1.1 Graphene gold rush... 1 1.2 Properties of graphene... 3 1.3 Semiconductor
More informationA Numerical Study of Scaling Issues for Schottky Barrier Carbon Nanotube Transistors
A Numerical Study of Scaling Issues for Schottky Barrier Carbon Nanotube Transistors Jing Guo, Supriyo Datta and Mark Lundstrom School of Electrical and Computer Engineering, Purdue University, West Lafayette,
More informationReversible Circuit Using Reversible Gate
Reversible Circuit Using Reversible Gate 1Pooja Rawat, 2Vishal Ramola, 1M.Tech. Student (final year), 2Assist. Prof. 1-2VLSI Design Department 1-2Faculty of Technology, University Campus, Uttarakhand Technical
More informationDigital electronic systems are designed to process voltage signals which change quickly between two levels. Low time.
DIGITL ELECTRONIC SYSTEMS Digital electronic systems are designed to process voltage signals which change quickly between two levels. High Voltage Low time Fig. 1 digital signal LOGIC GTES The TTL digital
More informationAnalysis of flip flop design using nanoelectronic single electron transistor
Int. J. Nanoelectronics and Materials 10 (2017) 21-28 Analysis of flip flop design using nanoelectronic single electron transistor S.Rajasekaran*, G.Sundari Faculty of Electronics Engineering, Sathyabama
More informationModeling and Performance analysis of Metallic CNT Interconnects for VLSI Applications
IOSR Journal of Electronics and Communication Engineering (IOSR-JECE) e-issn: 2278-2834, p- ISSN: 2278-8735. Volume 4, Issue 6 (Jan. - Feb. 2013), PP 32-36 Modeling and Performance analysis of Metallic
More informationNovel Reversible Gate Based Circuit Design and Simulation Using Deep Submicron Technologies
Novel Reversible Gate Based Circuit Design and Simulation Using Deep Submicron Technologies Abstract: The set AND, OR, and EXOR gates are not reversible as Landauer which states that for irreversible logic
More informationNOVEL STRUCTURES FOR CARBON NANOTUBE FIELD EFFECT TRANSISTORS
International Journal of Modern Physics B Vol. 23, No. 19 (2009) 3871 3880 c World Scientific Publishing Company NOVEL STRUCTURES FOR CARBON NANOTUBE FIELD EFFECT TRANSISTORS RAHIM FAEZ Electrical Engineering
More informationMoore s Law Forever?
NCN Nanotechnology 101 Series Moore s Law Forever? Mark Lundstrom Purdue University Network for Computational Nanotechnology West Lafayette, IN USA NCN 1) Background 2) Transistors 3) CMOS 4) Beyond CMOS
More informationln R Kuldeep Niranjan, Sanjay Srivastava, Jaikaran Singh, Mukesh Tiwari
Carbon Nanotube Field Effect Transistor: Fabrication of Thin Film of SiO -Based Micro Cantilevers Dielectric Layer between the Channel and Substrate by Anisotropic Chemical Etching of (100) Single Crystal
More informationFloating Point Representation and Digital Logic. Lecture 11 CS301
Floating Point Representation and Digital Logic Lecture 11 CS301 Administrative Daily Review of today s lecture w Due tomorrow (10/4) at 8am Lab #3 due Friday (9/7) 1:29pm HW #5 assigned w Due Monday 10/8
More informationQuantized Electrical Conductance of Carbon nanotubes(cnts)
Quantized Electrical Conductance of Carbon nanotubes(cnts) By Boxiao Chen PH 464: Applied Optics Instructor: Andres L arosa Abstract One of the main factors that impacts the efficiency of solar cells is
More informationSTUDY AND IMPLEMENTATION OF MUX BASED FPGA IN QCA TECHNOLOGY
STUDY AND IMPLEMENTATION OF MUX BASED FPGA IN QCA TECHNOLOGY E.N.Ganesh 1 / V.Krishnan 2 1. Professor, Rajalakshmi Engineering College 2. UG Student, Rajalakshmi Engineering College ABSTRACT This paper
More informationA Novel LUT Using Quaternary Logic
A Novel LUT Using Quaternary Logic 1*GEETHA N S 2SATHYAVATHI, N S 1Department of ECE, Applied Electronics, Sri Balaji Chockalingam Engineering College, Arani,TN, India. 2Assistant Professor, Department
More informationHigh Speed Time Efficient Reversible ALU Based Logic Gate Structure on Vertex Family
International Journal of Engineering Research and Development e-issn: 2278-067X, p-issn: 2278-800X, www.ijerd.com Volume 11, Issue 04 (April 2015), PP.72-77 High Speed Time Efficient Reversible ALU Based
More informationElectronics with 2D Crystals: Scaling extender, or harbinger of new functions?
Electronics with 2D Crystals: Scaling extender, or harbinger of new functions? 1 st Workshop on Data Abundant Systems Technology Stanford, April 2014 Debdeep Jena (djena@nd.edu) Electrical Engineering,
More informationCMOS Scaling. Two motivations to scale down. Faster transistors, both digital and analog. To pack more functionality per area. Lower the cost!
Two motivations to scale down CMOS Scaling Faster transistors, both digital and analog To pack more functionality per area. Lower the cost! (which makes (some) physical sense) Scale all dimensions and
More informationDesign and Implementation of Combinational Circuits using Reversible Gates
Design and Implementation of Combinational Circuits using Reversible Gates 1 Ms. Ashwini Gaikwad 2 Ms. Shweta Patil 1M.Tech Student,Departmentof Electronics Engineering, Walchand College of Engg., Sangli
More informationEmerging Research Devices: A Study of CNTFET and SET as a replacement for SiMOSFET
1 Emerging Research Devices: A Study of CNTFET and SET as a replacement for SiMOSFET Mahmoud Lababidi, Krishna Natarajan, Guangyu Sun Abstract Since the development of the Silicon MOSFET, it has been the
More informationNano-mechatronics. Presented by: György BudaváriSzabó (X0LY4M)
Nano-mechatronics Presented by: György BudaváriSzabó (X0LY4M) Nano-mechatronics Nano-mechatronics is currently used in broader spectra, ranging from basic applications in robotics, actuators, sensors,
More informationDESİGN AND ANALYSİS OF FULL ADDER CİRCUİT USİNG NANOTECHNOLOGY BASED QUANTUM DOT CELLULAR AUTOMATA (QCA)
DESİGN AND ANALYSİS OF FULL ADDER CİRCUİT USİNG NANOTECHNOLOGY BASED QUANTUM DOT CELLULAR AUTOMATA (QCA) Rashmi Chawla 1, Priya Yadav 2 1 Assistant Professor, 2 PG Scholar, Dept of ECE, YMCA University
More informationDesign and Implementation of Reversible Binary Comparator N.SATHISH 1, T.GANDA PRASAD 2
www.semargroup.org, www.ijsetr.com ISSN 2319-8885 Vol.03,Issue.03, March-2014, Pages:0356-0363 Design and Implementation of Reversible Binary Comparator N.SATHISH 1, T.GANDA PRASAD 2 1 PG Scholar, Dept
More informationRealization of 2:4 reversible decoder and its applications
Realization of 2:4 reversible decoder and its applications Neeta Pandey n66pandey@rediffmail.com Nalin Dadhich dadhich.nalin@gmail.com Mohd. Zubair Talha zubair.talha2010@gmail.com Abstract In this paper
More informationFirst published October, Online Edition available at For reprints, please contact us at
SMGr up Title: Ternary Digital System: Concepts and Applications Authors: A P Dhande, V T Ingole, V R Ghiye Published by SM Online Publishers LLC Copyright 04 SM Online Publishers LLC ISBN: 978-0-996745-0-0
More informationA COMPARISON OF LOGICAL EFFICIENCY
A COMPARISON OF LOGICAL EFFICIENCY OF REVERSIBLE AND CONVENTIONAL GATES P. KERNTOPF WARSAW UNIVERSITY OF TECHNOLOGY, POLAND ABSTRACT In contrast to conventional gates, reversible logic gates have the same
More informationInternational Journal of Scientific & Engineering Research, Volume 6, Issue 6, June ISSN
International Journal of Scientific & Engineering Research, Volume 6, Issue 6, June-2015 333 Design and Performance Analysis of Reversible Carry Look-ahead Adder and Carry Select Adder < Santosh Rani>
More informationGraphene and Carbon Nanotubes
Graphene and Carbon Nanotubes 1 atom thick films of graphite atomic chicken wire Novoselov et al - Science 306, 666 (004) 100μm Geim s group at Manchester Novoselov et al - Nature 438, 197 (005) Kim-Stormer
More informationDESIGN OF QCA FULL ADDER CIRCUIT USING CORNER APPROACH INVERTER
Research Manuscript Title DESIGN OF QCA FULL ADDER CIRCUIT USING CORNER APPROACH INVERTER R.Rathi Devi 1, PG student/ece Department, Vivekanandha College of Engineering for Women rathidevi24@gmail.com
More informationA NOVEL PRESENTATION OF PERES GATE (PG) IN QUANTUM-DOT CELLULAR AUTOMATA(QCA)
A NOVEL PRESENTATION OF PERES GATE (PG) IN QUANTUM-DOT ELLULAR AUTOMATA(QA) Angona Sarker Ali Newaz Bahar Provash Kumar Biswas Monir Morshed Department of Information and ommunication Technology, Mawlana
More informationInternational Journal of Combined Research & Development (IJCRD) eissn: x;pissn: Volume: 7; Issue: 7; July -2018
XOR Gate Design Using Reversible Logic in QCA and Verilog Code Yeshwanth GR BE Final Year Department of ECE, The Oxford College of Engineering Bommanahalli, Hosur Road, Bangalore -560068 yeshwath.g13@gmail.com
More informationDesign of High-speed low power Reversible Logic BCD Adder Using HNG gate
Design of High-speed low power Reversible Logic Using HNG gate A.Nageswararao Dept.of ECE, RMK engineering college Anna University, India naga.alvaru@gmail.com Prof.D.Rukmani Devi Dept.of ECE, RMK engineering
More informationDESIGN AND IMPLEMENTATION OF EFFICIENT HIGH SPEED VEDIC MULTIPLIER USING REVERSIBLE GATES
DESIGN AND IMPLEMENTATION OF EFFICIENT HIGH SPEED VEDIC MULTIPLIER USING REVERSIBLE GATES Boddu Suresh 1, B.Venkateswara Reddy 2 1 2 PG Scholar, Associate Professor, HOD, Dept of ECE Vikas College of Engineering
More informationPower Minimization of Full Adder Using Reversible Logic
I J C T A, 9(4), 2016, pp. 13-18 International Science Press Power Minimization of Full Adder Using Reversible Logic S. Anandhi 1, M. Janaki Rani 2, K. Manivannan 3 ABSTRACT Adders are normally used for
More informationImplementation of Optimized Reversible Sequential and Combinational Circuits for VLSI Applications
V. G. Santhi Swaroop et al Int. Journal of Engineering Research and Applications RESEARCH ARTICLE OPEN ACCESS Implementation of Optimized Reversible Sequential and Combinational Circuits for VLSI Applications
More informationEE236 Electronics. Computer and Systems Engineering Department. Faculty of Engineering Alexandria University. Fall 2014
EE236 Electronics Computer and Systems Engineering Department Faculty of Engineering Alexandria University Fall 2014 Lecturer: Bassem Mokhtar, Ph.D. Assistant Professor Department of Electrical Engineering
More informationElectrostatics of nanowire transistors
Purdue University Purdue e-pubs Other Nanotechnology Publications Birck Nanotechnology Center 12-1-2003 Electrostatics of nanowire transistors Jing Guo Jing Wang E. Polizzi Supriyo Datta Birck Nanotechnology
More informationGoal: To use DNA self-assembly to overcome the challenges of optical and e-beam lithography in creating nanoscale circuits.
Goal: To use DNA self-assembly to overcome the challenges of optical and e-beam lithography in creating nanoscale circuits. PI Paul Rothemund, computer scientist, Senior Research Associate (research faculty)
More informationProspect of Ballistic CNFET in High Performance Applications: Modeling and Analysis
Prospect of Ballistic CNFET in High Performance Applications: Modeling and Analysis 12 BIPUL C. PAUL Stanford University and Toshiba America Research Inc. SHINOBU FUJITA and MASAKI OKAJIMA Toshiba America
More informationA Novel Design and Implementation of 8-3 Encoder Using Quantum-dot Cellular Automata (QCA) Technology
A Novel Design and Implementation of 8-3 Encoder Using Quantum-dot Cellular Automata (QCA) Technology Md. Sofeoul-Al-Mamun Mohammad Badrul Alam Miah Fuyad Al Masud Department of Information and Communication
More informationCarbon based Nanoscale Electronics
Carbon based Nanoscale Electronics 09 02 200802 2008 ME class Outline driving force for the carbon nanomaterial electronic properties of fullerene exploration of electronic carbon nanotube gold rush of
More informationSemi-analytical model for Schottky-barrier carbon nanotube and graphene nanoribbon transistors
Semi-analytical model for Schottky-barrier carbon nanotube and graphene nanoribbon transistors Xuebei Yang, Gianluca Fiori, Giuseppe Iannaccone, and Kartik Mohanram Department of Electrical and Computer
More informationImplementation of Reversible ALU using Kogge-Stone Adder
Implementation of Reversible ALU using Kogge-Stone Adder Syed.Zaheeruddin, Ch.Sandeep Abstract: Reversible circuits are one promising direction with applications in the field of low-power design or quantum
More informationDesign of Reversible Synchronous Sequential Circuits
Design of Reversible Synchronous Sequential Circuits Sonawane Parag Narayan 1, Hatkar Arvind Pandurang 2 1 E&TC,SVIT Chincholi 2 E&TC,SVIT Chincholi Abstract In early 70`s one computer requires one whole
More informationECE 407 Computer Aided Design for Electronic Systems. Simulation. Instructor: Maria K. Michael. Overview
407 Computer Aided Design for Electronic Systems Simulation Instructor: Maria K. Michael Overview What is simulation? Design verification Modeling Levels Modeling circuits for simulation True-value simulation
More informationDigital Electronics Part II - Circuits
Digital Electronics Part - Circuits Dr.. J. Wassell Gates from Transistors ntroduction Logic circuits are non-linear, consequently we will introduce a graphical technique for analysing such circuits The
More informationdoi: /
doi: 10.1063/1.1840096 JOURNAL OF APPLIED PHYSICS 97, 034306 (2005) Characteristics of a carbon nanotube field-effect transistor analyzed as a ballistic nanowire field-effect transistor Kenji Natori, a)
More informationTwo Bit Arithmetic Logic Unit (ALU) in QCA Namit Gupta 1, K.K. Choudhary 2 and Sumant Katiyal 3 1
Two Bit Arithmetic Logic Unit (ALU) in QCA Namit Gupta 1, K.K. Choudhary 2 and Sumant Katiyal 3 1 Department of Electronics, SVITS, Baroli, Sanwer Road, Indore, India namitg@hotmail.com 2 Department of
More informationSimple Theory of the Ballistic Nanotransistor
Simple Theory of the Ballistic Nanotransistor Mark Lundstrom Purdue University Network for Computational Nanoechnology outline I) Traditional MOS theory II) A bottom-up approach III) The ballistic nanotransistor
More informationOnline Testable Reversible Circuits using reversible gate
Online Testable Reversible Circuits using reversible gate 1Pooja Rawat, 2Vishal Ramola, 1M.Tech. Student (final year), 2Assist. Prof. 1-2VLSI Design Department 1-2Faculty of Technology, University Campus,
More informationExperiment 7: Magnitude comparators
Module: Logic Design Lab Name:... University no:.. Group no: Lab Partner Name: Experiment 7: Magnitude comparators Mr. Mohamed El-Saied Objective: Realization of -bit comparator using logic gates. Realization
More informationvidyarthiplus.com vidyarthiplus.com vidyarthiplus.com ANNA UNIVERSITY- COMBATORE B.E./ B.TECH. DEGREE EXAMINATION - JUNE 2009. ELECTRICAL & ELECTONICS ENGG. - FOURTH SEMESTER DIGITAL LOGIC CIRCUITS PART-A
More informationDesign and Optimization of Asynchronous counter using Reversible Logic
Design and Optimization of Asynchronous counter using Reversible Logic Mr Harish k PG scholar Department of ECE, RVCE RVCE, Bengaluru Mrs. Chinmaye R, Asst.Professor Department of ECE,RVCE RVCE, Bengaluru
More informationDesign and Synthesis of Sequential Circuit Using Reversible Logic
ISSN: 2278 0211 (Online) Design and Synthesis of Sequential Circuit Using Reversible Logic Mr. Sandesh.N.G PG Student, VLSI Design and Embedded System, B.G.S. Institute of Technology, B.G.Nagar, Karnataka,
More informationAvailable online at ScienceDirect. Procedia Computer Science 70 (2015 ) Bengal , India
Available online at www.sciencedirect.com ScienceDirect Procedia Computer Science 70 (2015 ) 153 159 4 th International Conference on Eco-friendly Computing and Communication Systems (ICECCS) Design of
More informationBINARY TO GRAY CODE CONVERTER IMPLEMENTATION USING QCA
BINARY TO GRAY CODE CONVERTER IMPLEMENTATION USING QCA Neha Guleria Department of Electronics and Communication Uttarakhand Technical University Dehradun, India Abstract Quantum dot Cellular Automata (QCA)
More information