ANALYTICAL MODEL FOR DYNAMIC AVALANCHE. Universitat der Bundeswehr Munchen, Germany. *Siemens AG, Corporate Technology, Munich, Germany

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1 ANALYTICAL MODEL FOR DYNAMIC AVALANCHE BREAKDOWN IN POWER DEVICES L. Gohler J. Sigg* Universitat der Bundeswehr Munchen Germany *Siemens AG Cororate Technology Munich Germany Abstract. The behaviour of avalanche breakdown under the inuence of initiating currents and generated carriers is analysed. It is shown that these mechanisms cause a breakdown voltage shift and a self-limitating avalanche current. A GTO circuit model is enhanced by the ndings and a circuit simulation with SABER demonstrates the gain in model accuracy. Keywords. dynamic avalanche breakdown avalanche breakdown ost-avalanche behaviour safe oerating area turn-o failure GTO turn-o INTRODUCTION The eect of imact ionization occurs in n -junctions at high reverse voltages. In this case carriers moving under the inuence of the electric eld from one end of the deletion region to the other get enough energy to ionize silicon atoms by imact. The generated electrons and holes contribute to the total current and can slit other bonds if they get suciently accelerated until the next imact haens. Imact ionization mainly takes lace at the location of the maximum electric eld. Consequently there are for instance more free electrons than holes in the lightly doed n -region ( -region) of a + -junction and the net charge is reduced. According to Poisson's equation the electric eld is not only determined by the ionized doing atoms but also by the free charge carriers. Hence the electric eld has no longer a triangular shae but is signicantly lower over the increased width of the deletion region just as shown by Wachutka [1]. This leads to a self-limitation of avalanche multilication and therefore to a decrease of current sloe with increasing reverse voltage (assumtion of quasi-neutrality outside the deleted zone Fig. 1). Avalanche current limitation aears either at high voltages and low initiating currents or at lower voltages and higher initiating currents (Fig. 2). Higher initiating currents consisting of articles with the same charge as the ionized doing atoms in the lightly doed region lead to a greater amount of generated charge carriers and therefore to a lower breakdown voltage. The shift of breakdown voltage is imortant when considering dynamic avalanche breakdown in ower semiconductor devices. Fig. 1. Avalanche generation current in ower devices with and without consideration of generated carriers (V br : breakdown voltage). Fig. 2. Avalanche current for low and high initiating currents. Note the decrease of breakdown voltage and the dierent waveform at high currents (V br Vbr : breakdown voltages). THEORY In this section aroximations for the generated currents in + - and + n + - structures under static conditions are derived. The rst art focuses on the + - structure (Fig. 3a; N = N d N +). To ease calculation the coordinate system is moved so that E(x)

2 equals zero at x =0(w>0). C1 k 4 coth C 2 C 1 1 C 1 w k 2 J 0 (3) 2 k 4 with C 1 =(k 4 J 0 + k 2 ) 2 2k 5 ex k 3 ; C 2 = 1 k4 J 0 + k 2 arcoth C1 C1 Fig. 3. Electric eld in + - (a) and + n + -structures (b) at various reverse voltages. The basic equation describing imact ionization is Chynoweth's law [2] which can be combined with the static formulation of the continuity equation. G denotes the generation rate deending on the ionization rates of electrons ( n ) and holes ( ) er unit length as well as the current density of each carrier tye (J n; 0). G = n J n q + J q = + R (1) n; = A n; ex b n; E (A n; b n; = const:). At this oint some assumtions are necessary to get an integrable form of (1): recombination can be neglected (G R) the carrier velocity is constant and equal for electrons and holes: v n v v s 10 7 cm s instead of n; an eective ionization rate i given by Ghandi [3] describes imact ionization and can be aroximated according to Paul [4]: n i = A i ex bi E i 0 ex (m 1 E m 2 ) with [3] A i =1: cm 1 b i =1: V 0 = A i ex bi E 0 m 1 = bi E0 2 m 2 = bi E 0 E 0 1: V cm. cm From Poisson's equation one gets (J = J n + J ): E(x) = Z x 0 =x x 0 =0 2J + qn d J dx 0 : (2) Inserting (2) into (1) leads to a second order dierential equation and after some calculation to the desired value of J gen (imlicit function): J (w) J (0) = J (w) J 0 ; and k 1 = J 0 ; k 2 = m 1 qnd k 4 = 2m 1 ; k 5 = k 1 k 4 : J ; k 3 = m 2 ; The value of the total current density J at x = w is: J = J 0 + J 0 + J n0 + J gen ; where J 0 and J n0 stand for the current densities that initiate imact ionization w reresents the width of the deletion region and V jr equals the sum of the reverse voltage and diusion voltage. Neglecting the generated holes and assuming constant electron and hole currents over the whole deleted zone rovides for the width w: s w 2V jr qn d Jn0J0+Jgen : (4) Eqn. (3) can be solved with a circuit simulator (for instance SABER). However in consequence of the oor numerical stability this formula is not recommended for circuit models. A very brief exression requiring hysical constants only follows from further simlication (generated holes neglected): m 0 J 0 b i b 2A iv jr ex i 2V jre 0 E 0 = qn d ; (5) 1 J n0 J 0 J gen m 0 : (6) The factor m 0 was chosen for best agreement between (3) and (5): m 0 1:35: Eqn. (5) aroximates (3) for an arbitrary ratio of J 0 and J n0 at low initiating currents and for J 0 J n0 at high initiating currents. These two cases are tyically found in ower semiconductor devices. Eqn. (5) can be imlemented in circuit models easily. Taking into account the temerature deendence of avalanche breakdown yields: b i (T )=b i0 + b i1 T + b i2 T 2 ;

3 and A i (T )=A i0 + A i1 T + A i2 T 2 v s (T )= 2: cm s 1+0:8 ex T 600K (b in ;A in = const:). Now a + n + -conguration is considered. According to Fig. 3b this structure behaves equivalent to the + - structure at low reverse voltages i. e. the current sloe is limited. In case of unch through the width of the deletion region does not change. Electric eld weakening has therefore less eect and the current can rise again raidly at a certain value of reverse voltage ('second-ste breakdown henomenon' Takata et al. [5]). If the voltage dro over the n + - and + -region is suciently small one can derive for J gen : rises too fast the middle junction breaks down far below the static breakdown voltage. The resulting high ower loss destroys the device. In common alications the so-called snubber-caacity (C RCD in Fig. 4) in arallel to the GTO limits the voltage sloe during turn-o. Circuit simulation hels to nd the aroriate value of C RCD as an otimum between ower loss switching velocity and even the revention of turn-o failures at the given voltage current and temerature levels. m 0 J 0 m 1E 0 0 ex (m 1E nm 2)(ex (m 1E 0 w 1 (7) )1) (m 0 1:3). E n stands for the electric eld at the border between the - and the n -region. With (4) (comleted by m 0 ) the deletion region has a width of: w : w w wn = : (8) w n : w>w n Denig now avariable E n as: E n = V jr w n 1 2 E0 w n (9) means for the value of E n : 0 : E E n = n 0 En : En > 0 : (10) DYNAMIC AVALANCHE BREAKDOWN The term dynamic avalanche breakdown describes an avalanche breakdown at high initiating currents (J 0 J n0 )lowering breakdown voltage. These conditions exist in ower devices only during switch-o which exlains the denotation 'dynamic'. In rincile dynamic avalanche generation aears in various semiconductor ower devices but the amount of generated charge and consequently the inuence on the voltage and current waveforms diers substantially. Normally current densities in IGBTs SCRs and diodes for examle are too low for a signicant breakdown voltage shift. GTOs however need a rotection circuit to revent demage. When a GTO -thyristor is turned o a large hole current ows out of the gate. Obviously one art of the holes leaving the device moves through the reverse biased middle junction. If the voltage across the device Fig. 4. DC-choer (V 0 =4kV V G = 15V R L =1:33 L L =25H R RCD = 4 C RCD =6F R G =2m L G =0:4H L 1 = L 2 =0:2H). The transient behaviour of avalanche generation needs further consideration. Assuming a constant anodecathode voltage and a slight increase of hole current for examle one can observe the following effects (Fig. 5). During a rst (instable) hase of dynamic avalanche breakdown the additional holes lead to a higher sloe of the electric eld (t = t 1 Fig.5) because it takes a certain time until electrons and holes are generated by imact. After that neglectable short time san (rst order estimation of duration: t 2 t 1 2w v s ) quasi-static conditions redominate and Fig. 5. Dynamic avalanche breakdown in a GTO carrier ow and eld distribution (t 0 : before the onset of avalanche multilication t 1 : instable case t 2 : stable case i a : anode current i g : gate current).

4 Fig. 6. Post-avalanche behaviour of + -diodes simulated with eqn. (7). Fig. 8. Dynamic avalanche breakdown of a GTOthyristor - circuit simulation with SABER. The ash symbol marks the oint of maximum ower dissiation (v a : anode-cathode-voltage v g : gate voltage i a : anode current i g : gate current). Fig. 7. Post-avalanche behaviour of + -diodes measured and numerically calculated with basic equations taken from Takata et al. [5]. the ndings outlined above are alicable (t = t 2 Fig. 5). Each time the voltage dro over the reverse biased middle junction or the initiating hole current changes its value the device goes through a similar cycle. RESULTS Avalanche generation at low initiating currents can be investigated by determining the v -i characteristic of + -diodes for V jr >V br (ost-avalanche behaviour). Data ublished by Takata et al. [5] were used as a comarison. Fig. 6 dislays the simulation whereas Fig. 7 gives an imression of measurement (w = 130m). The simulated curves are obtained from (7) and not from (5) because + -diodes normally contain a thin n + -layer that lowers contact resistance. It can be seen that both curves show good agreement. Furthermore the deviation of breakdown voltage calculated with (5) and (7) at low initiating currents to exerimental results in Ghandi [3] does not exceed 10% Fig. 9. Dynamic avalanche breakdown of a GTO-thyristor - 1-D device simulation with MEDUSA (taken from Gerstenmaier [6]). The ash symbol marks the oint of maximum ower dissiation (U A : anode-cathode-voltage U G : gate voltage I A : anode current I G : gate current). in the interesting range of doing. The very fast destruction of a GTO-thyristor by dynamic avalanche breakdown makes it dicult to measure the needed current and voltage waveforms but device simulation oers an accetable benchmark substitute. Fig. 8 and Fig.9 show the device simulation by Gerstenmaier [6] and the circuit simulation with the imroved GTO model based on Kraus [7] in SABER. In both cases the circuit equals that in Fig. 4. The advantages of using (5) instead of a simle exression can be seen in an imroved accuracy of the current-breakdown voltage characteristic at various current levels and a more gradual breakdown behaviour of the model which is closer to reality. CONCLUSION An analytic descrition of dynamic avalanche breakdown henomenon suitable for circuit models has been resented. The solutions were alied to a quasi-

5 static descrition of dynamic avalanche breakdown with the GTO-thyristor as an examle. Comarisons with numerical simulations and measurements rove a good accuracy. Acknowledgement The authors wish to thank Prof. Homann from Deartment of Electrical Engineering of University of Bundeswehr Prof. Wachutka from Deartment of Physics of Munich University of Technology and Dr. Kogel from Deartment of Physics of University of Bundeswehr for their useful hysical and mathematical hints. Address of the Authors Universitat der Bundeswehr Munchen Werner-Heisenberg-Weg 39 D Neubiberg Germany Tel.: Fax: goehler@e4s21.et.unibw-muenchen.de References [1] G. K. Wachutka Analytical Model for the Destruction Mechanism of GTO - Like Devices by Avalanche Injection IEEE Trans. on El. Dev. vol. 38 No [2] A. G. Chynoweth Ionization Rates for Electrons and Holes in Silicon Physical Review [3] S. K. Ghandi Semiconductor Power Devices John Wiley & Sons New York [4] R. Paul Halbleiterelektronik Dr. Alfred Huthig Verlag Heidelberg [5] I. Takata T. Yamada N. Soejima Leakage Current and Breakdown Characteristics of P-N Diodes Proc. of ISPSD ' [6] Y. C. Gerstenmaier 1-D Simulation and Analytic Theory of the Critical Turn-O Behaviour of High-Power GTO-Thyristors with a Choer Circuit Proc. of ISPS ' [7] M. Bayer R. Kraus A new analytical GTO - Model for Circuit Alications Proc. of PESC '