Models for IC Buffers: A Top-down Approach Taking the nonlinear Thévenin-like topology beyond the proof of concept

Transcription

1 Europan IBIS Summit Mting May th 06, Turin, Italy Modls for IC Buffrs: A Top-don Approach Taking th nonlinar Thénin-lik topology byond th proof of concpt C. Diouf, M. Tlscu, N.Tanguy, I.S. Stiano 3, F.. Canaro 3 Ecol National d Ingéniurs d Brst, CNRS, UMR 685, ab-sticc Unirsité d Brst; CNRS, UMR 685, ab-sticc 3 Politcnico di Torino, Dpartmnt of Elctronics and Tlcommunications, EMC roup /05/06

2 Outlin Contxt Building a nonlinar Thénin-lik modl for IC buffrs Dmonstrating th approach on a TI drir Discussing th implmntation Extnding th modl to account for dd ariations Conclusion /0

3 Contxt Joint rsarch on buffr modling Politcnico di Torino, Italy and Unirsité d Brst, Franc Focus: N mthodologis and approachs to IC buffr macromodling Bttr accuracy in critical conditions, mor gnral approach to modling Particular focus on orclocking: issu prsnt in litratur, confrncs and IBIS summit mtings 3/0

4 Nonlinar Thénin-lik modl nral ida prsntd at th IBIS Summit Mting in 03 NEW! Implmntation dtails for ry block Extraction: full alkthrough Accounting for V DD ariation 4/0

5 Nonlinar Thénin-lik modl Exampl: Txas Instrumnts drir SN74AVC6973, VDD =,5V 5/0

6 Nonlinar Thénin-lik modl OPEN CIRCUIT VOTAE Singl-input-singl-output nonlinar lmnt is th input-output charactristic of th drir Can b modld in diffrnt ays 6/0

7 Nonlinar Thénin-lik modl OPEN CIRCUIT VOTAE ammrstin structur ll knon in control-thory Static bloc: Stp lik function, tabl-basd implmntation inar filtr idntifid ia ctor fitting Dlay modld by idal transmission lin 7/0

8 Nonlinar Thénin-lik modl OPEN CIRCUIT VOTAE Vry accurat modl using ry simpl and robust structur Dynamic lmnts could b addd if ndd NMSE 0log K k 0 rf approx 0 K k 0 rf k y k y k y NMSE gis a masur of th accuracy or a finit numbr of sampls K. 8/0

9 9/0 Nonlinar Thénin-lik modl NONINEAR CONDUCTANCE On stat / off stat sparation Static tabl basd modl at this stag / ˆ / ˆ, V V DD DD

10 0/0 Nonlinar Thénin-lik modl / ˆ / ˆ, V V DD DD

11 /0 Rlation ith IBIS,, ˆ ˆ ˆ ˆ / ˆ / ˆ ˆ, f f V V t i DD DD f V f t i DD Thénin-lik IBIS-lik Static charactristics of th output port in high and lo stat Wighting functions computd from dics rsponss on to rsisti loads

12 /0 Rlation ith IBIS,, ˆ ˆ ˆ ˆ / ˆ / ˆ ˆ, f f V V t i DD DD f V f t i DD Thénin-lik IBIS-lik In th Thénin-lik modl both and dpnd on In th IBIS-lik modl only dpnd on,, f,

13 Transint simulation rsults Td =0.ns, Z0=60 C = 7p 3/0

14 Transint simulation rsults Orclocking: sol a problm or sol th problm? Thénin modl orks, but hy? 4/0

15 Transint simulation rsults ybrid modl: IBIS ighting functions drin through ammrstin structur. Orclock problm sold but original Thénin modl has bttr dynamics. 5/0

16 Summing things up Static tabl-basd modl hr dynamic modls: compnsation capacitanc, linar FIR, nonlinar modl if ndd Tabls + Simpl filtr + dlay 6/0

17 Summing things up Spic simulation of transistor modls Transint Analysis DC Analysis DC Analysis Drir opn circuit Drir in opn circuit Drir lockd on/off output port analysis Dlay xtraction d/dt FFT ctor fitting Ohm s la Dlay Filtr Static bloc, ê 7/0

18 Summing things up Straightforard implmntation ê Spic simulation of transistor modls DC Analysis DC Analysis Drir opn circuit Drir in opn circuit Dlay xtraction ith off-th-shlf tools! d/dt FFT ctor fitting Dlay Filtr Static bloc DC Analysis Drir lockd on/off output port analysis Ohm s la, 8/0

19 Accounting for Vdd ariation ˆ, VDD ˆ, dd dd VDD, a, VDD dd dd b dd 9/0

20 Conclusion Top don approach: circuit thory macromodl. Easy implmntation. Basic building block for futur EDA tools. ood potntial in soling inaccuracis rlatd to jittr, orclocking, tc. Rfrncs: Confrnc papr : C. Diouf, M. Tlscu, N. Tanguy, I.S. Stiano, F.. Canaro, Robust nonlinar modls for CMOS buffrs, 0 th IEEE Workshop on Signal and Por Intgrity, May 06, Turin, taly Extndd papr: C. Diouf, M. Tlscu, I. S. Stiano, N. Tanguy, F.. Canaro, Simplifid topology for IC buffr bhaioural modls, IET Circuits, Dics & Systms, 06 in prss. 0/0