Preface. Notebook Computer X7200. Service Manual. Preface.

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1 ys t em Manual

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3 Preface Notebook omputer X00 ervice Manual Preface I

4 Preface Notice The company reserves the right to revise this publication or to change its contents without notice. Information contained herein is for reference only and does not constitute a commitment on the part of the manufacturer or any subsequent vendor. They assume no responsibility or liability for any errors or inaccuracies that may appear in this publication nor are they in anyway responsible for any loss or damage resulting from the use (or misuse) of this publication. This publication and any accompanying software may not, in whole or in part, be reproduced, translated, transmitted or reduced to any machine readable form without prior consent from the vendor, manufacturer or creators of this publication, except for copies kept by the user for backup purposes. Preface Brand and product names mentioned in this publication may or may not be copyrights and/or registered trademarks of their respective companies. They are mentioned for identification purposes only and are not intended as an endorsement of that product or its manufacturer. Version.0 eptember 00 Trademarks Intel and Intel ore are trademarks of Intel orporation. Windows is a registered trademark of Microsoft orporation. Other brand and product names are trademarks and /or registered trademarks of their respective companies. II

5 Preface About this Manual This manual is intended for service personnel who have completed sufficient training to undertake the maintenance and inspection of personal computers. It is organized to allow you to look up basic information for servicing and/or upgrading components of the X00 series notebook P. The following information is included: hapter, Introduction, provides general information about the location of system elements and their specifications. hapter, Disassembly, provides step-by-step instructions for disassembling parts and subsystems and how to upgrade elements of the system. Appendix A, Part Lists Appendix B, chematic Diagrams Appendix, Updating the FLAH ROM BIO Preface III

6 Preface IMPORTANT AFETY INTRUTION Follow basic safety precautions, including those listed below, to reduce the risk of fire, electric shock and injury to persons when using any electrical equipment:. Do not use this product near water, for example near a bath tub, wash bowl, kitchen sink or laundry tub, in a wet basement or near a swimming pool.. Avoid using a telephone (other than a cordless type) during an electrical storm. There may be a remote risk of electrical shock from lightning.. Do not use the telephone to report a gas leak in the vicinity of the leak.. Use only the power cord and batteries indicated in this manual. Do not dispose of batteries in a fire. They may explode. heck with local codes for possible special disposal instructions.. This product is intended to be supplied by a Listed Power Unit with an A Input of 00-0V, 0-0Hz, D Output of 0V, A (00W) minimum A/D Adapter. Preface This omputer s Optical Device is a Laser lass Product F tatement This device complies with Part of the F Rules. Operation is subject to the following two conditions: This device may not cause harmful interference. This device must accept any interference received, including interference that may cause undesired operation. IV

7 Preface Instructions for are and Operation The notebook computer is quite rugged, but it can be damaged. To prevent this, follow these suggestions:. Don t drop it, or expose it to shock. If the computer falls, the case and the components could be damaged. Do not expose the computer to any shock or vibration. Do not place it on an unstable surface. Do not place anything heavy on the computer.. Keep it dry, and don t overheat it. Keep the computer and power supply away from any kind of heating element. This is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged. Do not expose it to excessive heat or direct sunlight. Do not leave it in a place where foreign matter or moisture may affect the system. Don t use or store the computer in a humid environment. Do not place the computer on any surface which will block the vents. Preface. Follow the proper working procedures for the computer. hut the computer down properly and don t forget to save your work. Remember to periodically save your data as data may be lost if the battery is depleted. Do not turn off the power until you properly shut down all programs. Do not turn off any peripheral devices when the computer is on. Do not disassemble the computer by yourself. Perform routine maintenance on your computer. V

8 Preface. Avoid interference. Keep the computer away from high capacity transformers, electric motors, and other strong magnetic fields. These can hinder proper performance and damage your data.. Take care when using peripheral devices. Use only approved brands of peripherals. Unplug the power cord before attaching peripheral devices. Preface Power afety Warning Before you undertake any upgrade procedures, make sure that you have turned off the power, and disconnected all peripherals and cables (including telephone lines). It is advisable to also remove your battery in order to prevent accidentally turning the machine on. Power afety The computer has specific power requirements: Only use a power adapter approved for use with this computer. Your A adapter may be designed for international travel but it still requires a steady, uninterrupted power supply. If you are unsure of your local power specifications, consult your service representative or local power company. The power adapter may have either a -prong or a -prong grounded plug. The third prong is an important safety feature; do not defeat its purpose. If you do not have access to a compatible outlet, have a qualified electrician install one. When you want to unplug the power cord, be sure to disconnect it by the plug head, not by its wire. Make sure the socket and any extension cord(s) you use can support the total current load of all the connected devices. Before cleaning the computer, make sure it is disconnected from any external power supplies. Do not plug in the power cord if you are wet. Do not use the power cord if it is broken. Do not place heavy objects on the power cord. VI

9 Preface Battery Precautions Only use batteries designed for this computer. The wrong battery type may explode, leak or damage the computer. Do not continue to use a battery that has been dropped, or that appears damaged (e.g. bent or twisted) in any way. Even if the computer continues to work with a damaged battery in place, it may cause circuit damage, which may possibly result in fire. Recharge the batteries using the notebook s system. Incorrect recharging may make the battery explode. Do not try to repair a battery pack. Refer any battery pack repair or replacement to your service representative or qualified service personnel. Keep children away from, and promptly dispose of a damaged battery. Always dispose of batteries carefully. Batteries may explode or leak if exposed to fire, or improperly handled or discarded. Keep the battery away from metal appliances. Affix tape to the battery contacts before disposing of the battery. Do not touch the battery contacts with your hands or metal objects. Battery Guidelines The following can also apply to any backup batteries you may have. If you do not use the battery for an extended period, then remove the battery from the computer for storage. Before removing the battery for storage charge it to 0% - 0%. heck stored batteries at least every months and charge them to 0% - 0%. Preface Battery Disposal The product that you have purchased contains a rechargeable battery. The battery is recyclable. At the end of its useful life, under various state and local laws, it may be illegal to dispose of this battery into the municipal waste stream. heck with your local solid waste officials for details in your area for recycling options or proper disposal. aution Danger of explosion if battery is incorrectly replaced. Replace only with the same or equivalent type recommended by the manufacturer. Discard used battery according to the manufacturer s instructions. Battery Level lick the battery icon in the taskbar to see the current battery level and charge status. A battery that drops below a level of 0% will not allow the computer to boot up. Make sure that any battery that drops below 0% is recharged within one week. VII

10 Preface Related Documents You may also need to consult the following manual for additional information: User s Manual on D/DVD This describes the notebook P s features and the procedures for operating the computer and its ROM-based setup program. It also describes the installation and operation of the utility programs provided with the notebook P. Preface ystem tartup. Remove all packing materials.. Place the computer on a stable surface.. Insert the battery and tighten the screws.. ecurely attach any peripherals you want to use with the computer (e.g. keyboard and mouse) to their ports.. Attach the A/D adapter to the D-In jack at the rear of the computer, then plug the A power cord into an outlet, and connect the A power cord to the A/D adapter.. Use one hand to raise the lid/ld to a comfortable viewing angle (do not to exceed degrees); use the other hand (as illustrated in Figure ) to support the base of the computer (Note: Never lift the computer by the lid/ld).. Press the power button to turn the computer on. hut Down Note that you should always shut your computer down by choosing hut Down from the tart Menu. This will help prevent hard disk or system problems. Figure - Opening the Lid/LD/omputer with A/D Adapter Plugged-In VIII

11 Preface Introduction...- Overview...- pecifications...- External Locator - Top View with LD Panel Open...- External Locator - Front & Right ide Views...- External Locator - Left ide & Rear View...- External Locator - Bottom View...- Mainboard Overview - Top (Key Parts)...- Mainboard Overview - Bottom (Key Parts)...- Mainboard Overview - Top (onnectors)...-0 Mainboard Overview - Bottom (onnectors)...- Disassembly...- Overview...- Maintenance Tools...- onnections...- Maintenance Precautions...- Disassembly teps...- Removing the Battery...- Removing the Optical (D/DVD) Device...- Removing the Processor...- Removing and Installing the Video ard...- Removing the Keyboard...- Removing the Wireless LAN Module...- Removing the Bluetooth Module...- Removing the ystem Memory (RAM)...- Removing the Hard Disk(s) from the Primary HDD Bay...-0 Removing the Hard Disk from the econdary HDD Bay...- Removing the Hinges...- ontents Part Lists...A- Part List Illustration Location... A- Top... A- Bottom... A- LD... A- ATA DVD uper-multi... A- ATA Blu-Ray ombo... A- VGA-GTX... A- chematic Diagrams...B- ystem Block Diagram...B- LGA Part A DDR /...B- LGA Part B DDR /...B- LGA Part QPI...B- LGA Part D Power...B- LGA Part E, Thermal...B- DDR hannel A O-DIMM_0...B- DDR hannel B O-DIMM_...B- DDR hannel O-DIMM_...B-0 X QPI Interface...B- X PIEX, PIEX, DMI...B- X MI...B- X PWR...B- X...B- IH0 DMI/PIE/UB/ATA...B- IH0 PI/PI/Other...B- IH0 Power/...B- Fan TRL...B- lock Generator V...B-0 Preface IX

12 Preface Preface lock Buffer IDB0GLFT... B- MXM.0 PI-E Master... B- MXM.0 PI-E LAVER... B- HDMI-In Buffer/ATA HDD ON... B- HDMI Port... B- LD, INT... B- DVI-I... B- DP witch NDP... B- KB-ITE ITE... B- UB.0... B-0 PIE ard Reader/LAN JM... B- B (TI-XIOBZAY)... B- odec, ubwoofer, DMI... B- Audio AMP TPA0A/TPA... B- WLAN/HDMI-In/TV/ROBON... B- D/BT/ATA... B- Daughter onnector... B- Power PU_VTT... B- Power VORE... B- Power.V/0.V... B-0 Power.V,.V... B- V/Power witch... B- Power VDD, VDD, IH_.V... B- Power A_In, harge... B- Audio Board... B- ard Reader Board... B- lick Board... B- onsumer IR Board... B- witch Board... B- UB Board... B-0 Finger ensor Board... B- Touch ensor Board... B- Power LED Board...B- Updating the FLAH ROM BIO... - To update the FLAH ROM BIO you must: - Download the BIO...- Unzip the downloaded files to a bootable D/DVD/ or UB Flash drive...- et the computer to boot from the external drive...- Use the flash tools to update the BIO...- Restart the computer (booting from the HDD)...- X

13 hapter : Introduction Introduction Overview This manual covers the information you need to service or upgrade the X00 series notebook computer. Information about operating the computer (e.g. getting started, and the etup utility) is in the User s Manual. Information about drivers (e.g. VGA & audio) is also found in the User s Manual. The manual is shipped with the computer. Operating systems (e.g. Windows Vista/ Window, etc.) have their own manuals as do application softwares (e.g. word processing and database programs). If you have questions about those programs, you should consult those manuals. The X00 series notebook is designed to be upgradeable. ee Disassembly on page - for a detailed description of the upgrade procedures for each specific component. Please take note of the warning and safety information indicated by the symbol. The balance of this chapter reviews the computer s technical specifications and features..introduction Overview -

14 Introduction pecifications Processor Options Video Adapter.Introduction Latest pecification Information The specifications listed in this section are correct at the time of going to press. ertain items (particularly processor types/speeds) may be changed, delayed or updated due to the manufacturer's release schedule. heck with your service center for details. RAM Module peeds Use either 0MHz OR MHz DDRIII (DDR) modules of the same brand. Do not mix DRAM speeds/brands in order to prevent unexpected system behavior. RAID Hard Disks All hard disks in a RAID should be identical (the same size and brand) in order to prevent unexpected system behavior. Intel ore i Processor i- (. GHz,. GT/s, M L ache, nm, LGA Package) i-0 (.0 GHz,. GT/s, M L ache, nm, LGA Package) i-0 (. GHz,. GT/s, M L ache, nm, LGA Package) i-0 (. GHz,. GT/s, M L ache, nm, LGA Package) LD." FHD TFT LD Memory Three 0 Pin O-DIMM ockets upporting DDR 0/ MHz Memory Memory Expandable up to GB (Factory Option) Intel Turbo Memory (Robson) Module (GB) ore Logic Intel X + IH0R nvidia GeForce GTX 0M / GTX M / GTX 0M / GTX 0M / N0E-GLM PIe Video ard (LI) GB GDDR Video RAM on board Microsoft DirectX ompatible ecurity ecurity (Kensington Type) Lock lot BIO Password Fingerprint Reader Module Keyboard Full-size WinKey keyboard (with numeric keypad) Pointing Device Built-in TouchPad (scrolling key functionality integrated) ommunication Built-In Giga Base-TX Ethernet LAN.0M Pixel UB P amera Module (Factory Option) TV Tuner Module (Factory Option) HDMI-In Module BIO Phoenix BIO (Mb PI Flash-ROM) (Factory Option) Bluetooth. + EDR (Enhanced Data Rate) Module Wireless LAN Module Options: PU The PU is not a user serviceable part. Accessing the PU in any way may violate your warranty. torage Three hangeable." (cm). mm (h) ATA (erial) Hard Disk Drives supporting RAID level 0///Recovery (Factory Option) One hangeable.mm(h) Optical Device Type Drive (uper Multi Drive Module or Blu-Ray ombo Drive Module) (Factory Option) Intel WiFi Link 00 (0.a/g/n) Wireless LAN Half Mini-ard Module (Factory Option) Intel WiFi Link 00 (0.a/g/n) Wireless LAN Half Mini-ard Module (Factory Option) Third-Party 0.b/g/n Wireless LAN Half Mini-ard Module - pecifications

15 Introduction ard Reader Embedded -in- ard Reader MM (MultiMedia ard) / R MM D (ecure Digital) / Mini D / DH/ DX ompatible M (Memory tick) / M Pro / M Duo Mini ard lots High Definition Audio ompliant Interface /PDIF Digital Output Five peakers One ub Woofer Built-In Microphone Dolby Home Theater (. hannel) ertified External. hanel for Power DVD and Gaming lot for WLAN Module (Factory Option) lot for TV Tuner Module or Turbo Memory Module (Factory Option) lot for HDMI-In Module Interface Three UB.0 Ports Two UB.0 Ports One eata Port One HDMI-Out Port (Factory Option) One HDMI-In Port One DVI-Out Port One /PDIF Out Jack & Rear peaker Out One Headphone/peaker-Out Jack One Microphone-In Jack/enter peaker Out One Line-In Jack/ide peaker Out One Mini-IEEEb Port One RJ- LAN Jack One D-In Jack One Infrared Receiver for Optional TV Tuner Remote ontrol One ATV Antenna Jack (for Optional TV Tuner) Environmental pec Temperature Operating: - Non-Operating: -0-0 Relative Humidity Operating: 0% - 0% Non-Operating: 0% - 0% Power Full Range A/D Adapter A Input: 00-0V, 0-0Hz D Output: 0V, A (00W) Removable Polymer mart Lithium-Ion Battery Pack,.WH Dimensions & Weight mm (w) * mm (d) * 0.mm (h) Around. kg with Video ard, Battery and ODD.Introduction Audio pecifications -

16 Introduction.Introduction Figure Top View. P amera. Built-In Digital Microphone. LD. LED tatus Indicators. Touch ensor Instant Keys. peakers. Power Button. Keyboard. TouchPad and Buttons 0.Fingerprint Reader Module External Locator - Top View with LD Panel Open 0 - External Locator - Top View with LD Panel Open

17 Introduction External Locator - Front & Right ide Views Figure Front View FRONT VIEW. Infrared Receiver. LED Power Indicators RIGHT IDE VIEW Figure Right ide View. Line-In Jack. /PDIF-Out Jack. Microphone-In Jack. Headphone-In Jack. UB.0 Port. ecurity Lock lot.introduction External Locator - Front & Right ide Views -

18 Introduction Figure Left ide View External Locator - Left ide & Rear View.Introduction. DVI-Out Port. able (ATV) Antenna Jack. RJ- LAN Jack. HDMI-Out Port. UB.0 Ports. eata Port. Mini-IEEE b Port. HDMI-In Port (Factory Option). -in- ard Reader 0.Optical Device Drive Bay. Emergency Eject Hole / LEFT IDE VIEW 0 Figure Rear View REAR VIEW. Vent. D-In Jack - External Locator - Left ide & Rear View

19 Introduction External Locator - Bottom View Figure Bottom View. omponent Bay over. Vent. ub Woofer. Primary HDD Bay (HDD & ). Battery (econdary HDD Bay - HDD).Introduction Overheating To prevent your computer from overheating, make sure nothing blocks any vent while the computer is in use. External Locator - Bottom View -

20 Introduction Figure Mainboard Top Key Parts Mainboard Overview - Top (Key Parts).Introduction. TV Turbo Memory onnector. Mini-ard onnector (WLAN Module). KB-ITE IT0E. Memory lots DDR O-DIMM. Azalia odec - Mainboard Overview - Top (Key Parts)

21 Introduction Mainboard Overview - Bottom (Key Parts) Figure Mainboard Bottom Key Parts. PU ocket (no PU installed). VGA-ard onnectors. lock Generator.Introduction Mainboard Overview - Bottom (Key Parts) -

22 Introduction.Introduction Figure Mainboard Top onnectors. HDMI-Out Port. UB.0 Ports. eata Port. Mini-IEEE b Port. HDMI-In Port. onsumer Infrared onnector. Bluetooth able onnector. TouchPad able onnector. Fingerprint able onnector 0. Keyboard able onnector. ATA HDD onnector. LED onnector. Audio Board onnector. UB onnector. ub Woofer onnector. peaker onnector. D onnector. witch Board able onnector. ensor onnector 0. LD able onnector. Microphone able onnector. peaker onnector. MO Battery onnector Mainboard Overview - Top (onnectors) Mainboard Overview - Top (onnectors)

23 Introduction Mainboard Overview - Bottom (onnectors) Figure 0 Mainboard Bottom onnectors. PU Fan able onnector. PU Fan able onnector. ATA HDD onnector. VGA Fan able onnector. VGA Fan able onnector. RJ- LAN Jack. able (ATV) Antenna Jack. DVI-Out Port. D-In Jack.Introduction Mainboard Overview - Bottom (onnectors) -

24 Introduction.Introduction -

25 Disassembly hapter : Disassembly Overview This chapter provides step-by-step instructions for disassembling the X00 series notebook s parts and subsystems. When it comes to reassembly, reverse the procedures (unless otherwise indicated). We suggest you completely review any procedure before you take the computer apart. Procedures such as upgrading/replacing the RAM, optical device and hard disk are included in the User s Manual but are repeated here for your convenience. To make the disassembly process easier each section may have a box in the page margin. Information contained under the figure # will give a synopsis of the sequence of procedures involved in the disassembly procedure. A box with a lists the relevant parts you will have after the disassembly process is complete. Note: The parts listed will be for the disassembly procedure listed ONLY, and not any previous disassembly step(s) required. Refer to the part list for the previous disassembly procedure. The amount of screws you should be left with will be listed here also. Information.Disassembly A box with a will also provide any possible helpful information. A box with a contains warnings. An example of these types of boxes are shown in the sidebar. Warning Overview -

26 Disassembly NOTE: All disassembly procedures assume that the system is turned OFF, and disconnected from any power supply (the battery is removed too). Maintenance Tools The following tools are recommended when working on the notebook P: M Philips-head screwdriver M. Philips-head screwdriver (magnetized) M Philips-head screwdriver mall flat-head screwdriver Pair of needle-nose pliers Anti-static wrist-strap.disassembly onnections onnections within the computer are one of four types: Locking collar sockets for ribbon connectors Pressure sockets for multi-wire connectors Pressure sockets for ribbon connectors Board-to-board or multi-pin sockets To release these connectors, use a small flat-head screwdriver to gently pry the locking collar away from its base. When replacing the connection, make sure the connector is oriented in the same way. The pin side is usually not indicated. To release this connector type, grasp it at its head and gently rock it from side to side as you pull it out. Do not pull on the wires themselves. When replacing the connection, do not try to force it. The socket only fits one way. To release these connectors, use a small pair of needle-nose pliers to gently lift the connector away from its socket. When replacing the connection, make sure the connector is oriented in the same way. The pin side is usually not indicated. To separate the boards, gently rock them from side to side as you pull them apart. If the connection is very tight, use a small flat-head screwdriver - use just enough force to start. - Overview

27 Disassembly Maintenance Precautions The following precautions are a reminder. To avoid personal injury or damage to the computer while performing a removal and/or replacement job, take the following precautions:. Don't drop it. Perform your repairs and/or upgrades on a stable surface. If the computer falls, the case and other components could be damaged.. Don't overheat it. Note the proximity of any heating elements. Keep the computer out of direct sunlight.. Avoid interference. Note the proximity of any high capacity transformers, electric motors, and other strong magnetic fields. These can hinder proper performance and damage components and/or data. You should also monitor the position of magnetized tools (i.e. screwdrivers).. Keep it dry. This is an electrical appliance. If water or any other liquid gets into it, the computer could be badly damaged.. Be careful with power. Avoid accidental shocks, discharges or explosions. Before removing or servicing any part from the computer, turn the computer off and detach any power supplies. When you want to unplug the power cord or any cable/wire, be sure to disconnect it by the plug head. Do not pull on the wire.. Peripherals Turn off and detach any peripherals.. Beware of static discharge. Is, such as the PU and main support chips, are vulnerable to static electricity. Before handling any part in the computer, discharge any static electricity inside the computer. When handling a printed circuit board, do not use gloves or other materials which allow static electricity buildup. We suggest that you use an anti-static wrist strap instead.. Beware of corrosion. As you perform your job, avoid touching any connector leads. Even the cleanest hands produce oils which can attract corrosive elements.. Keep your work environment clean. Tobacco smoke, dust or other air-born particulate matter is often attracted to charged surfaces, reducing performance. 0. Keep track of the components. When removing or replacing any part, be careful not to leave small parts, such as screws, loose inside the computer. Power afety Warning Before you undertake any upgrade procedures, make sure that you have turned off the power, and disconnected all peripherals and cables (including telephone lines). It is advisable to also remove your battery in order to prevent accidentally turning the machine on..disassembly leaning Do not apply cleaner directly to the computer, use a soft clean cloth. Do not use volatile (petroleum distillates) or abrasive cleaners on any part of the computer. Overview -

28 Disassembly Disassembly teps The following table lists the disassembly steps, and on which page to find the related information. PLEAE PERFORM THE DIAEMBLY TEP IN THE ORDER INDIATED..Disassembly To remove the Battery:. Remove the battery page - To remove the Optical Device:. Remove the battery page -. Remove the Optical device page - To remove a Processor:. Remove the battery page -. Remove the processor page - To remove and install a Video ard:. Remove the battery page -. Remove the video card page -. Install the video card page - To remove the Keyboard:. Remove the battery page -. Remove the keyboard page - To remove the Bluetooth Module:. Remove the battery page -. Remove the Bluetooth page - To remove the ystem Memory:. Remove the battery page -. Remove the system memory page - To remove the HDD:. Remove the battery page -. Remove the HDD from the Primary HDD Bay page - 0. Remove the HDD from the Primary HDD Bay page - To remove the Hinges:. Remove the battery page -. Remove the LD back cover page - To remove the Wireless LAN Module:. Remove the battery page -. Remove the wireless LAN page - - Disassembly teps

29 Disassembly Removing the Battery. Turn the computer off, and turn it over.. Loosen screws - (Figure a) and carefully lift the battery up (Figure b).. Remove the battery from the battery bay (Figure c). a. c. Figure Battery Removal a. Loosen screws. b. arefully lift the battery up. c. Remove the battery from the battery bay. b..disassembly. Battery crews Removing the Battery -

30 Disassembly Figure Optical Device Removal a. Remove the screws from the hard disk bay cover. b. Remove the hard disk bay cover. c Remove the screw d. Use a screwdriver to carefully push out the optical device at point. Removing the Optical (D/DVD) Device. Turn off the computer, remove the battery (page - ).. Remove screws & from the hard disk bay cover (Figure a).. Remove the hard disk bay cover (Figure b).. Remove the screw at point (Figure c), and use a screwdriver to carefully push out the optical device at point (Figure d).. Reverse the process to install any new optical device. a. c..disassembly b. d.. Optical Device crews - Removing the Optical (D/DVD) Device

31 Disassembly Removing the Processor. Turn off the computer, remove the battery (page - ).. Remove the screws - from the component bay cover (Figure a).. Remove the screws - from the PU fan (Figure b).. Disconnect the fan cable and remove the PU fan 0 (Figure c).. Remove the screws - from the PU heatsink (Figure d). a. c. 0 Figure Processor Removal a. Remove the screws from the component bay cover. b. Remove the screws from the PU fan. c. Disconnect the fan cable and remove the PU fan. d. Remove the screws from the PU heatsink. b. d. crew crew Heat ink crew Removal and Insertion Remove the screws from the heat sink in the order indicated here: When tightening the screws, make sure that they are tightened in the order: Disassembly crew crew crew crew crew 0. PU Fan. PU Heatsink crews Heat ink crew Removal and Insertion Remove the screws from the heat sink in the order indicated here: When tightening the screws, make sure that they are tightened in the order: Removing the Processor -

32 Disassembly.Disassembly Figure Processor Removal (cont d) e. arefully lift up the heat sink off the computer by pulling the plastic strip up. f. Press down and hold the latch (with the latch held down you will be able to release it) g. Turn the release latch to unlock the PU. h. Lift the PU out of the socket. aution The heat sink, and PU area in general, contains parts which are subjected to high temperatures. Allow the area time to cool before removing these parts.. arefully lift up the heat sink off the computer by pulling the plastic strip up (Figure e).. Press down and hold the latch 0 (with the latch held down you will be able to release it) (Figure f).. Move the latch upward and bracket downward fully in the direction indicated to unlock the PU (Figure g).. arefully (it may be hot) lift the PU up out of the socket (Figure h). 0. Reverse the process to install a new PU.. When re-inserting the PU, pay careful attention to the pin alignment, it will fit only one way (DO NOT FORE IT!). e. g. h. f.. PU Heatsink. PU 0 - Removing the Processor

33 Disassembly Removing and Installing the Video ard Video ard Removal Procedure. Turn off the computer, turn it over and remove the battery (page - ) and component cover (page - ).. Remove screws - (Figure a).. Disconnect the fan cables & 0 and remove the fan units & (Figure b).. Remove screws - 0 from the heat sink unit in the order indicated on the label (i.e screw first through to screw last) (Figure c).. arefully (it may be hot) remove the heat sink units & by pulling the plastic strips & up (Figure d).. Remove screws - from the video cards & 0 (Figure d). a. c. b. d. 0 0 crew crew crew crew crew crew crew crew 0 Heat ink crew Removal and Insertion Remove the screws from the heat sink in the order indicated here: ---. When tightening the screws, make sure that they are tightened in the order: ---. Figure Video ard Removal Procedure a. Remove the fan screws. b. Disconnect the fan cables & remove the fan units. c. Remove the screws in the correct order. d. arefully remove the heat sink units by pulling the plastic strips up. Remove the video aution The heat sink, and video card area in general, contains parts which are subject to high temperatures. Allow the area time to cool before removing these parts. &.Fan Units &.Heat ink Units & 0.Video ards 0 crews.disassembly Removing and Installing the Video ard -

34 Disassembly Figure Video ard Removal (cont d) e. The video cards will pop up. f. Disconnect the video card cables and remove the video cards.. The video cards & 0 will pop up.. Disconnect the video card cables & and remove the video cards & 0 (Figure f). e. f. 0.Disassembly aution The heat sink, and video card area in general, contains parts which are subject to high temperatures. Allow the area time to cool before removing these parts. & 0.Video ards - 0 Removing and Installing the Video ard

35 Disassembly Installing a New Video ard. Prepare to fit the video cards & 0 into the slot by holding it at about a 0 angle (page - 0).. The card needs to be fully into the slot, and the video card and socket have a guide-key and pin which align to allow the card to fit securely (Figure h).. Fit the connectors firmly into the socket, straight and evenly (Figure h). g. h. Figure Installing a New Video ard g. Insert the video cards at a 0 degree angle. h. Fit the connectors straight and even.. DO NOT attempt to push one end of the card in ahead of the other.. The card s pin alignment will allow it to only fit one way. Make sure the module is seated as far into the socket as it will go (none of the gold colored contact should be showing). DO NOT FORE the card; it should fit without much pressure.. ecure the card with screws - (Figure on page - ).. Place the heat sink back on the card, and secure the screws in the order indicated in Figure on page -.. Attach the video card fan and secure with the screws as indicated in Figure on page -.. Reinsert the component bay cover, and secure with the screws as indicated in Figure on page -. aution The heat sink, and video card area in general, contains parts which are subject to high temperatures. Allow the area time to cool before removing these parts..disassembly Removing and Installing the Video ard -

36 Disassembly.Disassembly Figure Keyboard Removal a. Remove screws from the bottom of the computer. b. Turn the computer over, open the Lid/LD, and carefully (a cable is connected to the underside of the LED cover module) unsnap up the LED cover module from point on the right. c. Disconnect cable and remove the LED cover module. Removing the Keyboard. Turn off the computer and remove the battery (page - ).. Remove screws - from the bottom of the computer (Figure a).. Turn the computer over, open the Lid/LD, and carefully (a cable is connected to the underside of the LED cover module) unsnap up the LED cover module from point on the right (Figure b).. Disconnect cable and remove the LED cover module (Figure c). a. c. b.. LED over Module crews - Removing the Keyboard

37 Disassembly. Remove screws - from the keyboard (Figure d).. arefully lift the keyboard up, being careful not to bend the keyboard ribbon cable. Disconnect the keyboard ribbon cable from the locking collar socket (Figure e).. Remove the keyboard (Figure f). Figure Keyboard Removal (cont d.) d. f. 0 e. d. Remove screws from the keyboard. e. arefully lift the keyboard up, being careful not to bend the keyboard ribbon cable. Disconnect the keyboard ribbon cable from the locking collar socket. f. Remove the keyboard..disassembly Keyboard Tabs Re-Inserting the Keyboard. Keyboard When re-inserting the keyboard, align first the four keyboard tabs (Figure f) that are located at the bottom, to the slots in the case. crews Removing the Keyboard -

38 Disassembly Figure 0 Keyboard Removal (cont d.). Remove screws - from the keyboard shielding plate (Figure 0g).. Lift the keyboard shielding plate up in the direction of the arrow (Figure 0h). 0. Remove the keyboard shielding plate (Figure 0i)..Disassembly g. Remove screws from the keyboard shielding plate. h. Lift the keyboard shielding plate up in the direction of the arrow. i. Remove the keyboard shielding plate. g. h. i.. Keyboard hielding Plate crews - Removing the Keyboard

39 Disassembly Keyboard hielding Plate Insertion. When re-inserting the keyboard shielding plate make sure you insert it by sliding it into position at an angle as illustrated by arrow below, and press it down into position (Figure a).. ecure the plate with screws - (Figure b). Figure Keyboard hielding Plate Insertion a. b. a. When re-inserting the keyboard shielding plate make sure you insert it by sliding it into position at an angle as illustrated by arrow below, and press it down into position. b. ecure the plate with screws..disassembly crews Removing the Keyboard -

40 Disassembly Figure Wireless LAN Module Removal a. The Wireless LAN module will be visible at point on the mainboard. b. Disconnect the cables and remove the screw. c. The WLAN module will pop up. d. Lift the WLAN module out. Removing the Wireless LAN Module. Turn off the computer, remove the battery (page - ) and the keyboard (page - ).. The Wireless LAN module will be visible at point (Figure a) on the mainboard.. arefully disconnect cables -, then remove screw from the module socket (Figure b).. The Wireless LAN module (Figure c) will pop-up.. Lift the Wireless LAN module (Figure d) up and off the computer. a. d..disassembly Note: Make sure you reconnect the antenna cable to + socket (Figure b). b. c.. WLAN Module. crew - Removing the Wireless LAN Module

41 Disassembly Removing the Bluetooth Module. Turn off the computer, remove the battery (page - ) and the keyboard (page - ).. The Bluetooth module will be visible at point (Figure a).. Remove screw (Figure b).. arefully separate the Bluetooth module from the connector and disconnect the cable (Figure b).. Lift the Bluetooth module (Figure c) up and off the computer.. a. c. Figure Bluetooth Module Removal a. The Bluetooth module will be visible at point. b. Remove the screw, disconnect the cable and the connector. c. Lift the Bluetooth module up off the socket. b..disassembly. Bluetooth Module crew Removing the Bluetooth Module -

42 Disassembly.Disassembly Figure RAM Module Removal a. The RAM modules will be visible at points -. b. Gently pull the two release latches on the sides of the memory socket in the direction indicated by the arrows. c.the RAM module will pop-up, and you can then remove it. ontact Warning Be careful not to touch the metal pins on the module s connecting edge. Even the cleanest hands have oils which can attract particles, and degrade the module s performance. Removing the ystem Memory (RAM) The computer has three memory sockets for 0 pin mall Outline Dual In-line Memory Modules (O-DIMM) supporting DDR 0/MHz. The main memory can be expanded up to GB. The O-DIMM modules supported are 0MB, and 0MB and DDRIII Modules. The total memory size is automatically detected by the POT routine once you turn on your computer. Memory Upgrade Process. Turn off the computer, remove the battery (page - ) and the keyboard (page - ).. The RAM modules will be visible at points - (Figure a).. Gently pull the two release latches ( - ) on the sides of the memory socket in the direction indicated by the arrows (Figure b).. The RAM module 0 will pop-up (Figure c), and you can then remove it.. a. c. b. 0. RAM Module 0 - Removing the ystem Memory (RAM)

43 Disassembly. Pull the latches to release the second and third modules if necessary.. Insert a new module holding it at about a 0 angle and fit the connectors firmly into the memory slot.. The module s pin alignment will allow it to only fit one way. Make sure the module is seated as far into the slot as it will go. DO NOT FORE the module; it should fit without much pressure.. Press the module in and down towards the mainboard until the slot levers click into place to secure the module.. Replace the bay cover and screws (make sure you reconnect the fan cable before screwing down the bay cover). 0. Restart the computer to allow the BIO to register the new memory configuration as it starts up..disassembly Removing the ystem Memory (RAM) -

44 Disassembly Figure Removing the Hard Disk(s) from the Primary HDD Bay Removing the Hard Disk(s) from the Primary HDD Bay The hard disk drive can be taken out to accommodate other." serial (ATA) hard disk drives with a height of.mm (h). Follow your operating system s installation instructions, and install all necessary drivers and utilities (as outlined in hapter of the User s Manual) when setting up a new hard disk..disassembly a. Remove screws and disconnect cable from the hard disk assembly. b. Remove the hard disk assembly. c. Grip the tab to remove the HDD cable.. Turn off the computer,remove the battery (page - ) and hard disk bay cover (page - ).. Remove screws - from the hard disk assembly (Figure a).. Disconnect cable from the hard disk assembly (Figure a).. Remove the hard disk assembly (Figure b).. Grip the tab to remove the HDD cable (Figure c). a. b. c.. Hard Disk Assembly crews - 0 Removing the Hard Disk(s) from the Primary HDD Bay

45 Disassembly. Remove screws - (Figure d). *The number and sequence of screws to be removed will depend on whether or not you have one or two hard disks installed in the case. d. Figure Removing the Hard Disk(s) from the Primary HDD Bay (cont d.) d. Remove the screws. 0 0.Disassembly crews Removing the Hard Disk(s) from the Primary HDD Bay -

46 Disassembly Figure Inserting the Primary Hard Disk(s) Inserting the Primary Hard Disk(s). Insert the HDD(s) into the HDD case as illustrated (Figure a). *Make sure the cable connectors are facing towards the gap at the rear of the case.. Insert screws - to secure the hard disk(s) in the case (Figure b). a. Insert the HDD into the case. b. Insert screws to secure the hard disk(s) in the case. a..disassembly. Hard Disk. Hard Disk ase b. crews - Removing the Hard Disk(s) from the Primary HDD Bay

47 Disassembly. Firmly insert the HDD cable into the hard disk assembly in the direction of the arrow as indicated below (Figure c).. Insert the HDD assembly into the bay by pushing it straight down (Figure d). *Do not insert the assembly at an angle.. Firmly connect cable to the mainboard and then secure the assembly with screws 0 - (Figure d). c. d. 0 Figure Inserting the Primary Hard Disk(s) (cont d.) c. Firmly insert the HDD cable into the hard disk assembly. d. Insert the HDD assembly into the bay by pushing it straight down. Firmly connect the cable and then secure the assembly with screws..disassembly. Hard Disk Assembly. Hard Disk able crews Removing the Hard Disk from the econdary HDD Bay Removing the Hard Disk from the econdary HDD Bay -

48 Disassembly.Disassembly Figure Removing the Hard Disk from the econdary HDD Bay a. Remove screws from the hard disk assembly. b. Grip the tab and slide the hard disk assembly in the direction of the arrow. Lift the hard disk assembly out of the compartment. c. Remove screws from the hard disk assembly. d. eparate the HDD from the HDD case.. Remove screws - from the hard disk assembly (Figure a).. Grip the tab and slide the hard disk assembly in the direction of the arrow (Figure b).. Lift the hard disk assembly out of the compartment (Figure b).. Remove screws - from the hard disk assembly (Figure c).. eparate the hard disk 0 from the HDD case (Figure d).. Insert the replacement HDD into the case *Make sure the cable connector is facing towards the rear of the case as illustrated below. a. b. c. d. 0. Hard Disk. Hard Disk ase crews 0 - Removing the Hard Disk from the econdary HDD Bay

49 Disassembly. Replace screws - (page - ).. Insert the HDD assembly into the bay by pushing it straight down (do not insert the assembly at an angle) and then slide it in the direction of the arrow to lock in place (Figure 0e). e. Figure 0 Removing the Hard Disk(s) from the econdary HDD Bay (cont d.) e. Insert the HDD assembly into the bay by pushing it straight down and then slide it in the direction of the arrow to lock in place..disassembly Removing the Hard Disk from the econdary HDD Bay -

50 Disassembly.Disassembly Figure Hinge Removal a. Re-insert the hinges into the top case. b. Raise the LD to a 0 angle. c. Remove the whole LD assembly again from the base of the computer. Remove the screws at the base of the LD assembly. Removing the Hinges. The whole LD assembly is detached from the base of the computer.. Re-insert hinges & (Figure a) into the top case and raise the LD to a 0 angle (Figure b) to adjust the positioning of the hinges for removal.. Remove the whole LD assembly again from the base of the computer (Figure c).. Remove screws - at the base of the LD assembly (Figure c). a. b. c.. LD Assembly crews Note: This is the position of the hinges prior to re-inserting them into the top case of the computer. Note: This will be the new position of the hinges after re-inserting them into the top case of the computer. - Removing the Hinges

51 Disassembly. Remove hinges & (Figure d). Figure Hinge Removal d. d. Remove the hinges..disassembly &.Hinges Removing the Hinges -

52 Disassembly.Disassembly -

53 Appendix A:Part Lists Part Lists This appendix breaks down the X00 series notebook s construction into a series of illustrations. The component part numbers are indicated in the tables opposite the drawings. Note: This section indicates the manufacturer s part numbers. Your organization may use a different system, so be sure to cross-check any relevant documentation. Note: ome assemblies may have parts in common (especially screws). However, the part lists DO NOT indicate the total number of duplicated parts used. Note: Be sure to check any update notices. The parts shown in these illustrations are appropriate for the system at the time of publication. Over the product life, some parts may be improved or re-configured, resulting in new part numbers. A.Part Lists A-

54 Part Lists Part List Illustration Location The following table indicates where to find the appropriate part list illustration. A.Part Lists Table A - Part List Illustration Location Part X00 Top page A - Bottom page A - LD page A - ATA DVD uper-multi page A - ATA Blu-Ray ombo page A - VGA-GTX page A - A - Part List Illustration Location

55 Part Lists Top 非耐落 黑色 Figure A - Top A.Part Lists 非耐落 凱碩 藍天互億 Top A -

56 Part Lists Bottom A.Part Lists Figure A - Bottom 非耐落 A - Bottom

57 Part Lists LD Figure A - LD A.Part Lists LD A -

58 Part Lists ATA DVD uper-multi A.Part Lists Figure A - ATA DVD uper- Multi 非耐落 A - ATA DVD uper-multi

59 Part Lists ATA Blu-Ray ombo 非耐落 Figure A - ATA Blu-Ray ombo A.Part Lists ATA Blu-Ray ombo A -

60 Part Lists VGA-GTX A.Part Lists Figure A - VGA-GTX 非耐落 ( 半卡 ) ( 半卡 ) 增加 A - VGA-GTX

61 Appendix B: chematic Diagrams chematic Diagrams This appendix has circuit diagrams of the X00 notebook s PB s. The following table indicates where to find the appropriate schematic diagram. Diagram - Page Diagram - Page Diagram - Page ystem Block Diagram - Page B - lock Generator V - Page B - 0 Power PU_VTT - Page B - LGA Part A DDR / - Page B - - Page B - 0 Power VORE - Page B - LGA Part B DDR / - Page B - MXM.0 PI-E Master - Page B - Power.V/0.V - Page B - 0 LGA Part QPI - Page B - - Page B - Power.V,.V - Page B - LGA Part D Power - Page B - HDMI-In Buffer/ATA HDD ON - Page B - V/Power witch - Page B - LGA Part E, Thermal - Page B - HDMI Port - Page B - Power VDD, VDD, IH_.V - Page B - DDR hannel A O-DIMM_0 - Page B - LD, INT - Page B - Power A_In, harge - Page B - DDR hannel B O-DIMM_ - Page B - DVI-I - Page B - Audio Board - Page B - DDR hannel O-DIMM_ - Page B - 0 DP witch NDP - Page B - ard Reader Board - Page B - X QPI Interface - Page B - KB-ITE ITE - Page B - lick Board - Page B - X PIEX, PIEX, DMI - Page B - UB.0 - Page B - 0 onsumer IR Board - Page B - X MI - Page B - PIE ard Reader/LAN JM - Page B - witch Board - Page B - X PWR - Page B - B (TI-XIOBZAY) - Page B - UB Board - Page B - 0 X - Page B - odec, ubwoofer, DMI - Page B - Finger ensor Board - Page B - IH0 DMI/PIE/UB/ATA - Page B - Audio AMP TPA0A/TPA - Page B - Touch ensor Board - Page B - IH0 PI/PI/Other - Page B - WLAN/HDMI-In/TV/ROBON - Page B - Power LED Board - Page B - IH0 Power/ - Page B - D/BT/ATA - Page B - Fan TRL - Page B - Daughter onnector - Page B - Table B - HEMATI DIAGRAM Version Note The schematic diagrams in this chapter are based upon version -P-X0A- 00A. If your mainboard (or other boards) are a later version, please check with the ervice enter for updated diagrams (if required). B.chematic Diagrams B-

62 chematic Diagrams B.chematic Diagrams heet of ystem Block Diagram ystem Block Diagram witch Board lick Board Touch ensor Board TOUH PAD ONUMER IR PIE LOK BUFFER IDB0 PIE LOK LOK GEN. V. MHz INT. K/B THERMAL ENOR EM0 0 MHz E MBU Panther LEVO.0 X00 ystem Block Diagram MXM.0 VGA ard Master E LI MXM.0 VGA ard lave MART FAN ITE e DP D PANEL (OPTION) HDMI DVI/RGB LVD. KHz MART BATTERY ATA 00MB/s PI-E x PI-E x LP MHz TPM (OPTION) PROEOR Bloomfield LGA ocket-b. GT/s Default. GT/s QPI IOH Intel Tylersburg ball X DMI outh Bridge IH0 mbga. KHz UB.0 DDRIII 0/ MHz PI-E x YTEM MBU AZALIA LINK PIE Mini ARD OKET UB WLAN DDR DRAM OKET Mini ARD OKET UB ROBON/TV O-DIMM0 O-DIMM O-DIMM MHz 00 MHz Mini ARD OKET HDMI-in P. P. P. upd000 UB.0 Host PORT UB UB.0 PORT UB MHz JM ARD READER & GLAN RJ- YV,Y0V,YV,VDD,VDD IH_.V VIN,VA PU_VTT.V,0.V.V,.V V,V,.V,V,V,A_.V V,V VORE ARD READER in PDIF OUT AUDIO BOARD. HANNEL OUT MHz MI IN AZALIA ODE+ AMPLIFIER AL-V TPA0A TPAA XIOZAY IEEE b HP OUT.0 MHz LINE IN INT. PK MM/D/M/M Pro e- ATA ATA ODD ATA HDD PORT UB0 PORT UB PORT UB BT UB D UB Finger Printer UB B - ystem Block Diagram

63 chematic Diagrams LGA Part A DDR / B - B.chematic Diagrams LGA Part A DDR / M_DATA_B M_DQ DN M_DATA_ M_DATA_B M_DATA_A0 M_DATA_A M_DATA_A M_DATA_B M_DATA_ M_DATA_A M_DATA_B M_DATA_A M_DATA_B M_DATA_0 M_DATA_A M_DATA_B M_DATA_A M_DATA_ M_DATA_A M_DATA_B M_DATA_A M_DQ DN M_DATA_ M_DATA_B M_DATA_A M_DQ DN M_DATA_B0 M_DATA_A M_DATA_ M_DATA_A M_DQ DN M_DATA_B M_DATA_A0 M_DQ DN M_DATA_B M_DATA_A M_DATA_B M_DATA_A M_DATA_B M_DATA_ M_DQ_A_DP[:0] hannel hannelb hannela M_DQ_A_DN[:0] M_DATA_B[:0] M_DQ_B_DN[:0] M_DQ_B_DP[:0] M_DQ DP[:0] M_DATA_A[:0] M_DATA_[:0] M_DQ DN[:0] M_B_E_A[:0] M_B_E_[:0] M_B_E_B[:0] OF J_PUB Molex D--00 DDR_DQ_0 AA DDR_DQ_ AA DDR_DQ_ Y DDR_DQ_ Y DDR_DQ_ AA DDR_DQ_ AB DDR_DQ_ Y0 DDR_DQ_ Y DDR_DQ_ P DDR_DQ_ P DDR_DQ_0 P DDR_DQ_ N DDR_DQ_ R DDR_DQ_ R DDR_DQ_ N DDR_DQ_ N DDR_DQ_ M DDR_DQ_ M DDR_DQ_ K DDR_DQ_ J DDR_DQ_0 N DDR_DQ_ M DDR_DQ_ J DDR_DQ_ H DDR_DQ_ H DDR_DQ_ L DDR_DQ_ K DDR_DQ_ J DDR_DQ_ J DDR_DQ_ H DDR_DQ_0 L DDR_DQ_ K0 DDR_DQ_ E DDR_DQ_ E DDR_DQ_ E DDR_DQ_ F DDR_DQ_ F0 DDR_DQ_ G DDR_DQ_ D DDR_DQ_ F DDR_DQ_0 H DDR_DQ_ J DDR_DQ_ G DDR_DQ_ H DDR_DQ_ G DDR_DQ_ H DDR_DQ_ G DDR_DQ_ J DDR_DQ_ K DDR_DQ_ K DDR_DQ_0 R DDR_DQ_ T DDR_DQ_ J DDR_DQ_ M DDR_DQ_ R DDR_DQ_ R DDR_DQ_ W DDR_DQ_ W DDR_DQ_ Y0 DDR_DQ_ W0 DDR_DQ_0 V DDR_DQ_ W DDR_DQ_ AA DDR_DQ_ W DDR_E_0 D DDR_E_ F DDR_E_ E DDR_E_ G DDR_E_ E DDR_E_ F DDR_E_ E DDR_E_ G DDR_DQ_P0 Y DDR_DQ_P R DDR_DQ_P L DDR_DQ_P L0 DDR_DQ_P E DDR_DQ_P H DDR_DQ_P L DDR_DQ_P Y DDR_DQ_P G DDR_DQ_P AA0 DDR_DQ_P0 P DDR_DQ_P L DDR_DQ_P K DDR_DQ_P F DDR_DQ_P H DDR_DQ_P M DDR_DQ_P Y DDR_DQ_P F DDR_DQ_N0 Y DDR_DQ_N R DDR_DQ_N L DDR_DQ_N L DDR_DQ_N D DDR_DQ_N G DDR_DQ_N L DDR_DQ_N Y DDR_DQ_N G DDR_DQ_N AA DDR_DQ_N0 P DDR_DQ_N K DDR_DQ_N K DDR_DQ_N F DDR_DQ_N J DDR_DQ_N M DDR_DQ_N Y DDR_DQ_N E OF J_PUA Molex D--00 DDR0_DQ_0 W DDR0_DQ_ V DDR0_DQ_ R DDR0_DQ_ R DDR0_DQ_ W0 DDR0_DQ_ W DDR0_DQ_ U DDR0_DQ_ T DDR0_DQ_ N DDR0_DQ_ N DDR0_DQ_0 K DDR0_DQ_ K DDR0_DQ_ P DDR0_DQ_ P DDR0_DQ_ L DDR0_DQ_ L DDR0_DQ_ H DDR0_DQ_ H DDR0_DQ_ E DDR0_DQ_ E DDR0_DQ_0 J DDR0_DQ_ J DDR0_DQ_ F DDR0_DQ_ F DDR0_DQ_ D0 DDR0_DQ_ DDR0_DQ_ A DDR0_DQ_ D DDR0_DQ_ D DDR0_DQ_ D DDR0_DQ_0 DDR0_DQ_ B DDR0_DQ_ B DDR0_DQ_ DDR0_DQ_ F DDR0_DQ_ G DDR0_DQ_ B DDR0_DQ_ DDR0_DQ_ F DDR0_DQ_ F DDR0_DQ_0 H DDR0_DQ_ H DDR0_DQ_ L DDR0_DQ_ M DDR0_DQ_ G DDR0_DQ_ H DDR0_DQ_ L DDR0_DQ_ L DDR0_DQ_ N DDR0_DQ_ N DDR0_DQ_0 T DDR0_DQ_ T DDR0_DQ_ M DDR0_DQ_ N DDR0_DQ_ R DDR0_DQ_ T DDR0_DQ_ U DDR0_DQ_ V DDR0_DQ_ Y DDR0_DQ_ Y DDR0_DQ_0 U DDR0_DQ_ U DDR0_DQ_ V DDR0_DQ_ W DDR0_E_0 DDR0_E_ A DDR0_E_ F DDR0_E_ DDR0_E_ DDR0_E_ A DDR0_E_ B DDR0_E_ DDR0_DQ_P0 T DDR0_DQ_P L DDR0_DQ_P F DDR0_DQ_P B DDR0_DQ_P E DDR0_DQ_P K DDR0_DQ_P R DDR0_DQ_P W DDR0_DQ_P D DDR0_DQ_P V DDR0_DQ_P0 N DDR0_DQ_P H DDR0_DQ_P D DDR0_DQ_P D DDR0_DQ_P J DDR0_DQ_P P DDR0_DQ_P V DDR0_DQ_P B DDR0_DQ_N0 U DDR0_DQ_N M DDR0_DQ_N G DDR0_DQ_N B0 DDR0_DQ_N E DDR0_DQ_N K DDR0_DQ_N R DDR0_DQ_N W DDR0_DQ_N D DDR0_DQ_N V DDR0_DQ_N0 M DDR0_DQ_N G DDR0_DQ_N DDR0_DQ_N D DDR0_DQ_N J DDR0_DQ_N P DDR0_DQ_N V DDR0_DQ_N B OF J_PU Molex D--00 DDR_DQ_0 W DDR_DQ_ W DDR_DQ_ V DDR_DQ_ U DDR_DQ_ U DDR_DQ_ V DDR_DQ_ V DDR_DQ_ V DDR_DQ_ U DDR_DQ_ U DDR_DQ_0 R DDR_DQ_ T DDR_DQ_ W DDR_DQ_ V DDR_DQ_ T DDR_DQ_ R0 DDR_DQ_ M DDR_DQ_ M0 DDR_DQ_ J0 DDR_DQ_ J DDR_DQ_0 P0 DDR_DQ_ N DDR_DQ_ L0 DDR_DQ_ K DDR_DQ_ G0 DDR_DQ_ F0 DDR_DQ_ J DDR_DQ_ H DDR_DQ_ H DDR_DQ_ G DDR_DQ_0 F DDR_DQ_ E DDR_DQ_ K DDR_DQ_ J DDR_DQ_ H DDR_DQ_ L DDR_DQ_ G DDR_DQ_ G0 DDR_DQ_ H DDR_DQ_ L DDR_DQ_0 L0 DDR_DQ_ K0 DDR_DQ_ M DDR_DQ_ N DDR_DQ_ L DDR_DQ_ M0 DDR_DQ_ L DDR_DQ_ M DDR_DQ_ P DDR_DQ_ N DDR_DQ_0 P DDR_DQ_ P0 DDR_DQ_ N DDR_DQ_ N DDR_DQ_ R0 DDR_DQ_ R DDR_DQ_ U DDR_DQ_ U DDR_DQ_ T0 DDR_DQ_ U0 DDR_DQ_0 T DDR_DQ_ T DDR_DQ_ V DDR_DQ_ U DDR_E_0 H DDR_E_ F DDR_E_ E DDR_E_ E0 DDR_E_ J DDR_E_ J0 DDR_E_ F DDR_E_ F0 DDR_DQ_P0 W DDR_DQ_P T DDR_DQ_P K0 DDR_DQ_P E DDR_DQ_P J0 DDR_DQ_P L DDR_DQ_P P DDR_DQ_P U DDR_DQ_P G DDR_DQ_P U DDR_DQ_P0 U0 DDR_DQ_P M DDR_DQ_P H DDR_DQ_P H DDR_DQ_P K DDR_DQ_P N DDR_DQ_P V DDR_DQ_P H DDR_DQ_N0 W DDR_DQ_N T DDR_DQ_N K DDR_DQ_N E0 DDR_DQ_N J DDR_DQ_N K DDR_DQ_N P DDR_DQ_N T DDR_DQ_N G0 DDR_DQ_N T DDR_DQ_N0 T0 DDR_DQ_N L DDR_DQ_N G DDR_DQ_N J DDR_DQ_N K DDR_DQ_N P DDR_DQ_N V DDR_DQ_N G M_DQ_A_DN[:0] M_DQ_A_DP[:0] M_DATA_A[:0] M_DQ_B_DN[:0] M_DQ_B_DP[:0] M_DATA_B[:0] M_DQ DN[:0] M_DQ DP[:0] M_DATA_[:0] M_DATA_ M_B_E_0 M_DQ DN M_DATA_B M_DATA_B M_DATA_ M_DQ DN M_DATA_B M_DATA_B M_DATA_B M_DATA_B0 M_DQ_A_DP0 M_DATA_ M_DATA_ M_DATA_B M_DQ_A_DP M_DATA_B M_DATA_ M_B_E_ M_DQ_A_DP M_DATA_B M_B_E_ M_DQ_A_DP M_DQ_A_DP M_B_E_ M_DQ_A_DP M_DATA_B M_DATA_0 M_DQ_A_DP M_DATA_B M_DATA_ M_B_E_ M_DQ_A_DN0 M_DATA_B M_DQ_A_DP M_DATA_B M_B_E_ M_DATA_ M_DATA_B M_B_E_ M_DATA_B M_B_E_ M_DATA_B0 M_DQ_A_DN M_DATA_ M_DQ_A_DN M_DQ_A_DN M_DATA_B M_DQ_A_DN M_DATA_ M_DQ_A_DN M_DQ_A_DN M_DQ_A_DN M_DATA_B M_DATA_ M_DATA_0 M_DATA_B M_DATA_ M_DATA_B M_DATA_ M_DATA_B M_DATA_ M_DATA_B M_DATA_B M_DATA_ M_DATA_ M_DATA_B M_DATA_B M_DATA_ M_DATA_0 M_DATA_B0 M_DATA_ M_DATA_ M_DATA_B M_DATA_ M_DATA_ M_DATA_B M_DQ_B_DP0 M_DATA_ M_DATA_ M_DATA_ M_DATA_ M_DQ DP0 M_DATA_ M_DQ_B_DN0 M_DATA_ M_B_E_A M_DATA_ M_DATA_ M_B_E_A0 M_DATA_0 M_DQ DP M_DATA_ M_B_E_A M_B_E_A M_DATA_ M_B_E_A M_B_E_A M_DATA_ M_B_E_A M_DQ_B_DP M_B_E_A M_DQ_B_DP M_B_E_B0 M_DQ DP M_DQ_B_DP M_DATA_ M_DQ_B_DP M_B_E_B M_DATA_ M_DQ_B_DP M_DQ DP M_DATA_ M_B_E_B M_DQ_B_DP M_DATA_A0 M_DATA_ M_DQ DP M_B_E_B M_DQ_B_DP M_DQ DP M_DATA_0 M_B_E_B M_DQ DP M_B_E_B M_DATA_ M_B_E_B M_DATA_A M_DQ_B_DN M_DQ DP M_DATA_ M_B_E_B M_DATA_A M_DATA_B0 M_DATA_A M_DATA_A M_DATA_A M_DATA_ M_DQ_B_DN M_DATA_A M_DATA_A M_DATA_ M_DQ_B_DN M_DATA_ M_DATA_A0 M_DATA_A M_DATA_A M_DATA_A M_DQ_B_DN M_DATA_A M_DATA_B M_DATA_A M_DATA_A M_DATA_A M_DATA_B M_DATA_A M_DATA_A M_DATA_ M_DATA_A M_DATA_B M_DATA_A M_DATA_ M_DQ_B_DN M_DATA_ M_DATA_B M_DATA_A M_DQ_B_DN M_DATA_A0 M_DATA_B M_DQ DN0 M_DQ_B_DN M_DATA_B M_DATA_A M_DATA_A M_DATA_A M_DATA_ M_DATA_B M_DATA_A M_DATA_A M_DATA_0 M_DATA_B M_DATA_A M_DATA_B M_DATA_A M_DATA_A M_DATA_ M_DATA_A0 M_DATA_B0 M_DATA_A M_DATA_ M_DATA_A M_DATA_B M_DATA_A M_DATA_B M_DATA_ M_DATA_A M_DATA_B M_DATA_A M_DATA_B M_DATA_A M_DATA_A M_DATA_B M_DATA_A M_DATA_B M_DATA_A M_DATA_B M_DATA_A M_DATA_B M_DATA_A0 M_DATA_ M_DATA_A M_DATA_B M_DATA_ M_DATA_A M_DATA_A M_DATA_A M_DATA_B M_DATA_ M_DATA_A M_DATA_B0 M_DATA_A M_DATA_ M_DATA_B M_DATA_A heet of LGA Part A DDR /

64 chematic Diagrams B - LGA Part B DDR / B.chematic Diagrams LGA Part B DDR / heet of LGA Part B DDR / M_B_ M_B_A M_B_A M_KE_A M_WE_A_N M_B_ mils Trace width 00mils max trace length DIMM no using DIMM no using M_RA_A_N K_M_H0 DN M_RA N M_WE N M_A N M_A_A_N hannela M N M N0 M_KE_A0 hannelb Z00 M_MAA_A[:0] Z0 M_KE_ K_M_H DP Z0 Z0 Z0 hannel Z0 M A_N0 M A_N Z0 Z0 Z0 Z0 Z0 Z00 M A_N Z0 Z0 Z0 Z0 Z0 Z0 K_M_H DN K_M_H DP K_M_H_0_DP K_M_H DP K_M_H_0_DN K_M_H DP K_M_H DN K_M_H DN Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z00 Z0 M A_N Z0 Z0 Z0 Z00 Z0 Z0 Z0 Z0 DDR0_DRAMRT M_ODT_A0 Z0 Z0 Z0 Z00 Z00 Z00 Z00 Z00 Z00 M_B_A[:0] Z0 Z00 Z0 Z0 Z00 Z0 Z0 Z0 Z0 Z0 Z0 Z00 M_ODT_A Z00 M_KE_0 DDR_OMP0 K_M_H0 DN K_M_H0 DP K_M_H0 DN K_M_H0 DP M_KE_A[:0] DDR0_DRAMRT M_A_A_N M_RA_A_N M_WE_A_N M A_N M A_N0 M_ODT_A[:0] K_M_H0_0_DP DDR_DRAMRT M_MAA_B M_MAA_B M_ODT_B M_MAA_B M_ODT_B0 M_ODT_ M_ODT_0 M_RA_B_N M_MAA_B M_MAA_B M_MAA_B0 M_MAA_B M_MAA_B M_A_B_N M_MAA_B M_MAA_B M_WE_B_N M_MAA_B M_MAA_B M_MAA_B M_MAA_B M_B_B M_MAA_B0 K_M_H_0_DP M_B_B M_B_B0 K_M_H_0_DN M_KE_B0 DDR_OMP0 M B_N0 K_M_H DP M_MAA_A0 K_M_H DN M B_N K_M_H DN K_M_H DP K_M_H DN K_M_H DP M_MAA_0 M_MAA_B DDR_OMP M_KE_B DDR_OMP R._%_0 OF J_PUD Molex D--00 DDR_MA_0 J DDR_MA_ J DDR_MA_ J DDR_MA_ L DDR_MA_ K DDR_MA_ F DDR_MA_ J DDR_MA_ D DDR_MA_ E DDR_MA_ G DDR_MA_0 H DDR_MA_ E DDR_MA_ E DDR_MA_ B DDR_MA_ H DDR_MA_ F DDR_BA_0 DDR_BA_ K DDR_BA_ H DDR_RA* G DDR_A* E DDR_WE* G DDR 0* D DDR * A DDR * E DDR * E DDR * DDR * E0 DDR /ODT_* DDR /ODT_* E DDR_LK_P0 DDR_LK_P G DDR_LK_P K DDR_LK_P H DDR_LK_N0 D DDR_LK_N G0 DDR_LK_N L DDR_LK_N H DDR_KE_0 H DDR_KE_ E DDR_KE_ D DDR_KE G G _H H _E E _F F DDR_ODT_0 D DDR_ODT_ DDR_ODT_ D DDR_ODT_ F DDR_MA_PAR D0 DDR_PAR_ERR_0* DDR_PAR_ERR_* E DDR_PAR_ERR_* F DDR_OMP_ Y DDR_REET* D _F F DDR0_MA_0 A0 DDR0_MA_ B DDR0_MA_ DDR0_MA_ D DDR0_MA_ B DDR0_MA_ B DDR0_MA_ DDR0_MA_ A DDR0_MA_ B DDR0_MA_ DDR0_MA_0 B DDR0_MA_ A DDR0_MA_ B DDR0_MA_ A0 DDR0_MA_ A DDR0_MA_ B DDR0_BA_0 B DDR0_BA_ A DDR0_BA_ DDR0_RA* A DDR0_A* DDR0_WE* B DDR0 0* G DDR0 * B0 DDR0 * DDR0 * B DDR0 * B DDR0 * A DDR0 /ODT_* DDR0 /ODT_* B DDR0_LK_P0 J DDR0_LK_P D DDR0_LK_P F DDR0_LK_P E0 DDR0_LK_N0 K DDR0_LK_N DDR0_LK_N E DDR0_LK_N E DDR0_KE_0 DDR0_KE_ A0 DDR0_KE_ B0 DDR0_KE_ B _A A _D D DDR0_ODT_0 F DDR0_ODT_ DDR0_ODT_ B DDR0_ODT_ DDR0_MA_PAR B0 DDR0_PAR_ERR_0* D DDR0_PAR_ERR_* B DDR0_PAR_ERR_* A _B* B DDR_OMP_0 AA DDR0_REET* D DDR_OMP K_M_H0 DP M_MAA_ DDR_OMP OF J_PUE Molex D--00 DDR_MA_ G DDR_MA_ H DDR_MA_ F DDR_MA_ G DDR_MA_ H DDR_MA_0 H DDR_MA_ H DDR_MA_ L DDR_MA_ J DDR_MA_ K DDR_MA_ K DDR_MA_ F0 DDR_MA_ J0 DDR_MA_ G DDR_MA_ K DDR_MA_0 A DDR_BA_ L DDR_BA_ F DDR_BA_0 A DDR_RA* D DDR_A* F DDR_WE* DDR 0* G DDR * K DDR * D DDR * H DDR * E DDR * D DDR /ODT_* L DDR /ODT_* J DDR_LK_P0 J DDR_LK_N0 J DDR_LK_P L0 DDR_LK_N K0 DDR_LK_P H DDR_LK_N G DDR_LK_P L DDR_LK_N L DDR_KE_0 J DDR_KE_ G DDR_KE_ D DDR_KE_ L _K K _D0 D0 _K K _J J DDR_ODT_ D0 DDR_ODT_ D DDR_ODT_ F DDR_ODT_0 L DDR_MA_PAR B DDR_PAR_ERR_0* F DDR_PAR_ERR_* J DDR_PAR_ERR_* F _K* K DDR_OMP_ A DDR_REET* E DIMM no using K_M_H DP R 0_%_0 K_M_H DN K_M_H DP K_M_H DN K_M_H0 DP R 00_%_0 M_KE_A[:0] M_B_A[:0] M_MAA_A[:0] K_M_H0_0_DN K_M_H0_0_DP M_ODT_A[:0] M_MAA_ M_RA_A_N K_M_H0 DN K_M_H0 DP M A_N M_WE_A_N M_A_A_N M_KE_B[:0] DDR0_DRAMRT M A_N0 M_MAA_B[:0] K_M_H_0_DN K_M_H_0_DP M_ODT_B[:0] M_B_B[:0] K_M_H DN K_M_H DP K_M_H DP K_M_H DN DIMM no using M_WE_B_N M_A_B_N M_RA_B_N M_MAA_ K_M_H DN M B_N M B_N0 DDR_DRAMRT K_M_H_0_DP M_ODT_[:0] M_KE_[:0] M_B_[:0] K_M_H DP K_M_H_0_DN M_MAA_[:0] DDR_DRAMRT M_RA N K_M_H DN M N0 M_WE N M_A N M N M_MAA_ M_MAA_ M_MAA_A M_MAA_ M_MAA_A DDR_DRAMRT M_MAA_ M_MAA_B[:0] M_MAA_A DDR_DRAMRT M_MAA_A M_B_B[:0] M_KE_B[:0] M_MAA_ M_RA_B_N M_WE_B_N M_MAA_A M B_N M B_N0 M_A_B_N M_ODT_B[:0] K_M_H_0_DP M_MAA_A K_M_H_0_DN M_MAA_ K_M_H0_0_DN K_M_H DN K_M_H DP M_MAA_A M_MAA_A M_MAA_0 M_MAA_A M_MAA_ M_MAA_A0 M_MAA_A M_MAA_ M_MAA_A M_MAA_A M_MAA_ M_MAA_A M_MAA_ M_MAA_A M_MAA_ M N DIMM no using M N M_B_A0 DIMM no using M B_N M B_N M_MAA_[:0] M_B_[:0] DDR_DRAMRT K_M_H0 DP K_M_H0 DN M_KE_[:0] M_WE N M N0 M_A N M_RA N M N M_ODT_[:0] K_M_H_0_DP K_M_H DP K_M_H_0_DN K_M_H DN M_B_0 K_M_H0_0_DP K_M_H0_0_DN K_M_H0 DN K_M_H0 DP K_M_H0 DN

65 chematic Diagrams LGA Part QPI B - B.chematic Diagrams LGA Part QPI I0_LKRX_DP I0_LKTX_DN I0_LKTX_DP I0_LKRX_DN I0_DRX_DN VTT_PWRGD TO POWER I0_DRX_DN I0_DRX_DP[:0] I0_DRX_DN I0_DRX_DN I0_DRX_DN I0_DRX_DN Z0 Z000 I0_DRX_DN THERMTRIP# I0_DTX_DP I0_DRX_DN H_MBP_N H_PI# I0_DRX_DN0 I0_DTX_DP PEI H_PURT# PU_TAPGOOD I0_DRX_DN I0_DTX_DP H_PRDY_N HWRT# H_TK H_TDI H_TDO H_TRT_N H_TM RB_PU_GTLREF VTT_PWRGD I0_DRX_DN I0_DTX_DP _ENE _ENE I0_DRX_DN H_MBP_N I0_DTX_DP Z0 I0_DRX_DN K_M_PU_DP K_M_PU_DN PUVTT_VID PUVTT_VID PUVTT_VID I0_DTX_DP H_MBP_N I0_DRX_DN K_H_BLK_ITP_DN K_H_BLK_ITP_DP I0_DTX_DP PLT_MNR_EXTT_N I0_DRX_DN PLT_MNR_EXTT_N0 IMON PU_VTT_FB- PU_VTT_FB _ENE _ENE PUVTT_VID PUVTT_VID VDDPWRGOOD PUVTT_VID VTT_PWRGD H_PWRGD H_PI# I0_DTX_DP H_MBP_N I0_DRX_DN I0_DTX_DP I0_DRX_DN I0_DTX_DP0 H_MBP_N I0_DRX_DN I0_DTX_DP H_MBP_N I0_DTX_DP I0_DTX_DP PU_DDR_VREF H_MBP_N I0_DTX_DP I0_DTX_DP THERMTRIP# I0_DTX_DP I0_DTX_DP VDDPWRGOOD I0_DRX_DP H_VID OMP0 I0_DTX_DP H_VID I0_DRX_DP H_VID H_PRDY_N H_VID I0_DRX_DP H_PWRGD H_VID I0_DRX_DP I0_DTX_DN H_VID KTO# I0_DTX_DP[:0] I0_DRX_DN[:0] I0_DTX_DN[:0] H_VID I0_DRX_DP H_MBP_N0 H_TDO OMP0 PU_TAPGOOD I0_DTX_DN I0_DTX_DP I0_DRX_DP H_TDI H_TRT_N H_TK H_TM H_VID0 H_PROHOT# H_ATERR_N I0_DTX_DN I0_DRX_DP I0_DTX_DN I0_DRX_DP H_VID[:0] I0_DTX_DN I0_DRX_DP H_PREQ_N I0_DTX_DN I0_DRX_DP0 I0_DTX_DN HWRT# PU_VTT_FB- PU_VTT_FB Z0 I0_DRX_DP KTO# I0_DTX_DN I0_DRX_DP IMON I0_DRX_DP I0_DTX_DN I0_DRX_DP0 I0_LKRX_DN I0_LKRX_DP I0_DRX_DN0 I0_LKTX_DN I0_LKTX_DP I0_DRX_DP I0_DTX_DN0 QPI BU External onnection I0_DRX_DP I0_DTX_DN R._%_0 R *K_%_0 *0.u_0V_XR_0 R0 _%_0 0.u_0V_XR_0 0.0u_0V_XR_0 R._%_0 R K_%_0 0 0.u_0V_XR_0 Q N0 B E R0 _%_0 R 0K_0 Backup,Bloomf ield processor is designed with an internal VREF I0_DRX_DP 0.u_0V_XR_0 I0_DTX_DN R0 _%_0 OF J_PUG Molex D--00 QPI_DRX_DN AR QPI_DRX_DN AP QPI_DRX_DN AP0 QPI_DRX_DN AM QPI_DRX_DN AM0 QPI_DRX_DN AM QPI_DRX_DN AN QPI_DRX_DN AR0 QPI_DRX_DN AR QPI_DRX_DN0 AT QPI_DRX_DN AU QPI_DRX_DN AV0 QPI_DRX_DN AT QPI_DRX_DN AY QPI_DRX_DN AW QPI_DRX_DN BA QPI_DRX_DN AY QPI_DRX_DN AV QPI_DRX_DN AV QPI_DRX_DN0 AU QPI_DRX_DP AP QPI_DRX_DP AN QPI_DRX_DP AP QPI_DRX_DP AM QPI_DRX_DP AN0 QPI_DRX_DP AN QPI_DRX_DP AP QPI_DRX_DP AT0 QPI_DRX_DP AT QPI_DRX_DP0 AU QPI_DRX_DP AU0 QPI_DRX_DP AW0 QPI_DRX_DP AU QPI_DRX_DP BA QPI_DRX_DP AW QPI_DRX_DP BA QPI_DRX_DP AW QPI_DRX_DP AV QPI_DRX_DP AU QPI_DRX_DP0 AT QPI_LKRX_DP AR QPI_LKRX_DN AR QPI_LKTX_DP AG QPI_LKTX_DN AF QPI_DTX_DN AF0 QPI_DTX_DN AE QPI_DTX_DN AB QPI_DTX_DN A QPI_DTX_DN A0 QPI_DTX_DN AD QPI_DTX_DN AB QPI_DTX_DN A QPI_DTX_DN AE QPI_DTX_DN0 AE QPI_DTX_DN AG QPI_DTX_DN AH QPI_DTX_DN AJ QPI_DTX_DN AH QPI_DTX_DN AK QPI_DTX_DN AJ0 QPI_DTX_DN AJ QPI_DTX_DN AK QPI_DTX_DN AG QPI_DTX_DN0 AH QPI_DTX_DP AE0 QPI_DTX_DP AD QPI_DTX_DP AB QPI_DTX_DP A QPI_DTX_DP A QPI_DTX_DP AD0 QPI_DTX_DP A QPI_DTX_DP AD QPI_DTX_DP AE QPI_DTX_DP0 AF QPI_DTX_DP AG0 QPI_DTX_DP AJ QPI_DTX_DP AK QPI_DTX_DP AH QPI_DTX_DP AK0 QPI_DTX_DP AH0 QPI_DTX_DP AJ QPI_DTX_DP AK QPI_DTX_DP AF QPI_DTX_DP0 AG QPI_MP0 AL H_PROHOT# H_ATERR_N H_PURT# Bloomfield now requires board level termination f or JTAG signals. THERMTRIP# PEI OF J_PUH Molex D--00 AM AL AM AM AN AN AM AN AP AP AM AM AN AM AP AN AR AR AT AR AT AT AU AU AW AW AU AU AY AY AW AY BA AV AW AU AV AT AR AF A AD AD AE AD AD AB A A AD AE AE A AB AD AD AE AD AF AF AH AG AH AH AK AJ AJ AJ AG AG AJ AK AK AK AH AJ AJ AJ AG AH AE AL BA BA AV R 0K_0 R0 0_%_0 I0_DTX_DN I0_DRX_DP R0 _%_0 R _%_0 K_M_PU_DN K_M_PU_DP OF J_PUF Molex D--00 AF AG BLK_DN AH BLK_DP AJ BLK_ITP_DN AA BLK_ITP_DP AA OMP0 AB AT_ERR* A PROHOT* AG KTO* AG REET* AL THERMTRIP* AG PEI AH AK DBR* AF0 BPM_0* B BPM_* A BPM_* BPM_* B BPM_* D BPM_* BPM_* D BPM_* E PRDY* B PREQ* TK AH0 TDI AJ TDO AJ0 TM AG0 TRT* AH AH BA AY AW AY0 BA0 AV AW AY AV AV AV AW AY AU RVD A0 RVD AL RVD AL RVD AL0 RVD AL RVD K RVD AK RVD L RVD K DDR_VREF L RVD AJ RVD AT RVD AT _AK AK IENE AK VTTD_ENE AE _ENE_VTTD AE _ENE AR V _ENE AR U TT_VID_ AV TT_VID_ AF TT_VID_ AV VTTPWRGOOD AB VDDPWRGOOD AA WRGOOD AR AF DDR_THERM* AB PI* AP VID_0/MID_0 AL0 VID_/MID_ AL VID_/MID_ AN VID_/_0 AM0 VID_/_ AN0 VID_/_ AP VID AP VID AN AG AG AK AL AL AM AM AN AN AR AR AT AY AY AW AV R0 K_0 0 0u_.V_0_H Q N0 B E R0 K_0 R0 _%_0 R._%_0 R *K_%_0 RB_PU_GTLREF I0_DTX_DN R K_%_0 R *K_0 I0_DRX_DP *0.u_0V_XR_0 R0 _%_0 R._%_0 R *0K_0 VDDPWRGOOD R._%_0.V.V PU_VTT PU_VTT I0_DTX_DP[:0] 0 PU_VTT V I0_DRX_DN[:0] 0 I0_DRX_DP[:0] 0 I0_DTX_DN[:0] 0 I0_LKTX_DN 0 I0_LKTX_DP 0 I0_LKRX_DN 0 I0_LKRX_DP 0 IMON K_M_PU_DP K_M_PU_DN PU_VTT_FB- PU_VTT_FB H_PI# PUVTT_VID PUVTT_VID PUVTT_VID I0_DTX_DN _ENE H_PROHOT#, H_VID[:0] HWRT# H_PURT# H_PWRGD, _ENE THERMTRIP# PEI, I0_DRX_DP H_PURT# PWRGD_P,,,, PU_VTT,,,.V,..,,,, V,,,,.. I0_DTX_DN I0_DTX_DN I0_DTX_DN0 I0_DTX_DP0 PU_DDR_VREF I0_DTX_DN H_PROHOT# I0_DRX_DN I0_DTX_DN heet of LGA Part QPI

66 chematic Diagrams B - LGA Part D Power B.chematic Diagrams LGA Part D Power 0 0.u_0V_XR_0 0.u_0V_XR_ u_0V_XR_0 0u_0V_Y V_0 0u_0V_YV_0 0 0u_0V_YV_0 0u_0V_YV_0 0u_0V_YV_0 0 0.u_0V_XR_0 0 0.u_0V_XR_0 0u_0V_YV_0 0 0.u_0V_XR_0 0 OF J_PUJ Molex D--00 VDDQ A VDDQ A VDDQ B VDDQ B VDDQ B VDDQ B VDDQ B VDDQ B VDDQ 0 VDDQ VDDQ 0 VDDQ VDDQ 0 VDDQ D VDDQ D VDDQ D VDDQ D VDDQ E VDDQ E VDDQ E VDDQ E VDDQ E VDDQ F VDDQ F VDDQ F VDDQ G VDDQ G VDDQ G VDDQ H VDDQ H0 VDDQ H VDDQ J VDDQ J VDDQ J VDDQ K VDDQ K VDDQ K VDDQ L VDDQ L VDDQ L VDDQ M VDDQ M VDDQ A VDDQ A VDDQ A R R M M M M M M M M M N N T T W AH AH AK AK AK AK AK AK AK AK AK AK AK AK AK0 AK AK AL AL AL AL AL AL AL AL AL AL AL AL0 AL AL AL AM AM AM AM AM AM AM AM AM AM AM AM0 AM AM AM AN AN AN AN AN AN AN AN AN AN AN AN0 AN AN AN AP AP AP AP AP AP AP AP AP AP AP AP0 AP AP AP AR0 AR AR AR AR AR AR AJ AJ 0 0.u_0V_XR_0 OF J_PUI Molex D--00 AR AR AR AR AR AR0 AR AR AR AT AT0 AT AT AT AT AT AT AT AT AT AT AT AT0 AT AT AU AU0 AU AU AU AU AU AU AU AU AU AU AU AU0 AU AU AU AV AV0 AV AV AV AV AV AV AV AV AV AV AV AV0 AV AV AV AW AW0 AW AW AW AW AW AW AW AW AW AW AW0 AW AW AW AY AY0 AY LL V LL U LL W AY AY AY AY AY AY AY AY AY AY AY 0 AY AY AY BA BA0 BA BA BA BA BA BA BA BA BA BA BA0 M VTTA AG VTTA AF VTTA AF VTTA AF VTTA AE VTTA AE VTTA AE0 VTTA AD0 VTTD AF VTTD AF VTTD AF VTTD AE VTTD AA0 VTTD AA VTTD AA VTTD AB VTTD AB VTTD AB0 VTTD AB VTTD AB VTTD AB VTTD A0 VTTD A VTTD A VTTD A VTTD A VTTD AD VTTD AD VTTD AE VTTD AE VTTD AF AW VTTD AD VTTD AD VTTD AE AT 0u_0V_YV_0 0u_0V_Y V_0 0 0.u_0V_XR_0 + 0u_V_V_B 0u_0V_Y V_0 0u_0V_YV_0 0.u_0V_XR_0 0u_0V_YV_0 0.u_0V_XR_0 0u_0V_Y V_ u_V_V_B 0u_0V_Y V_0 0.u_0V_XR_0 + 0u_V_V_B 0 0.u_0V_XR_ u_V_V_B 0.u_0V_XR_ u_V_V_B 0.u_0V_XR_0 0u_0V_YV_0 0u_0V_YV_0 0u_0V_YV_0 0.u_0V_XR_0 0u_0V_Y V_0 + 0u_V_V_B 0.u_0V_XR_0 0.u_0V_XR_0 0 0.u_0V_XR_0 0 0.u_0V_XR_0 0.u_0V_XR_0 0u_0V_YV_0 0u_0V_YV_0 0.u_0V_XR_0 0.u_0V_XR_0 0u_0V_YV_0 0u_0V_YV_0 0u_0V_YV_0 0u_0V_YV_0 0.u_0V_XR_0 0 0u_0V_Y V_0 0 0u_0V_Y V_0 0u_0V_YV_0 0u_0V_YV_0 0.u_0V_XR_0 0 0.u_0V_XR_0 0.u_0V_XR_0 0u_0V_YV_0 0u_0V_Y V_0 0.u_0V_XR_0 0.u_0V_XR_0 0u_0V_YV_ u_V_V_B 0.u_0V_XR_0 VORE VORE VORE.V VORE.V VORE PU_VTT PU_VTT PU_VTT PU_VTT.V.V VORE PU_VTT,,, VORE.V,0.V,..,,,, AD NOTE: PLAE ALL 00 AP INIDE PU OKET AVITY heet of LGA Part D Power

67 chematic Diagrams LGA Part E, Thermal B - B.chematic Diagrams LGA Part E, Thermal *0.u_0V_XR_0 OF J_PUK Molex D--00 B B B A A A A A E E D D D D D 0 E E F F F F F G G G G G G H H0 H0 H BA BA BA BA BA0 BA BA BA BA BA AY AY AY AY AY AY AY AY0 AY AY AY AY AY AW AW AW AW AW AW AW0 AW AW AW AW AW AW AV AV AV AV AV AV AV AV0 AV AV AV AV AU AU AU AU AU AU AU AU AU0 AU AU AU AU AU AT AT AT AT AT AT AT AT AT0 AT AT AT AT AT AR AR AR AR AR AR AR AR0 AR AR AR AR AR AP AP AP AP AP AP AP AP AP AP0 AP AP AP AP0 AP AP AP AN AN AN AN AN AN AN AN0 AN AN AN AN *000p_0V_XR_0 R 0K_0 OF J_PUL Molex D--00 AN AN AM AM AM AM AM AM AM AM AM0 AM AM AM AM AM AL AL AL AL AL AL AL AL AL AL AL AL AL AL AL AK AK AK AK AK AK AK AK AK0 AK AK AK0 AK AK AJ AJ AJ AJ AH AH AH AH AH AG AG AG AG AG AF AF AF AF AE AE AE AD AD AD A A A A AB A AL0 AB0 AB AB AB AA AA AA AA AA Y Y Y Y Y Y W W W W V0 V V0 V U U U U T T T T R R R R P P P P P P N0 N N0 N M M M M0 M M M M M0 M M M M M M L L L L L K K K K K K J J J J J AD AD J H0 R *0_0 R *00K_0 U *EM0 VDD D+ D- THERM ALERT DATA LK V MD_VGA_THERM, V H_THERMD H_THERMDA V,,..,0,,,..0,,,.. M_VGA_THERM, Place near to the PU Layout Note: lose to Thermal I Route H_THERMDA and H_THERMD on same layer. 0 mil trace on 0 mil spacing. Layout Note: ADM0 000p FM 00p Z00 MD_VGA_THERM M_VGA_THERM Thermal I 0MIL H_THERMD H_THERMDA YTHERM_ALERT# 0.u_0V_XR_0 0.u_0V_XR_0 U GTU OUT V THERM_VOLT H_THERMD H_THERMDA Analog Thermal ensor For Auburndale/Arrundale/larksfield Analog Thermal ensor : (mils:mils) D0 Place near to X(U) heet of LGA Part E, Thermal

68 chematic Diagrams B - DDR hannel A O-DIMM_0 B.chematic Diagrams DDR hannel A O-DIMM_0 M_DATA_A[:0] M_MAA_A M_DATA_A0 M_DATA_A0 K_M_H0_0_DP DIMM_A_VREF_A M_A_A_N M_DATA_A M A_N0 M_DATA_A0 M_DATA_A M_DATA_A hannela M_DQ_A_DP M_MAA_A M_DATA_A M_DATA_A PM_EXTT_DDR# M_DATA_A M_DATA_A M_DATA_A M_DATA_A PM_EXTT_DDR# DDR0_DRAMRT M_DQ_A_DP M_DATA_A M:. / /. L: / / M_DATA_A M_MAA_A M_DQ_A_DP K_M_H0_0_DN M_DATA_A mils trace mils spacing M_DATA_A0 M_DATA_A M_RA_A_N Layout Note: M_DQ_A_DP[:0] M_DQ_A_DP M_DATA_A M_B_A M_DATA_A M_DATA_A0 M_MAA_A0 M_DQ_A_DN M_DATA_A M_DATA_A LK0/space/LK_.u_.V_XR_0 J_DIMMB DDR_ODIMM0_0P VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD0 00 VDD 0 VDD 0 VDDPD N N NTET VREF_DQ G G VTT 0 VTT 0 VREF_A REET# 0 EVENT# VDD VDD VDD VDD VDD VDD M_B_E_A[:0] 0u_0V_YV_0 0u_0V_YV_0 0.u_0V_XR_0 0.u_0V_XR_0 0 u_.v_yv_0 R0 K_%_0.u_V_XR_0 R0 0K_0 0.u_0V_XR_0 0.u_0V_XR_0 0u_0V_YV_0 0u_0V_YV_0 R K_%_0 O-DIMM0 0.u_0V_XR_0 + 00u_.V_B_A 0 0.0u_V_XR_0 0u_0V_YV_0 0 0.u_0V_XR_0 N N_0 M_DQ_A_DN M_DATA_A M_MAA_A J_DIMMA DDR_ODIMM0_0P A0 A A A A A A 0 A A A A0/AP 0 A A/B# A A 0 A DQ0 DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ0 DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ0 0 DQ DQ 0 DQ DQ DQ DQ DQ DQ DQ DQ0 DQ 0 DQ DQ DQ DQ DQ 0 DQ DQ 0 DQ DQ0 DQ DQ DQ DQ DQ DQ DQ 0 DQ DQ DQ0 DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ0 0 DQ DQ DQ BA0 0 BA 0 RA# 0 WE# A# 0# # KE0 KE K0 0 K0# 0 K 0 K# 0 DA 00 L 0 A 0 A0 DM0 DM DM DM DM DM DM 0 DM DQ0 DQ DQ DQ DQ DQ DQ DQ DQ0# 0 DQ# DQ# DQ# DQ# DQ# DQ# DQ# ODT0 ODT 0 BA *0u_0V_YV_0.u_.V_XR_0 R 0K_0 0.u_0V_XR_0 0.u_0V_XR_0 VDDPDA.V.V VDDPDA 0.V V.V,,,,,,,.V 0.V M_MAA_A[:0] M_DATA_A[:0] V,,,,..,0..,,,0, M_ODT_A[:0] M_DQ_A_DN[:0] M_DQ_A_DP[:0] K_M_H0_0_DP M_KE_A[:0] M_B_A[:0] K_M_H0 DP K_M_H0 DN K_M_H0_0_DN M_DATA_A M A_N0 M_WE_A_N M_A_A_N M_RA_A_N LK,,,,,0,,, DDR0_DRAMRT M A_N LK 0.V,, PM_EXTT_DDR#, DATA,,,,,0,,, M_DQ_A_DP M_DATA_A M_B_A M_WE_A_N M A_N M_MAA_A M_DATA_A M_DATA_A Low Low High High Low Low A A0 H HB HA DIM0 M_DATA_A M_DQ_A_DN M_MAA_A M_DATA_A M_DATA_A M_DQ_A_DP M_DATA_A M_MAA_A 0mils trace M_MAA_A[:0] M_DATA_A M_B_A0 M_DQ_A_DN hannela M_DATA_A M_MAA_A M_KE_A[:0] M_DATA_A M A_N0 M_DQ_A_DP M A_N M_DATA_A M_MAA_A M_DATA_A M_KE_A0 M_DATA_A Z00 M_DATA_A M_KE_A M_DQ_A_DN K_M_H0 DP K_M_H0 DN M_MAA_A M_DATA_A Z00 M_A_A_N M_RA_A_N M_DQ_A_DP M_DATA_A M_WE_A_N A0_DIM0 M_MAA_A A_DIM0 M_B_A[:0] M_DATA_A LK M_DATA_A DATA M_DATA_A M_ODT_A0 M_DATA_A M_ODT_A M_MAA_A M_DQ_A_DN M_DATA_A M_DATA_A M_DATA_A0 DATA M_DATA_A From power 0.V M_DATA_A M_DATA_A DDR0_DRAMRT M_DATA_A M_DQ_A_DP0 M_DATA_A M_MAA_A M_DQ_A_DN M_DQ_A_DN[:0] K_M_H0_0_DP M_DATA_A K_M_H0_0_DN M_DATA_A K_M_H0 DP K_M_H0 DN M_DATA_A0 M_DATA_A M_DATA_A M_DQ_A_DN0 M_DATA_A M_MAA_A0 M_MAA_A M_DQ_A_DN M_ODT_A[:0] M_DATA_A LOE TO O-DIMM_0 M_DATA_A DIMM_A_VREF_A M_DATA_A M_DATA_A M_DATA_A M_DATA_A heet of DDR hannel A O-DIMM_0

69 chematic Diagrams DDR hannel B O-DIMM_ hannelb O-DIMM Layout Note: LK0/space/LK_ M:. / /. L: / / DIM0 A0 A HA Low Low HB Low High H High Low M_DQ_A_DP M_DQ_A_DN R 0K_0 V R 0K_0 M_MAA_B0 M_MAA_B M_MAA_B M_MAA_B M_MAA_B M_MAA_B M_MAA_B M_MAA_B M_MAA_B M_MAA_B M_MAA_B0 M_MAA_B M_MAA_B M_MAA_B M_MAA_B M_MAA_B M_B_B0 M_B_B M_B_B M B_N0 M B_N K_M_H_0_DP K_M_H_0_DN K_M_H DP K_M_H DN M_KE_B0 M_KE_B M_A_B_N M_RA_B_N M_WE_B_N A0_DIM A_DIM LK DATA M_ODT_B0 M_ODT_B M_DQ_B_DP0 M_DQ_B_DP M_DQ_B_DP M_DQ_B_DP M_DQ_B_DP M_DQ_B_DP M_DQ_B_DP M_DQ_B_DP M_DQ_B_DN0 M_DQ_B_DN M_DQ_B_DN M_DQ_B_DN M_DQ_B_DN M_DQ_B_DN M_DQ_B_DN M_DQ_B_DN J_DIMMA A0 A A A A 0 A A A A 0 A A0/AP A A/B# 0 A A A 0 0 BA0 BA BA 0# 0 # 0 K0 0 K0# 0 K K# KE0 KE 0 A# RA# WE# 0 A0 0 A 00 L DA 0 ODT0 ODT DM0 DM DM DM DM 0 DM DM DM DQ0 DQ DQ DQ DQ DQ DQ DQ 0 DQ0# DQ# DQ# DQ# DQ# DQ# DQ# DQ# DQ0 DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ0 DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ0 DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ0 DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ0 DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ0 DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ0 DQ DQ DQ DDR_ODIMM_0P M_D ATA_B0 M_D ATA_B M_D ATA_B M_D ATA_B M_D ATA_B M_D ATA_B M_D ATA_B M_D ATA_B M_D ATA_B M_D ATA_B M_D ATA_B0 M_D ATA_B M_D ATA_B M_D ATA_B M_D ATA_B M_D ATA_B M_D ATA_B M_D ATA_B M_D ATA_B M_D ATA_B M_D ATA_B0 M_D ATA_B M_DATA_B M_DATA_B M_DATA_B M_DATA_B M_DATA_B M_DATA_B M_DATA_B M_DATA_B M_DATA_B0 M_DATA_B M_DATA_B M_DATA_B M_DATA_B M_DATA_B M_DATA_B M_DATA_B M_DATA_B M_DATA_B M_DATA_B0 M_DATA_B M_DATA_B M_DATA_B M_DATA_B M_DATA_B M_DATA_B M_DATA_B M_DATA_B M_DATA_B M_DATA_B0 M_DATA_B M_DATA_B M_DATA_B M_DATA_B M_DATA_B M_DATA_B M_DATA_B M_DATA_B M_DATA_B M_DATA_B0 M_DATA_B M_DATA_B M_DATA_B V VDDPDB N N_0.u_.V_XR_0 0mils trace VDDPDB 0.u_0V_XR_0.V Z00 Z00 Z00 PM_EXTT_DDR# DDR_DRAMRT DIMM_A_VREF_B J_DIMMB VDD VDD VDD VDD VDD 0 VDD VDD VDD 00 VDD 0 VDD0 0 VDD VDD VDD VDD VDD 0 VDD VDD VDD VDDPD N N NTET 0 0 EVENT# REET# VREF_DQ VREF_A VTT VTT G G DDR_ODIMM_0P Layout note: O-DIMM_ is placed farther from the PU than O-DIMM_ V hannelb M_DATA_B[:0] M_DATA_B[:0] M_B_E_B[:0] M_DQ_B_DP[:0] M_DQ_B_DP[:0] M_DQ_B_DN[:0] M_DQ_B_DN[:0] M_MAA_B[:0] M_MAA_B[:0] M_B_B[:0] M_B_B[:0] M_KE_B[:0] M_KE_B[:0] M_ODT_B[:0] M_ODT_B[:0] K_M_H_0_DP K_M_H_0_DN K_M_H_0_DP K_M_H_0_DN K_M_H DP K_M_H DN K_M_H DP K_M_H DN M_RA_B_N M_A_B_N M_RA_B_N M_WE_B_N M_A_B_N M_WE_B_N M B_N0 M B_N M B_N0 M B_N DDR_DRAMRT PM_EXTT_DDR# DDR_DRAMRT PM_EXTT_DDR#, LK DATA LK,,,,,0,,, DATA,,,,,0,,, heet of DDR hannel B O-DIMM_ B.chematic Diagrams.V R K_%_0 mils trace mils spacing DIMM_A_VREF_B From power 0.V 0.V R K_%_0 0.u_0V_XR_0.u_.V_XR_0 0.u_0V_XR_0.u_.V_XR_0 0.u_0V_XR_0 LOE TO O-DIMM_.V u_.V_B_A 0u_0V_YV_0 0u_0V_YV_0 0u_0V_YV_0 0.u_0V_XR_0 0.u_0V_XR_0 u_.v_yv_0 0u_0V_YV_0 0u_0V_YV_0 *0u_0V_YV_0 0.u_0V_XR_0 0.u_0V_XR_0 0.0u_V_XR_0 DDR hannel B O-DIMM_ B -

70 chematic Diagrams B - 0 DDR hannel O-DIMM_ B.chematic Diagrams DDR hannel O-DIMM_ M_MAA_ M_DATA_ M_DATA_ M_MAA_ M_DATA_[:0] K_M_H_0_DP M_DATA_ M_A N M_DATA_ M N0 hannel PM_EXTT_DDR# DDR_DRAMRT PM_EXTT_DDR# M:. / /. L: / / M_DQ_A_DP M_DQ_A_DN K_M_H_0_DN M_DATA_ M_DATA_ mils trace mils spacing M_DATA_ M_MAA_ M_RA N Layout Note: M_DATA_ M_DQ DP[:0] LK0/space/LK_ O-DIMM LK M N M_WE N 0mils trace M_B_0 M_MAA_[:0] hannel M_KE_[:0] M N M N0 M_DATA_0 M_KE_0 High High Low Low Low Low Z00 DIM0 A A0 H HB HA Z00 M_KE_ Z00 K_M_H DN K_M_H DP M_WE N M_RA N M_A N A0_DIM LK M_B_[:0] A_DIM M_ODT_0 DATA M_DATA_ M_ODT_ M_DATA_0 M_DATA_ DATA M_DATA_ From power 0.V M_DQ DN DDR_DRAMRT M_DQ DP0 M_DQ DN[:0] M_MAA_ K_M_H_0_DN K_M_H_0_DP K_M_H DN K_M_H DP M_MAA_0 M_DQ DN0 M_ODT_[:0] LOE TO O-DIMM_ DIMM_A_VREF_ M_DATA_ M_DATA_0 M_MAA_ M_DQ DN M_DATA_0 M_DATA_ M_DATA_ M_DATA_ M_DATA_ M_B_ M_DQ DP M_DATA_0 M_DATA_ M_DATA_0 M_DATA_ M_DATA_ M_DATA_ M_MAA_ M_DQ DN M_DATA_ M_DATA_ M_DATA_ M_DATA_0 M_DATA_ M_B_ M_DQ DP M_DATA_ M_DATA_ M_MAA_ M_DQ DN M_DQ DN M_DATA_ M_DATA_ M_DATA_ M_DQ DP M_DATA_ M_DQ DP M_DATA_ M_DATA_ M_MAA_ M_MAA_0 M_DQ DN M_DATA_ M_DATA_ M_DATA_ Layout note: O-DIMM_ is placed farther from the PU than O-DIMM_ M_DATA_ M_DATA_ M_DATA_ M_MAA_ M_DQ DP M_DATA_ M_DATA_ M_DATA_ M_MAA_ M_DQ DN M_DATA_ M_DATA_ M_MAA_ M_DATA_ M_DQ DP M_DATA_ M_DATA_ M_DATA_ M_MAA_ M_DATA_ M_DATA_ M_DATA_ M_DATA_ M_DATA_ M_DATA_ M_DQ DP M_DATA_ M_DATA_ M_DATA_ M_MAA_ M_DATA_ M_MAA_ DIMM_A_VREF_ 0.u_0V_XR_0 0.u_.V_XR_0 0.u_0V_XR_0 0.u_0V_XR_0 R K_%_0.u_.V_XR_0 0.u_0V_XR_0 0.0u_V_XR_0 0.u_0V_XR_0 0.u_0V_XR_0 J_DIMMB DDR_ODIMM_0P VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD0 00 VDD 0 VDD 0 VDDPD N N NTET VREF_DQ G G VTT 0 VTT 0 VREF_A REET# 0 EVENT# VDD VDD VDD VDD VDD VDD R 0K_0 R 0K_0 + 00u_.V_B_A R *0K_0 u_.v_yv_0 0.u_0V_XR_0 R *0K_0 0u_0V_YV_0 0u_0V_YV_0 0u_0V_YV_0 0.u_.V_XR_0 R K_%_0 J_DIMMA DDR_ODIMM_0P A0 A A A A A A 0 A A A A0/AP 0 A A/B# A A 0 A DQ0 DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ0 DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ0 0 DQ DQ 0 DQ DQ DQ DQ DQ DQ DQ DQ0 DQ 0 DQ DQ DQ DQ DQ 0 DQ DQ 0 DQ DQ0 DQ DQ DQ DQ DQ DQ DQ 0 DQ DQ DQ0 DQ DQ DQ DQ DQ DQ DQ DQ DQ DQ0 0 DQ DQ DQ BA0 0 BA 0 RA# 0 WE# A# 0# # KE0 KE K0 0 K0# 0 K 0 K# 0 DA 00 L 0 A 0 A0 DM0 DM DM DM DM DM DM 0 DM DQ0 DQ DQ DQ DQ DQ DQ DQ DQ0# 0 DQ# DQ# DQ# DQ# DQ# DQ# DQ# ODT0 ODT 0 BA 0.u_0V_XR_0 N N_0.V.V.V 0.V 0.V VDDPD V M_A N M_DATA_[:0] V VDDPD M_RA N K_M_H_0_DN M N0 LK,,,,,0,,, M_MAA_[:0] M_DQ DP[:0] K_M_H_0_DP M N M_WE N K_M_H DP K_M_H DN DATA,,,,,0,,, M_KE_[:0] DDR_DRAMRT M_B_[:0] PM_EXTT_DDR#,.V,,,,,,, M_ODT_[:0] M_DQ DN[:0] 0.V,, V,,,,..,0..,,,0, M_B_E_[:0] heet of DDR hannel O-DIMM_

71 chematic Diagrams X QPI Interface B - B.chematic Diagrams X QPI Interface Z00 Z00 Z00 IH_GP IH_GP Default UB# 0.0 GT/s Note:hecklist IBL_EL : 00 Ohm res to IBL_EL UB# 0 D0 BN upated I0_DTX_DN I0_DTX_DN I0_DTX_DN I_FREQ_0 I0_DRX_DN I0_DTX_DN I0_DTX_DN I0_DTX_DP I0_DTX_DN VRM_EN_TBG I0_LKRX_DN I0_DRX_DN[:0] I0_LKTX_DN I0_LKTX_DP I0_DRX_D P[:0] Z00 I0_DTX_DP I0_DTX_DP I0_DTX_DP I0_DTX_DP I0_DTX_DP I0_DTX_DP0 I0_DRX_DN I0_LKRX_DP I0_DRX_DN0 I0_DRX_DN I0_DRX_DN I0_DRX_DN I0_DRX_DN I0_DRX_DN I0_DRX_DN0 I0_DRX_DN I0_DRX_DN I0_DRX_DN I0_DRX_DN I0_DTX_DP I0_DRX_DN I0_DRX_DN I0_DRX_DN I0_DRX_DN I0_DRX_DN I0_DTX_DP I0_DRX_DN I0_DRX_DP0 I0_DRX_DN I0_DRX_DP I0_DRX_DP I0_DRX_DP I0_DTX_DP I0_DRX_DP I0_DRX_DP I0_DTX_DP I0_DRX_DP I0_DRX_DP I0_DTX_DP I0_DRX_DP I0_DRX_DP I0_DRX_DP I0_DTX_DP I0_DRX_DP I0_DRX_DP I0_DRX_DP0 I0_DTX_DP I0_DRX_DP I0_DRX_DP I0_DTX_DP I0_DRX_DP I0_DRX_DP K_M_IOH_DN I0_DTX_DP I0_DRX_DP I0_DRX_DP K_M_IOH_DP I_FREQ_0 I0_DTX_DP0 I_FREQ_ I0_DTX_DN[:0] QPI BU External onnection I0_ROMP I0_LKRX_DN I0_DTX_DP K_M_IOH_DN I0_LKRX_DP I0_DTX_DP I0_LKTX_DN I0_DTX_D P[:0] I0_DTX_DP I0_DTX_DN I0_DTX_DN I0_DTX_DN0 I0_DTX_DN I0_DTX_DN I0_DTX_DN I0_DTX_DN I0_DTX_DN I0_DTX_DN I0_LKTX_DP I0_DTX_DN IBL_EL I0_DTX_DN I0_DTX_DN0 I0_DTX_DN I0_DTX_DN K_M_IOH_DP VRM_EN_TBG I_FREQ_ GP.0 GT/s.0 GT/s GP QPI Frequency Mode IH_GP R0 K_0 0u_.V_0_H R0.K_%_0 u_.v_yv_0 R0 K_0 *0.u_0V_XR_0 R.K_%_0 R 00_0 0u_.V_0_H :I PLL UE ON DIE VR 0:internal L HB00KF-T0_0 u_.v_yv_0 R K_0 L HB00KF-T0_0 R *K_0 OF REV=. U- TYLERBURG QPI0TNLK_0 A QPI0TPLK_0 AB QPI0TNDAT_0 AG QPI0TNDAT_ AG QPI0TNDAT_ AJ QPI0TNDAT_ AG QPI0TNDAT_ AJ QPI0TNDAT_ AH QPI0TNDAT_ AF QPI0TNDAT_ AF QPI0TNDAT_ AE QPI0TNDAT_ AD QPI0TNDAT_0 AA QPI0TNDAT_ Y QPI0TNDAT_ W QPI0TNDAT_ Y QPI0TNDAT_ W QPI0TNDAT_ W QPI0TNDAT_ W QPI0TNDAT_ W QPI0TNDAT_ Y QPI0TNDAT_ AA QPI0TPDAT_0 AF QPI0TPDAT_ AH QPI0TPDAT_ AH QPI0TPDAT_ AF QPI0TPDAT_ AH QPI0TPDAT_ AG QPI0TPDAT_ AE QPI0TPDAT_ AE QPI0TPDAT_ AD QPI0TPDAT_ A QPI0TPDAT_0 AB QPI0TPDAT_ W QPI0TPDAT_ V QPI0TPDAT_ AA QPI0TPDAT_ Y QPI0TPDAT_ V QPI0TPDAT_ V QPI0TPDAT_ Y QPI0TPDAT_ AA QPI0TPDAT_ AB QPI0REFLKN A QPI0REFLKP AB AQPI0PLL_ AD QPIFREQEL0 AG QPIFREQEL AA0 VRMEN Y QPIBLEL AJ QPI0IOMP Y QPI0ROMP AA TETLO AA AF AD A AE AE AD QPI0RNLK_0 L QPI0RPLK_0 K QPI0RNDAT_0 K QPI0RNDAT_ J QPI0RNDAT_ H QPI0RNDAT_ G QPI0RNDAT_ J QPI0RNDAT_ G QPI0RNDAT_ G QPI0RNDAT_ H QPI0RNDAT_ J QPI0RNDAT_ K QPI0RNDAT_0 N QPI0RNDAT_ L QPI0RNDAT_ N QPI0RNDAT_ T QPI0RNDAT_ P QPI0RNDAT_ R QPI0RNDAT_ T QPI0RNDAT_ P QPI0RNDAT_ R QPI0RNDAT_ P QPI0RPDAT_0 L QPI0RPDAT_ K QPI0RPDAT_ J QPI0RPDAT_ H QPI0RPDAT_ K QPI0RPDAT_ F QPI0RPDAT_ F QPI0RPDAT_ G QPI0RPDAT_ H QPI0RPDAT_ J QPI0RPDAT_0 M QPI0RPDAT_ M QPI0RPDAT_ P QPI0RPDAT_ R QPI0RPDAT_ R QPI0RPDAT_ T QPI0RPDAT_ U QPI0RPDAT_ N QPI0RPDAT_ T QPI0RPDAT_ R AQPI0RXBG_ D AQPI0TXBG_ U QPI0VRMVREF0_ L0 QPI0VRMVREF_ M QPI0VRMVREF_ T QPI0VRMVREF_ U QPI0VRMVREF_ AB0 L K A AB AA AB N M M L R 0K_0 Q N0 B E L HB00KF-T0_0 0.u_0V_XR_0 *0.u_0V_XR_0 R 00_0 R 0 0K_0 REV=. OF U- TYLERBURG A A D D F E D A B D A B 0 B A B D E H G F E F E D A B D A B0 B A B D F H G F E G G J J AQPI0PLL_ E0 G H0 J G H J0 E AQPI0_ E B B H G F E D D A B A A B A 0 D E E0 G F0 AQPI0_ H AQPI0_ G AQPI0_ F AQPI0_ E AQPI0_ D AQPI0_ D AQPI0_ A AQPI0_ B AQPI0_ AQPI0_ A AQPI0_ A AQPI0_ AQPI0_ B0 AQPI0_ A AQPI0_ AQPI0_ D AQPI0_ E AQPI0_ E AQPI0_ G AQPI0_ F AQPI0RXBG_ A0 AQPI0RXBG_ B QPI0VRMVREF0_ J QPI0VRMVREF_ H QPI0VRMVREF_ B QPI0VRMVREF_ QPI0VRMVREF_ K H H G G H J R *00_0 R *00K_0 R _%_0 L *HB00KF-T0 u_.v_yv_0 L HB0KF-T_0 Q N0 B E V_P_IBG_RX V_P_IBG_PN V_P_IBG_TX V_P_IPLL V_P_IBG_TX.V.V A_.V V_P_IBG_RX Form IH0 A_.V V_P_IPLL V_P_IBG_PN.V V_P_I V_P_IBG_PN I0_DRX_DN[:0] V_P_I V_P_I A_.V I0_DTX_DP[:0] I0_DTX_DN[:0] I0_DRX_DP[:0] I0_LKTX_DN I0_LKRX_DP I0_LKRX_DN K_M_IOH_DP K_M_IOH_DN I0_LKTX_DP.V..,,,0, UB#,,, IH_GP IH_GP IH_GP IH_GP UB#,,, A_.V,, Z00 0mA 0mA Two GPIO of IH0 ontorl The QPI FREQ IH_GP heet 0 of X QPI Interface

72 chematic Diagrams B - X PIEX, PIEX, DMI B.chematic Diagrams X PIEX, PIEX, DMI P N N N P N N P P PEG_RXP N P P P N P N PEG_TXN PEG_TXN PEG_TXN0 DMI_RXP PEG_RXP PEG_RXN PEG_TXN PEG_TXN PEG_RXP PEG_TXN DMI_RXN DMI_RXP0 EXP RX_DN[:0] PEG_TXN EXP RX_DP[:0] PEG_RXP PEG_TXN DMI_RXP EXP RX_DP0 PEG_TXN EXP TX_DP EXP TX_DN0 EXP TX_DN EXP TX_DP EXP TX_DP0 PEG_RXN EXP TX_DN PEG_RX_UB# EXP RX_DP PEG_RX_UB EXP RX_DP EXP RX_DN0 PIEX D00F none using now DMI K_PE_00M_IOH0_DN PEG_TXN[:0] PEG_RXN[:0] PEG_TXP[:0] K_PE_00M_IOH0_DP PIEX_ PEG_RXP[:0] DMI_RXN0 PEG_TXN / DMI_RXN K_PE_00M_IOH_DP K_PE_00M_IOH_DN DMI_RXP PEG_RXN PEG_RXP DMITXP DMITXN DMITXP DMITXP DMITXP0 DMITXN0 DMITXN DMITXN PEG_RXN PEG_TXN PIEX_ DMI_RXN PEG_RXN0 PEG_RXP PEG_RXP PEG_RXN PEG_TXN DMI_TXN PEG_RXP PEG_RXN P 0.u_0V_XR_0 0.u_0V_XR_0 Z Z Z Z PEG_TXN0 Z0 ma ma Z0 Z0 Z0 Z0 Z0 Z0 PEG_TX_UB PEG_TX_UB# Z0 PEG_RX_UB PEG_RX_UB# PEG_RXN PEG_RXP0 PEG_TXP RX DMI_TXN N TX DMI_TXN0 DMI_TXP[:0] DMI_RXN[:0] DMI_RXP[:0] DMI_TXN[:0] PEG_TXP DMI_TXN PEG_TXP N P PEG_TXP PEG_RXN PEG_TXP N P PEG_TXP0 PEG_TXP DMI_TXP P N PEG_TXP PEG_TXP[..0] PEG_TXN[..0] PEG_TXN[..0] PEG_RXN PE0_OMP PEG_TXP[..0] PEG_TXP K_PE_00M_IOH0_DP K_PE_00M_IOH0_DN PE0_RBIA PEG_TXP PEG_TXP PEG_TXP0 PEG_TXP PE_OMP PEG_RXN PEG_RXN PEG_RXN PEG_RXN PE_RBIA PEG_RXP PEG_RXP PEG_RXP PEG_RXP PEG_RXN0 PEG_RXN PEG_TXN PEG_RXP PEG_RXP0 PEG_RXN PEG_RXN PEG_RXP PEG_RXP PEG_RXN PEG_RXN PEG_RXN PEG_RXN PEG_RXP PEG_RXP PEG_RXP PEG_RXP PEG_RXN PEG_RXN PEG_RXN0 PEG_RXP PEG_RXN PEG_RXP PEG_RXP0 PEG_RXP PEG_TXP K_PE_00M_IOH_DP K_PE_00M_IOH_DN PEG_TXP PEG_TXN PEG_TXN PEG_TXN PEG_TXP PEG_TXP PEG_TXN PEG_TXN0 PEG_TXN PEG_TXP PEG_TXP PEG_TXP0 PEG_TXP PEG_TXN PEG_TXN PEG_TXN PEG_TXN PEG_TXP PEG_TXN PEG_TXP PEG_TXP PEG_TXP PEG_TXN PEG_TXN PEG_TXP PEG_TXN0 PEG_TXN PEG_RXP PEG_TXP PEG_RXN N P N N P N P P PEG_RXP[..0] PEG_RXN[..0] PEG_RXN[..0] PEG_RXP[..0] PEG_TXP DMI_TXP ma ma PEG_TXP PEG_TXP PEG_RXP0 EXP TX_DN[:0] PEG_RXN DMI_TXP PEG_TXP0 PEG_RXN PEG_RXP PEG_RXP PEG_RXN EXP TX_DP[:0] PEG_RXP PEG_RXP 0.u_0V_XR_0 0 0.u_0V_XR_0 0u_.V_0_H 0.u_0V_XR_0 L HB00KF-T0_0 0u_.V_0_H R 0_%_0 u_.v_yv_0 L HB00KF-T0_0 0 0.u_0V_XR_0 0.u_0V_XR_0 PEG_RXN R 00_%_0 0.u_0V_XR_0 0u_.V_0_H 0.u_0V_XR_0 0u_.V_0_H L *HB00KF-T0_0 u_.v_yv_0 R *K_0 u_.v_yv_0 OF REV=. U- TYLERBURG PERN_0 AJ PERN_ AJ PERP_0 AK PERP_ AJ PERN_0 AL PERN_ AM PERP_0 AK PERP_ AM PETN_0 AP PETN_ AR PETP_0 AN PETP_ AR PETN_0 AP PETN_ AR PETP_0 AP PETP_ AT DMIRN_0 AL DMIRN_ AL0 DMIRN_ AK DMIRN_ AJ DMIRP_0 AL DMIRP_ AK0 DMIRP_ AJ DMIRP_ AK DMITN_0 AR DMITN_ AN0 DMITN_ AR0 DMITN_ AN DMITP_0 AP DMITP_ AN DMITP_ AR DMITP_ AM PEBLEL AK AG AG AT AT AF0 AE0 AF AD0 AH AG0 AM0 AM AH AG AG AH R0 00_0 u_.v_yv_0 R 00_%_0 PEG_TXP OF REV=. U- TYLERBURG PERN_0 AH PERN_ AJ PERN_ AL PERN_ AK PERP_0 AH PERP_ AK PERP_ AL PERP_ AK PERN_0 AM PERN_ AJ PERN_ AL PERN_ AH PERP_0 AL PERP_ AJ PERP_ AL PERP_ AJ PERN_0 AL PERN_ AK0 PERN_ AL PERN_ AK PERP_0 AK PERP_ AK PERP_ AL PERP_ AJ PE0RN_0 AK PE0RN_ AL PE0RN_ AK PE0RN_ AH0 PE0RP_0 AL PE0RP_ AM PE0RP_ AJ PE0RP_ AJ0 PELKN AG PELKP AF PEROMPO AP PEIOMPI AN PEIOMPO AN PERBIA AN PETN_0 AR PETN_ AN PETN_ AP PETN_ AP PETP_0 AP PETP_ AP PETP_ AN PETP_ AR PETN_0 AN PETN_ AR PETN_ AR PETN_ AT PETP_0 AN PETP_ AR PETP_ AP PETP_ AT PETN_0 AN PETN_ AT PETN_ AR0 PETN_ AN0 PETP_0 AN PETP_ AT PETP_ AR PETP_ AP0 PE0TN_0 AT PE0TN_ AR PE0TN_ AP PE0TN_ AN PE0TP_0 AT PE0TP_ AP PE0TP_ AR PE0TP_ AP DPEPLL AT APEPLL AT0 APEBG AT PEG_RXP REV=. OF U- TY LERBURG PERN_0 AJ PERN_ AL PERN_ AL PERN_ AK PERP_0 AK PERP_ AL PERP_ AK PERP_ AL PERN_0 AJ PERN_ AM PERN_ AL PERN_ AJ PERP_0 AJ PERP_ AM PERP_ AL PERP_ AK PERN_0 AK0 PERN_ AK PERN_ AM PERN_ AL PERP_0 AL0 PERP_ AJ PERP_ AM PERP_ AL PERN_0 AK PERN_ AL PERN_ AJ PERN_ AJ PERP_0 AL PERP_ AK PERP_ AK PERP_ AJ PE0LKN AN0 PE0LKP AN PE0ROMPO AM PE0IOMP AP PE0IOMPO AL PE0RBIA AN PETN_0 AN PETN_ AR PETN_ AP PETN_ AT PETP_0 AN PETP_ AP PETP_ AN PETP_ AT PETN_0 AR PETN_ AR PETN_ AP PETN_ AT PETP_0 AR PETP_ AT PETP_ AP PETP_ AT PETN_0 AR PETN_ AT0 PETN_ AP PETN_ AP PETP_0 AP PETP_ AR0 PETP_ AR PETP_ AP PETN_0 AN PETN_ AT PETN_ AR PETN_ AM PETP_0 AN PETP_ AT PETP_ AP PETP_ AM DPEPLL AP APEPLL AN APEBG AN L *HB00KF-T0_0 0 0.u_0V_XR_0 R 0_%_0 V_P_PEBG0 V_P_PEPLLA V_P_PEBG V_P_PEPLLA V_P_PEPLLD V_P_PEPLLD V_P_PEBG0 V_P_PEPLLA V_P_PEPLLD V_P_PEBG.V.V.V.V PEG_TXP[:0] PEG_TXN[:0] A_.V PEG_RXP[:0] PEG_RXN[:0] K_PE_00M_IOH0_DP K_PE_00M_IOH0_DN DMI_TXP[:0] DMI_TXN[:0] DMI_RXN[:0].V,,,,,0,.V 0,,,,,0, DMI_RXP[:0] K_PE_00M_IOH_DN K_PE_00M_IOH_DP A_.V 0,, PEG_RXN0 DMI_TXP0 PEG_TXN PEG_TXN PEG_TXN heet of X PIEX, PIEX, DMI

73 chematic Diagrams X MI B - B.chematic Diagrams X MI heet of X MI R0 0K_0 Q N0 B E RN 0K_PR_0 R *0mil_NP_0 R K_0 R 0K_0 R K_0 R K_0 R *K_0 R *0K_0 R 00_0 R *K_0 R 0K_%_0 R K_0 R K_0 R *0_0 R _%_0 R0 *0_0 R 0K_%_0 R0 K_0 R0 *K_0 R0 *K_0 R K_0 REV=. OF U- TYLERBURG _D F _D G _D J0 _D F _D H _D H _D E _D J _D G _D F _D G0 _D H _D J _D J _D J _D M _D P _D N _D P _D M _D N _D M0 _D P DDRPLLREFLKN G DDRPLLREFLKP G _D L _D M _D L _D K ADDRPLL N _D K _D K _D F _D F _D H _D M _D K0 _D J _D K _D K _D F0 _D M _D M _D N _D N0 _D E _D E L L L L H H RN K_PR_0 H_PWRGD_IOH H_THERMDA H_THERMD OF REV=. U- TYLERBURG A0M* A FERR* AL INIT* AE0 INTR AB NMI AD MI* AG LTREET* AE L_LK U L_DATA T LRT* U VREFL T PLLPWRDET AUXPWRGOOD OREPLLPWRDET A OREPWRGOOD D ORERT* D REETO* AL TETLO AF TETLO AJ TETHI R B TETLO W TETLO AE TETLO V TETLO0 AF TETLO Y TETLO A TETLO AF TETLO AB0 TETHI U TETLO T _D U _D T ERR_N_0 AD ERR_N_ AF ERR_N_ AE TETLO AH AG TETLO AH PEHPL AB PEHPDA AD0 MBL AB MBDA AD MBUID AE TI REF AJ TETLO AR TETLO AN TETLO AN TETLO AM AM AM TDA AM TD AK THERMALERT* AD THERMTRIP* A TET_0 A TET_ A TET_ B TET_ AT TET_ AT XDPLKXP AH XDPLKXN AG XDPDQ_0 W XDPDQ_ W XDPDQ_ V XDPDQ_ V XDPDQ_ Y XDPDQ_ V XDPDQ_ W XDPDQ_ U XDPDQ_ AD XDPDQ_ AB XDPDQ_0 AA XDPDQ_ AA XDPDQ_ AE XDPDQ_ A XDPDQ_ AB XDPDQ_ AB XDPDQN_0 Y XDPDQP_0 AA XDPDQN_ A XDPDQP_ AD XDPRDYAK* Y XDPRDY REQ* W EXTYTRIG AK TK T TDI V TDO V0 TM U TRT* R0 PEWIDTH_0 R PEWIDTH_ T0 PEWIDTH_ R PEWIDTH_ N PEWIDTH_ T PEWIDTH_ P TETHI P LEGAYIOH R TETLO R TETLO A TETLO AA TETLO AD TETLO AE INGLE_IOH P L_LK_R N TETLO TETLO D W AF RMIILK G RMIILKREFOUT J RMIIRDV A RMIIMD D0 RMIIMDIO D RMIIRXD[0] B RMIIRXD[] E RMIITXD[0] E RMIITXD[] J RMIITXEN G R 00_0 R 00_0 R0 _%_0 R0 K_0 R K_0 R 00_0 0 *0.u_0V_XR_0 R 0K_%_0 R _%_0 Q *N0 B E R.K_%_0 u_0v_xr_0 R K_0 R 0.K_0 RN K_PR_0 Q N0 B E R *K_0 R 00K_0 R K_0 V V.V.V V.V V.V V V.V V H_A0M# V H_INTR H_INIT# H_FERR# IH_YN# H_MI# H_NMI V..,,..,0..,,,0, H_PURT# IOH_LPWROK H_THERMD H_THERMDA V,,..,,,..,,.V 0,,,,,0, DATA..,,,0,,, LK..,,,0,,, IH_VRM_PWRGD GP PLTRT#,,0,, PWRGD_P,,,, H_PWRGD, PLTRT#,,0,, IOH_LPWRDET L_N_LK, L_N_DATA, V,,..,0,,,..0,,,.. PWROKIH,,.. L_RT, 0 D0 BN upated PWRGD_P -0--QF0 PLTRT_DLY# Z Z0 Z0 Z Z PARE_TBG PARE0_TBG PARE_TBG PARE_TBG PARE_TBG NODEID TBG NODEID TBG NODEID TBG PARE_TBG PARE_TBG PARE_TBG L_LK L_DATA LK DATA Z L_VREF_IOH TP_EDM_TBG TP_HVM_MODE_TBG TP_IHIFT_TBG TP_BILK_TBG TP_PLLBYP_TBG IOH_LPWROK PLTRT_DLY # L_RT_N Z Z Z TBG_TETPOINT_ Z0 TBG B IOH_LPWRDET EXT_TBG_AK PLLDET_V PLTRT_DLY# TBG E H_PWRGD_IOH TBG A TBG_ITET TBG_I AFE Z IH_VRM_PWRGD IOH_ITPMEN TP_I HIFT_TBG NODEID TBG IAN_MODE_TBG TP_EDM_TBG NODEID TBG DIPULTO_TBG Z TP_BILK_TBG TP_HVM_MODE_TBG TP_PLLBY P_TBG EXT_TBG_AK IOH_XDP_PREENT_GTL IOH_DFX_ IOH_DFX_ TBG G TBG E IOH_JTAG_TK IOH_DFX_ IOH_JTAG_TDI IOH_JTAG_TDO IOH_JTAG_TM TPEV_ERR TBG IOH_JTAG_TRT_N TBG_TETPOINT_0 NODEID TBG TBG_TETPOINT_ TBG_TETPOINT_ TBG_TETPOINT_ Z IOH_JTAG_TDO IOH_JTAG_TM IOH_JTAG_TK IOH_XDP_PREENT_GTL IOH_JTAG_TDI IOH_JTAG_TRT_N TBG_TETPOINT_ TBG B TBG_TETPOINT_ TBG_TETPOINT_ TBG_TETPOINT_ TBG_TETPOINT_ Z0 PARE0_TBG IOH_LPWRDET TP_TBG_THERMALERT_N PARE_TBG TP_TBG_THERMTRIP_N GP PARE_TBG 0 D0 BN upated PARE_TBG PARE_TBG TBG_BMINIT PARE_TBG PARE_TBG PARE_TBG K_M_L_DN K_M_L_DP Z Z TBG_ITET Z Z Z0 TP_TBG_THERMTRIP_N TBG_BMINIT TBG G TP_TBG_THERMALERT_N L_LK TBG A L_DATA L_RT_N L_VREF_IOH TP_IHIFT_TBG TP_BILK_TBG TP_HVM_MODE_TBG TBG_TETPOINT_ TBG_TETPOINT_0 DEIGN NOTE: X / X (PI-E):0 TBG_TETPOINT_ TBG_TETPOINT_ Z TBG_TETPOINT_ TBG_TETPOINT_ TBG_TETPOINT_ TBG_TETPOINT_ Z TPM Low enable High disable TBG_I AFE IOH_ITPMEN IOH_DFX_ IOH_DFX_ IOH_DFX_ PLLDET_V DEIGN NOTE: DDR frequency selection : IOH_DFX[:] "00" = MHz input, 00MHzcore "0" = 00 MHz input Z0 Z PLLDET_V 0 D0 BN upated TP_TRNGTET R0 *0_0 D0 Z PWROKIH PLLDET_V hange to 0.V Vref Voltage:0.V PARE_TBG 0.u_0V_XR_0 R _%_0 R *0K_0 R *0_0 R 00_0 R K_0 Q *N0 B E U LVGGW R0.K_0 R.K_0 R *0_0 R 0K_%_0 R *0mil_short R K_0 R0 *K_0 R0 *0_0 R.K_0 R0 0_0 R0 _%_0 R0 K_0 R.K_0 R K_0 Q0 N0 B E R K_0 R *0_0 R *.K_0 R _%_0 u_0v_xr_0 R _%_0 H_PWRGD_IOH Z R0 K_0 R 0K_0 u_0v_xr_0 R K_0 R K_%_0 R K_0 R *0_0 R *0mil_short R0 *K_0 R 0K_0 R *K_0 R0 K_0 R0 *K_0 R 00_0 R K_0 R.K_0 R *0_0 R0 0K_%_0 Q N0 B E Z0 Z R0 00K_0 R K_0 R K_0 R *0K_0 R *0mil_NP_0 R K_0 *u_0v_0 R *0_0 R0 K_0 R *0_0 R *0_0 R K_0 R *K_0 R *0K_0

74 chematic Diagrams B - X PWR B.chematic Diagrams X PWR heet of X PWR Z0 0.u_0V_XR_0 0.u_0V_XR_0 / V_P_PLL 00mA 0.u_0V_XR_0 0mA 0mA OF REV=. U- TYLERBURG AA AA AA AB AB AB P P P R R R0 T T U U U0 U V V V V V W W W0 W W Y Y Y Y Y Y AA0 AA AB AB A0 A APE A APE A APE A APE A APE A APE AD APE AD APE AD APE AD APE AD APE AD APE AD APE AD APE AE APE AE APE AE APE AE APE AE APE AE APE AE APE AE APE AF APE AF APE AF APE AF APE AF APE AD0 APE AD APE AD AQPI0 AA AQPI0 AA AQPI0 AA AQPI0 AA AQPI0 N AQPI0 P AQPI0 P AQPI0 R AQPI0 R AQPI0 R AQPI0 T AQPI0 T AQPI0 U AQPI0 U AQPI0 U AQPI0 U AQPI0 U AQPI0 V AQPI0 V AQPI0 W AQPI0 W AQPI0 W AQPI0 W AQPI0 W AQPI0 Y AQPI0 Y AQPI0 K AQPI0 K AQPI0 K AQPI0 L AQPI0 L AQPI0 L AQPI0 L AQPI0 L0 AQPI0 M AQPI0 M AQPI0 M AQPI0 M AQPI0 M AQPI0 M AQPI0 M AQPI0 M AQPI0 M0 AQPI0 N AQPI0 N AQPI0 N AQPI0 N AQPI0 N AQPI0 N AQPI0 N APE AD APE AD APE AD APE AE0 APE AE APE AE APE AE APE AE APE AE APE AF0 APE AF APE AF APE AF *0u_.V_0_H 0 u_.v_xr_0 u_.v_xr_0 0 *u_.v_xr_0 R *K_0 0 0u_.V_0_H 0 0u_.V_0_H u_.v_xr_0 *u_.v_xr_0 0.u_0V_XR_0 0 u_.v_xr_0 u_.v_xr_0 L HB0KF-T_0 0 0u_.V_0_H 0 0u_.V_0_H R *0mil_P_0 0.u_0V_XR_0 L *HB0KF-T_0 REV=. OF U- TYLERBURG MI AB MI AB MI_L K0 MI_L K MI_L M DDR_L_ L DDR_L_ M DDR_L_ M DDR_L_ M DDR_L_ N DDR_L_ N DDR_L_ P DDR_L_ P DDR_L_ P VTTDDR R XDP T XDP U VTTXDP U _L K _L K _L L _L N _L P _L R _L R _L T _L T _L T FHVORE V _L R T AK QPI0VRMRXOP0_ N QPI0VRMRXOP_ M QPI0VRMRXOP_ AD QPI0VRMRXOP_ V QPI0VRMTXOP0_ A0 QPI0VRMRXOP0_ D QPI0VRMRXOP_ F QPI0VRMRXOP_ F0 QPI0VRMRXOP_ QPI0VRMTXOP0_ K0 QPI0VRMRX0_ D QPI0VRMRX_ E QPI0VRMRX_ F QPI0VRMRX_ E QPI0VRMTX_ AE QPI0VRMRX0_ B0 QPI0VRMRX_ QPI0VRMRX_ QPI0VRMRX_ B QPI0VRMTX_ E EVRM AR EVRM AT 0 0u_.V_0_H L *HB00KF-T0_0 0u_.V_0_H 0.u_0V_XR_0 *u_.v_xr_0 L HB0KF-T_0 0.u_0V_XR_0 0 0u_.V_0_H u_.v_xr_0 L HB00KF-T0_0 *u_.v_xr_0 0 u_.v_xr_0 *0u_.V_0_H R *0mil_P_0 *u_.v_xr_0 *0.u_0V_XR_0 0.u_0V_XR_0 0u_.V_0_H L *HB0KF-T_0 *0u_.V_0_H 0u_.V_0_H u_.v_xr_0 0.u_0V_XR_0 R *0_0 0.u_0V_XR_0 0u_.V_0_H 0 0u_.V_0_H *0u_.V_0_H 0u_.V_0_H 0u_.V_0_H 0u_.V_0_H L0 HB00KF-T0_0 L HB00KF-T0_0 0 0u_.V_0_H L0 *HB00KF-T0_0 L HB0KF-T_0 u_.v_xr_0 0u_.V_0_H 0.u_0V_XR_0 0u_.V_0_H L *HB00KF-T0 *0.u_0V_XR_0 0u_.V_0_H 0 u_.v_xr_0.v.v.v.v V_P_IVRMBY P_TX V_P_IVRMBY P_RX V V_P_PLL V_P_PEVRM V_P_L V_0P_L V_P_PLL V_0P_L V_P_IVRM_RX V_P_PEVRM V_P_L V_P_L V_P_L V_P_IVRM_TX V_P_IVRMBYP_RX V_P_IVRMBYP_TX V_P_L.V.V.V.V.V.V.V.V V_P_L V_P_L.V V_0P_L V_P_PLL.V V_P_IVRM_TX V_P_IVRM_RX.V.V V V.V,,,,,0, V..,,..,0..,,,0, A_.V A_.V 0,, V,,..,0,,,..0,,,...V,0.V 0..,,,0, 0mA 0mA Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0 Z0

75 chematic Diagrams X B - B.chematic Diagrams X OF REV=. U- TY LERBUR G A A A A AA AA AA AA AA AA AA AB AB AB AB AB AB AB A A A A A A A AD AD AD AD AE AE AE AE AF AF AF AF AF AF AG AG AG AG AG AG AG AG AG AG AG AH AH AH AH AH AJ AJ0 AJ AJ AJ AK AK AK AK AK AL AL AL0 AL AM AM AM AM AN AN AN AN AP0 AP0 AP AP AP AR AR AR AR AR AT AT AT AT AT AT B B B B B B B D D D D E E E E E E F F F F F G0 G0 G G G G H H H H0 H H Y A REV=. OF U- TY LER BURG AA AA A A AF AH0 AH AH AH AH AH AH AH0 AH AH AH AH AM0 AM AM0 AM AM AM AM AM AM AN AN AP AT AT B D E F _P A _P A _P A0 _P _P D _P D _P E _P F _P G _P J _P J F F H H H0 J J K K K K K L L M N N P0 P P R T0 T U0 U U U V V W0 W0 Y0 Y J V AH _P A _P A _P B _P _P _P D _P F _P G _P G _P H _P J _P J REV=. OF U- TY LERBUR G J J J J J0 J J J J J K K K K K K K K K K L L L L L L L L L L L0 L L L L M0 M M M M M M M M N0 N0 N N N N N N N N N P P P P P P0 P P P P0 P P P P R0 R R R R R R R R R R R R R T T T T T T0 T T T T T T T T U U U U U U U U0 U U U U V V0 V V V V V V0 V V V V V V V W W W W W W W W W W W W Y Y Y Y Y Y Y0 Y Y Y Y0 Y Y Y 0 OF REV=. U-0 TY LERBUR G A0 A A A A AA0 AA AA AA AA AA AB AB AB AB0 AB AB AB AB A A A A A0 A A AD AD AD AE AE AE AE AF AF AF AF AF0 AF AF AG0 AG AG AG AG AG0 AG AG AG AG AG AH AH AH AH AJ0 AJ AJ AJ AJ AJ AK AK AK AK AL AL AL AL AM AM AM AM AM AN AN AN AP AP AP AP AP AR AR AR AR AR AR AT AT AT AT0 AT B B B B B B 0 D0 D0 D D D D E E E E0 E E F F F F F F G G G G H H H H H H Z Z Z Z0 Z0 Z0 Z Z0 Z0 Z0 Z Z0 Z0 Z0 Z Z0 Z Z Z Z Z Z Z0 Z Z Z Z Z Z Z Z Z Z Z Z Z0 Z Z Z Z Z Z Z Z Z Z Z0 Z Z Z Z Z Z0 Z Z Z Z Z Z Z Z Z Z Z0 Z Z Z Z Z Z Z Z0 Z Z Z Z Z0 Z Z Z Z Z Z Z Z Z Z0 Z Z Z Z Z Z Z Z heet of X

76 chematic Diagrams B - IH0 DMI/PIE/UB/ATA B.chematic Diagrams IH0 DMI/PIE/UB/ATA heet of IH0 DMI/PIE/ UB/ATA PM_PWROK PWROKIH (IMP0) POWER OK THERM# Z Z PWRGD_P K_UB_M_IH 0 0.u_0V_XR_0 Z 0.u_0V_XR_0 L_N_VREF_IH VREF=0.V Z Z THERMTRIP# H_NMI H_MI# PEI H_INIT# H_INTR H_A0M# GA0# K_00M_ATA_L UB_P- K_00M_ATA_H PE_RX_HDMI-IN# PE_RX_HDMI-IN UB_P+ L_N_DATA UBRBIA_L PE_TX_HDMI-IN# PE_TX_HDMI-IN TV/ROBON DMI_RXP0 L_N_LK IOH_LPWROK L_N_VREF_IH DMI_TXP[:0] UB_P0+ UB_P0- DMI_TXN B_KBRT# H_FERR# Z LP_IRQ B_KBRT# PH_BT_EN# IH_GP ATALED TH ER M# DMI_TXP PWRGD_P Z0 DMI_RXN UB DMI_TXP0 DMIRXP DMIRXP DMIRXP DMIRXP0 DMIRXN DMIRXN0 DMIRXN DMIRXN DMI_TXN0 HDD L_N_DATA L_N_LK L_RT PEI ODD Z Z HDD ATALED UB_P0+ Z Z UB_P+ UB_P+ UB_P+ UB_P+ UB_P0- UB_P- UB_P- UB_P- DMI_RXP HDD0 UB_P+ UB_P- ATA K_PE_00M_IH_L K_PE_00M_IH_H Z0 DMI_RXN0 ATA_R X# ATA_R X ATA_TX# ATA_TX BUF_PLT_RT# FINGERPRINT K_00M_ATA_H K_00M_ATA_L ATAGP ATAGP PI_LK IH_GP IH_GP PH_BT_EN# D0 DMI_RXP[:0] DMI_RXN[:0] Z0 DMI_TXN[:0] PE_TX_B PE_TX_B# K_UB_M_IH IOH_LPWROK DMI_TXN GA0# DMI R0 *0K_0 R *0_0 R 00_0 0.u_0V_XR_0 R0 _0 R0 *0_0 R 0K_0 U *G0LT RT# R *00K_0 UB_P- UB_P+ R 0K_0 0.u_0V_XR_0 R.K_0 R *_0 DMI_TXP IH0 ATA HOT REV = 0. I OF ULB U IH0R DATAOUT0/GP AH DATAOUT/GP AD0 ATA_LKP AF ATAGP/GP AE0 ATA0GP/GP AK ATARBIA AJ ATARBIAB AK ATALEDB AE TP B A0GATE P A0MB AJ INTR AH NMI AF PEI A PWM0 AJ PWM AJ PWM AK INITB AE LOAD/GP AK LOK/GP AJ GP AJ ERIRQ N TAH0/GP AH L_RT0B G0 TP L_DATA0 H TP E L_VREF0 TP A LPWROK T T TAH/GP AK TAH/GP AH TAH/GP AK ATA0RXN AK ATA0RXP AJ ATA0TXN AK ATA0TXP AJ ATARXN AJ ATARXP AK ATATXN AH ATATXP AF ATARXN AJ ATARXP AK ATATXN AH ATATXP AF ATARXN AJ ATARXP AK ATATXN AF ATATXP AH ATARXN AJ ATARXP AK ATATXN AF0 ATATXP AH ATARXN AJ ATARXP AK ATATXN AF ATATXP AH ATA_LKN AF ATAGP/GP AE ATAGP/GP AE ATAGP AF ATAGP AD IGNNEB A INIT_VB M FERRB AJ RINB L MIB AH TPLKB AJ TH R MTR IPB AD GLAN_OMPO A GLAN_OMPI B L_LK0 G Q N0 B E 0.u_0V_XR_0 00 *0.u_0V_XR_0 0.u_0V_XR_0 R _0 0.u_0V_XR_0 U AHG0GW *p_0v_npo_0 BID IH0 PI-E UB DMI REV = 0. OF I ULB UB IH0R UBPN AD UBPP AD UBPN AE UBP0P AD DMI0RXN W DMITXN AD UBPN V UBPP V DMI_ZOMP AF0 PERN H0 PERP H PETN J PETN G PETP G DMI_IROMP AF DMITXP AD0 DMITXP AB PERP F PERN F0 PETP J PETP L PETN L PERP K PERN K0 PETP N PETN N PERN M0 DMIRXP AE DMIRXN A DMITXP Y DMITXN Y0 DMIRXN AF DMITXN AB0 DMI_LKN U DMI_LKP U UBP0P W UBP0N W UBPN AB UBPP AB UBPN A UBPP A UBPN AB UBPP AB UBPN Y UBPP Y UBPN AA UBPP AA UBPN Y UBPP Y UBPN V UBPP V O0B/GP P OB/GP0 N DMIRXP A UBPP AE UBP0N AD DMI0RXP W DMI0TXN V0 DMI0TXP V DMIRXN AA DMIRXP AA OB/GP P OB/GP R OB/GP N OB/GP N OB/GP0 N OB/GP M OB/GP P OB/GP R O0B/GP T OB/GP P UBRBIAB AG UBRBIA AG LK AG PERP M PETP R PETN R PERP P PERN P0 PETP/GLAN_TXP E PETN/GLAN_TXN E PERP/GLAN_RXP D0 PERN/GLAN_RXN D BID0 R.K_0 0.u_0V_XR_0 0 *0.u_0V_XR_0 0.u_0V_XR_0 RN 0K_PR_0 R _0 0 0.u_0V_XR_0 MXM_PRENT# R *0K_0 R K_0 *0.u_0V_XR_0 R 0K_0 R *.K_%_0 R._%_0 R *0K_0 R K_0 R 0K_0 0.u_0V_XR_0 0.u_0V_XR_0 *p_0v_npo_0 R0 *0mil_NP_0 R _0 R *0K_0 RN 0K_PR_0 RN 0K_PR_0 Q0 N0 B E 0 *0.u_0V_XR_0 R 0K_0 RN 0K_PR_0 Z R.K_0 0.u_0V_XR_0 Z Z R 0K_0 0.u_0V_XR_0 Z0 R._%_0 R *0_0 0.u_0V_XR_0 Z U VF0B E# O WP# I K HOLD# VDD R0 *0K_0 RN 0K_PR_0 D *RBV A R *0_0 R._%_0 Z R _%_0 J_IH_PI PNZ-0-B--0-P R0 0K_0 0 0.u_V_Y V_0 R *0K_0 HOT *p_0v_npo_0 0.u_0V_XR_0 *p_0v_npo_0 0.u_0V_XR_0 R 0K_0 0.u_V_Y V_0 Z ATA_R X R *0_0 ATA_R X# ATA_TX# e-tat R *0_0 R0 0K_0 ATA_TX R K_0 0.u_0V_XR_0.V V V V V Z V V V V.V V V PU_VTT DMI_TXN[:0] DMI_TXP[:0] DMI_RXN[:0] DMI_RXP[:0] K_PE_00M_IH_L K_PE_00M_IH_H ATALED K_00M_ATA_L K_00M_ATA_H ATALED ATABIA DMI_RXN Z L_N_LK, L_N_DATA, L_RT, K_UB_M_IH H_MI# IOH_LPWROK THERMTRIP# B_KBRT# GA0# LP_IRQ 0, H_FERR# H_A0M# H_INIT# H_INTR H_NMI PEI, Z V..,,,..,0..,,,0, PU_VTT,,, K_PE_00M_IH_H K_PE_00M_IH_L PE_RX_B# PI_ PE_RX_B PE_TX_WAN PE_TX_WAN# PE_RX_WAN# PE_RX_WAN PE_TX_JMB 0 PE_TX_JMB# 0 PE_RX_JMB# 0 PE_RX_JMB 0 PE_TX_ROBON Z PE_TX_ROBON# PE_RX_ROBON# PE_RX_ROBON Z0 Z Z0 H_PROHOT#, THERM# PM_PW ROK PWROKIH,,.. BUF_PLT_RT#.., PLTRT#,,0,, Z Z Z MXM_PRENT# ATA_RX# ATA_RX Z ATA_TX0 ATA_TX# ATA_TX# Z0 ATA_RX#0 ATA_TX ATA_RX Z ATA_TX ATA_RX# ATA_RX# ATA_TX#0 ATA_TX ATA_TX# ATA_RX ATA_RX0.V,,,,,0, V,,,,,0,,,..0,,,.. PWRGD_P,,,, PI_MOI PI_MIO PI_ PI_LK ATA_RX# ATA_TX ATA_TX# ATA_RX UB_P- UB_P+ UB_P+ UB_P0- UB_P+ UB_P- UB_P- UB_P0+ UB_P+ UB_P- MXM_PRENT# L To IOH THERMTRIP# B_KBRT# H_NMI LP_IRQ IH_PEI H_FERR# IH_INIT_V DMI_RXP ATA_R X ATA_TX ATA_R X# ATA_TX# Z H_INIT# H_INTR ATA_TX ATA_R X GA0# H_A0M# PE_RX_UB# PE_RX_UB ATA_R X# ATA_TX# ATA_TX0 ATA_R X0 ATA_R X#0 ATA_TX#0 Z0 H_MI# Z0 O#0 Z0 L_DATA0 L_RT_0B L_LK0 DMI_TXN Z Z Z Z Z Z PI_ PI_MOI PI_MIO Z0 O#0 O# O#0 D0 Z0 Z0 IH_GPIO IH_GPIO0 IH_GPIO 0 IH_GPIO0 O# O# O# O# IH_GPIO O# IH_GPIO O# O# DMI_TXP BID BID0 PH_BT_EN# IH_GP LP_IRQ IH_GPIO O#0 O# O# O# O# IH_GPIO IH_GPIO0 O# O# R 0K_0 O#0 PORT0 PORT PORT PORT BT D WLAN DMI_RXN IH_GP ATAGP IH_GP ATAGP ATAGP ATAGP UB_P- UB_P- O# UB_P+ UB_P+ UB_P+ UB_P- UB_P- UB_P+ UB_P- UB_P+ PI_LK PI_ PI_MOI PI_MIO PI_ DMI_RXP ATAGP ATAGP UB_P- UB_P+ IH_GPIO L_RT

77 chematic Diagrams IH0 PI/PI/Other B - B.chematic Diagrams IH0 PI/PI/Other Z YN HWRT# PI_AD BIT_LK DATO Z Z RTB MBLK MBDATA PI_/BE# PI_AD0 PI_GNT# Z PI_AD PI_REQ# PWROKIH VRM_PW RGD Z H_PWRGD PI_AD mil Z Z Z Z Z Z PI_/BE# UB# mil 0mils mil PI_GNT# PI_AD PI_AD lear MO X *.KHz PWRGD_V o-layout HDA_DOUT PI_AD Z UB# Z PI_DEVEL# PI_IRDY# VRM_PWRGD? VR_Ready(VRM_PWRGD)? PI_ERR# PI_TOP# HANGE TO 0K FOR QUALIFIED HIPET PI_PLOK# VRM_PWRGD PI_TRDY# IH_VRM_PWRGD PI_PERR# PI_FRAME# IH_GP PI_REQ#0 PI_PME# PI_REQ# PI_REQ# PI_INT#D PI_INT#B PI_INT#A PI_GNT# PI_INT#H PI_INT# PI_INT#F PI_INT#E PI_INT#G IH_YN# IHPK PI_GNT# IH_GP PI_AD0 B_BLON PWRGD_P_BUF PWRGD_P PI_GNT#0 PI_AD R0 0_0 PI_GNT#0 R 0_0 R 0_0 R 0_0 PI_REQ#0 PI_INT# PI_INT#B PI_INT#A PI_INT#H PI_INT#F PI_INT#D PI_INT#E PI_INT#G U_T# PI_AD0 PI_TRDY# PI_FRAME# PIRT# PI_/BE#0 PI_DEVEL# PI_PLOK# PI_PAR PI_IRDY# PI_TOP# K_P_M_IH PI_ERR# PI_PME# PI_PERR# PI_AD PWR_BTN# LPPME# PI_AD Z0 WI# MI# I# PM_PWROK IH_GP ALERT# Z0 HDA_BIT_LK PI_AD U_T# HDA_DIN IH_GP HDA_DOUT IH_GP HDA_YN HDA_BIT_LK MXM_DIN Z0 PWRGD_P PWRGD_P_BUF Z PI_AD0 PWRGD_P_BUF MBLK IH_GP MLINK0 MLINK IH_GP PI_GNT# PI_GNT# MXM_DATO MXM_Y N MXM_BIT_LK U_T# MXM_A_REET# PI_AD PE_WAKE# IH_WAKE# PI_AD TPM_PP need pull down,disable TPM MXM_A_REET# MXM_BI T_LK MXM_DATO MXM_Y N LP_AD[:0] GPIO HDA_DOUT K_PWRGD K_M_IH HDA_YN I# LPPME# MI# IHPK UB# H_PWRGD HDA_DIN0 IH_GP RMRT# PWROKIH ODD_DETET# HWRT# PE_WAKE# PLTRT# LP_FRAME# HDA_RTB HDA_BIT_LK IH_GP WI# HD Audio LP U# THER M# PWR_BTN# IH_YN# VRM_PWRGD IH_VRM_PWRGD Z U_T# PE_WAKE# IH_WAKE# PI_AD BTPM_PP PI_AD RTX RTX Zo= O? % K_P_M_IH PI_REQ# LPPME# RTRT# INTRUDER# Z Z R 0_0 INTVRMEN R 0_0 R 0_0 R 0_0 PI_AD PI_AD PI Interface LAN_RT# J_RT BH00.G Z0 R.K_0 X.KHz MXM_D IN Q N0 B E R 0K_0 R 0K_0 PI_AD *0.u_0V_XR_0 R 0K_0 R 0K_0 R 0_0 R.K_0 R K_0 R0 0K_0 R0.K_0 MBDATA u_0v_xr_0 R0 0K_0 R K_0 R.K_0 R 0K_0 Z R0 *0_0 R 0K_0 R00 0K_0 R 0K_0 UD LV0PW 0 *U_.V_0 PI_AD R 00K_0 R.K_0 UB LV0PW R 0K_0 R 0K_0 RN0 PRX.K_0 0p_0V_NPO_0 Q MTN00ZH G D Q MTN00ZH G D R *0_0 *u_0v_xr_0 R0.K_0 R *K_0 RN PRX.K_0 Q N0 B E R0 K_0 HDA_DIN0 0.u_0V_XR_0 0 *u_.v_xr_0 0.u_0V_XR_0 Z0 R 0_0 R0 0M_0 PI_AD R *K_0 D ADV A 0.u_0V_XR_0 R 0K_0 *U_.V_0 R *K_0 *0.u_0V_XR_0 R *0K_0 Z RN PRX.K_0 R M_0 U AHGGW RN PRX.K_0 0.u_0V_XR_0 R.K_0 R 0K_0 JOPEN *OPEN_mil R.K_0 R 0K_%_0 R.K_0 R *.K_0 B_MUTE# R0 K_0 IH0 LP AUDIO RT LAN MI PI MB REV = 0. OF I ULB UD IH0R FW H/LFRAMEB L HDA_RTB AJ HDA_DIN AH HDA_DIN AH LP_B B LP_B/GPIO G LP_B A PKR N HDA_DIN AJ HDA_DOUT AJ HDA_YN AK LK M HDA_DIN0 AK RMRTB F INTVRMEN E HDA_BIT_LK AH FWH0/LAD0 K FWH/LAD H FWH/LAD M GP0 AF GP/TPM_PP/JTAGTK LAN00_LP E ULK/GP R PWROK K_PWRGD T FWH/LAD J RTX A RTX B MBLK H MBDATA E MLINK0 A MLINK B PUPWRGD AD LINKALERTB/GP0/JTAGRT F PI_0B E PI_LK G PI_B F RTRTB H0 GP G GP A _TATEB/GP GP K GP0/BMBUYB N LDRQ0B L LAN_RTYN E GLAN_LK F LAN_RTB LAN_RXD0 G LAN_RXD E LAN_TXD0 F LAN_TXD F LAN_TXD G RTRTB A MBALERTB/GP/JTAGTDO PI_MOI PI_MIO B GP/JTAGTDI/QT_BMBUYB A TP_PIB/GP DPRLPVR/GP M GP/MEM_LED A TP_PUB/GP B GP K GP F GP AF GP AH THR MB AK VRMPWRGD MH_Y NB AH PW RBTNB T RIB G U_TATB/LPPD/GP R Y _REETB F PLTRTB WAKEB E0 INTRUDERB G LP_MB F GP DPRTPB AK DPLPB AE TP F0 ATALKREQB/GP L LAN_RXD H LDRQB/GP J DRAMPWROK/GP A0 GP/WOL_EN A GP0/PU_MIING/JTAGTM GP A GP A R K_0 R.K_0 *0.u_0V_XR_0 R0 *0K_0 GP D ADV A R *0_0 R.K_0 R0 *0_0 R.K_0 0 *U_.V_0 R K_0 R *0_0 R0.K_0 UA LV0PW R0.K_0 R 0K_0 R 00K_0 R.K_0 R 0K_0 PI_AD IH0 PI REV = 0. ULB OF I UA IH0R PIRQEB/GP K PIRQFB/GP L /BEB E AD D REQB/GP G REQB/GP F REQB/GP0 G PIRQBB E PIRQB F PIRQAB J GNT0B H ERRB K DEVELB PAR E PERRB F FRAMEB G PLOKB H TRDYB E PMEB R IRDYB J /BEB /BEB G /BE0B F PIRQHB/GP G PIRQGB/GP F PIRQDB A REQ0B K TOPB F0 PIRTB R PILK B AD0 G AD H AD G0 AD F AD J AD G AD D AD AD F AD A AD0 E AD B AD B AD B AD E0 AD E AD A AD AD E AD H AD D AD0 G AD AD AD AD G AD E AD E AD0 0 GNTB/GP A GNTB/GP GNTB/GP F AD H AD.u_.V_XR_0 R.K_0 0.u_0V_XR_0 R 0K_0 0p_0V_NPO_0 U LV0PW 0 R *.K_0 ODD_DETET# Q N0 B E R K_%_0 R K_0 u_.v_y V_0 R K_0 R 0K_0 Q N0 B E RN PRX.K_0 R 0K_0 RN PRX0K_0 0 D0 BN upated u_.v_yv_0 R.K_0 RT V V PI_AD V V V V V V V V V VDD V RT RT V V V V V V V V V V LK..,,,0,,, V V V LP_FRAME# 0, DATA..,,,0,,, MI IH_GP 0 IH_GP 0 LPPME# HDA_RTB, K_M_IH RMRT# Z0 W I# MI# I# LP_AD[:0] 0, PLTRT#,,0,, IHPK K_P_M_IH HWRT# U_T# 0 H_PWRGD, PI_AD HW trap U# THERM# K_PWRGD,0 IH_VRM_PWRGD VRM_PWRGD RMRT# PWR_BTN# IH_YN# PE_WAKE#,0, UB# 0,,, B_BLON ODD_DETET# PWROKIH,,.. MXM_A_REET# MXM_DATO MXM_YN IH_UB# V..,,,,..,0..,,,0, V,,,,,0,,,..0,,,.. MXM_BIT_LK VDD,..,,.. LAN00_LP PWRGD_V PWROKIH,,.. PM_PWROK.V_PWRGD PI_MIO PWRGD_P,,,, GP PI_MOI PI_LK PI_ PWRGD_P_BUF IH_PU_TP IH_PI_TP ODD_DETET# B_BLON PKR H L B_BLON HDA_RTB HD Audio For MXM MXM_DIN NO Reboot NOT NO reboot PI_AD 0 D0 BN upated IH_VRM_PWRGD PIE_RT# Z PI_AD PI_GNT#0 B_MUTE# LP ROM PI ROM L H if not use PULL LOW LAN_RT# PI_AD Z D0 PI_REQ# PLTRT# IH_PI_TP IH_PU_TP PI_MIO PI_MOI PI_LK PI_ LP_AD0 Z0 LP_AD LP_AD LP_FRAME# LP_AD PW ROKIH INTVRMEN RMRT# IHPK INTRUDER# Z0 HWRT# IH_WAKE# PLTRT# GP IH_GP HDA_DIN0 RTB BIT_LK IH_PI_TP MI# IH_GP I# IH_GP W I# PI_AD IH_GP K_PWRGD IH_UB# U# LAN_RT# Z0 K_M_IH Y N DATO MLINK RTRT# RTX RTX ALERT# MBDATA MBLK IH_GP MLINK0 GP HDA_Y N TH ERM# BTPM_PP LAN00_LP IH_GP Z0 PI_/BE# IH_PU_TP IH_VRM_PWRGD IH_YN# PW R_BTN# RI# H_PWRGD PI_AD PI_AD IH_VRM_PWRGD PI_REQ# PWRGD_V PE_WAKE# RI# heet of IH0 PI/PI/ Other

78 chematic Diagrams B - IH0 Power/ B.chematic Diagrams IH0 Power/ _00 IH0 _0 REV = 0. OF ULB I UF IH0R _00 AA _00 AA _ R _ R _ P _ P _ P _ P _ P _ P _ P _ P _ P _ P _ N0 _00 H _00 A _00 A0 _00 AA0 _00 AA _00 AA _00 AB _00 AB _00 AB _0 A _0 A _0 A _0 A _0 A0 _0 A _0 A _0 A _0 AD _00 AD _0 AD _0 AD _0 AD _0 AD _0 AD _0 AD _0 AD _0 AE _0 AE0 _00 AE _0 AE _0 AE _0 AE _0 AE _0 AE _0 AE _0 AE _0 AE _0 AE _00 AE _0 AE _0 AF _0 AF _0 AF0 _0 AF _0 AF _0 AF _0 AF _00 AG _0 AH _0 AH _0 AH _0 AH _0 AH0 _0 AH _0 AH _0 AJ _0 AJ _00 AJ _0 AJ0 _0 AJ _0 AJ _0 AJ _0 AJ _0 AK _0 AK _0 AK _0 AK _00 AK _0 AK0 _0 AK _0 B _0 B _0 B _0 B _0 B _0 B _0 B _00 B _0 B _0 B _0 D _0 E _0 E _0 E _0 E _0 E _0 E0 _00 F _0 F _0 F _0 F _0 F _0 F _0 G _0 G _0 G _0 G0 _ B _ AF _ AK _ AJ _ AH _0 H _0 H _0 H _0 H _ W _ W _ U _ W _ W _ V _0 V _ V _ V _ V _ V _ V _ V _ V _ U _ U _ T _ T _ T _ T _0 T _ T _ T _ T _ T _ T _ T _ R _ R0 _ R _0 R _ R _ R _ R _ P _0 P _0 H _ R _ W _ Y _ Y _0 J _0 J _ V _ U _0 U _ U _ U _0 Y _ Y _ W _ W _ W0 _0 H _0 H _0 AF _0 J0 _ K _ K _ L _ L _ L _ L0 _ M _ M _ M _0 M _ M _ M _ N _0 N _ N _ N _ N _ N _ N _ N 00 0.u_0V_XR_0 V_P_IH V RT V RT V V V.V V V V V.V.V V.V.V IH_.V.V.V IH_.V V.V.V.V V.V V,,,,,0,,,..0,,,...V V PU_VTT,,,, V,,..,,,..,, V..,,,,,..,0..,,,0,.V 0..,,0, V,,,,...V,,,,,0, IH_.V GLI_PLL DMI_PLL_IH H DA V_P_IH Z0 V_PEP_INT Z0 ATA_PLL_IH DMI_PLL_IH GLI_PLL V_P_TBY _INT V_P_L_INT V_P_L_R N f or IH0 power pin/ No LAN V_P0_AUX V_REFV_U V_P_L_INT V_REFV ATA_PLL_IH V_REFV_U V_REFV Z0 L0 *HB00KF-T0_0 *U_.V_XR_0 0 0.u_0V_XR_0 V L0 HB0KF-T_0 0u_.V_0_H 0.u_0V_XR_0 L HB00KF-T0_0 Q N0 B E u_.v_xr_0 *0.u_0V_XR_0 0 u_.v_xr_0 L_V_IH 0u_.V_0_H 0u_.V_0_H 0.u_0V_XR_0 0.u_0V_XR_0 0.u_0V_XR_0 *0.u_0V_XR_0 0.u_0V_XR_0 0 u_.v_xr_0 0u_.V_0_H 0 u_.v_yv_0.u_.v_xr_0 0 u_.v_xr_0 0.u_0V_XR_0 0.u_0V_XR_0 0u_.V_0_H 0 u_.v_xr_0 IH0 REV = 0. MATERIAL = I ULB OF UE IH0R 0 A 0 AF W W W W W W V_PU_IO_ AH V_PU_IO_ AJ0 0 AH0 0 AK 0 AH ATAPLL AK0 DMIPLL T0 UBPLL AK G G H J B_ AE0 B_0 M B_ J B_ K 0 B 0 A B_0 AE B_ J B_ K B_ L B_ M B_ M L A_ A A_ A A_0 AK A_0 AJ A_0 AH A_0 AH A_0 AF A_0 AE A_0 AD A_0 A A_ AK0 A_ AJ0 A_ AH A_ AH0 A_ AF A_ AE A_ AD A_ AD A_0 AD A_0 A B_ Y B_ Y B_ Y B_ W B_ W B_ V B_ U B_ U B_ U B_ T B_ T B_ T B_ T B_0 T B_ R B_ R B_ P B_ P B_ P B_ N B_ N B_ L B_ K B_ AE U H L_ A U A RT A U 0 H U 0 E U 0 0 U 0 B0 U 0 A U Y U W U W U V U U U U U U U 0 U U 0 U U 0 U U 0 U LAN B LAN A V V U 0 U R N M M 0 H 0 G 0 F 0 E 0 0 B 0 A A_ T A_ AB A_0 AB A_ AA A_ AA LAN B0 LAN A0 0 H K 0 B A_ A VREF A HDA A0 A_0 A GLANPLL A B_0 AA B_0 AB B_0 AB B_0 A B_0 AD B_0 AD B_0 AD B_ U0 B_ V B_0 V U AD U H GLAN_ A B_0 AA GLAN L U 0 AF GLAN 0 L B DMI_ AG0 DMI_ AG A_ A A_ H A_ H0 VREF_U AF GLAN GLAN B0 B_0 AA 0 A 0 AD0 UHDA A L_ A A_ A0 A_ AB R N M M M 0 M 0 J 0 0.u_0V_XR_0 0u_.V_0_H *0.u_0V_XR_0 L HB00KF-T0_0 0u_.V_0_H 0.u_0V_XR_0 L HB0KF-T_0 0u_.V_0_H L HB00KF-T0_0 0.u_0V_XR_0 0 *0.u_0V_XR_0 0 0.u_0V_XR_0 0 0.u_0V_XR_0 u_.v_xr_0 *U_.V_XR_0 u_.v_xr_0 u_.v_xr_0 Q N0 B E 0u_.V_0_H 0.u_0V_XR_0 0u_.V_0_H 0 0.u_0V_XR_0 0.u_0V_XR_0 R 00_0 R *0mil_NP_0 0.u_0V_XR_0 L HB0KF-T_0 0 0.u_0V_XR_0 0.u_0V_XR_0.u_.V_XR_0 u_.v_xr_0 R 0_0 heet of IH0 Power/

79 chematic Diagrams Fan TRL VGA FAN ONTROL PU FAN ONTROL V_VFAN V VGA_FAN U VGA_FON# FON VIN VOUT VET G0PU V_FAN V PU_FAN U0 PU_FON# FON VIN VOUT VET G0PU PU_FON# R0 *0_0 VGA_FON# V R0 *0_0 R00 *0K_0 VGA_FON# V 0.u_V_Y V_0 V_VFAN 0u_0V_YV_0 J_VGAFAN V R *0K_0 PU_FON# V V PUFAN_EN R 0.u_V_Y V_0.K_0 V_FAN 0u_0V_Y V_0 J_PUFAN J_PUFAN VGA_FANEN J_VGAFAN D A *V R.K_0 V A D *V V_VFAN V U VGA_FON# VGA_FON# FON VIN R VOUT VGA_FAN VET *0_0 G0PU V V_VFAN V J_VGAFAN 00 0.u_V_YV_0 R0 0u_0V_YV_ *0K_0 J_VGAFAN VGA_FANEN VGA_FON# R.K_0 V A D *V Y FAN ONTROL V_FAN V U Y _FON# Y_FON# FON VIN R VOUT Y _FAN VET *0_0 G0PU Y FAN_EN PUFAN_EN VGA_FANEN VGA_FANEN R 0_0 Z0 R 0_0 Z Z0 0 R 0_0 R 0_0 VGAEN_EL R 0_0 Z Z U 0B0 B0 0 0B B PIA A0 A V Z0 Z0 R 0_0 R 0_0 VGAEN_EL VGAEN_EL 0.u_V_YV_0 PU_FANEN VGA_FANEN G D R *00K_0 G V V D R *00K_0 Q0 *MTN00ZH R *00K_0 Z0 Q *MTN00ZH VGA_FANEN VGA_FANEN Y FAN_EN Z0 0 V V V V UA *LV0PW UB Z0 Z0 *LV0PW U Z0 *LV0PW V V U VGA_FANEN *AHGGW U PU_FANEN *AHGGW heet of Fan TRL B.chematic Diagrams V R V V_FAN 0 0.u_V_YV_0 0u_0V_YV_0 J_YFAN R *00K_0 PUFAN_EN UD Z0 *LV0PW *0K_0 Y_FON# V YFAN_EN R D.K_0 A *V J_YFAN,,..,,,..,, V,,,, PU_VTT..,,,..,..,0..,,,0, V Fan TRL B -

80 chematic Diagrams lock Generator V V L HB0KF-T0_0 0 0 LKVDD 0 B.chematic Diagrams heet of lock Generator V 0.u_V_YV_0 0u_.V_0_H 0.u_V_YV_0 0.u_V_YV_0 0.u_V_YV_0 0.u_V_YV_0 V LKVDD_IO L HB0KF-T0_ u_V_YV_0 0u_.V_0_H 0.u_V_YV_0 0.u_V_YV_0 0.u_V_YV_0 0.u_V_YV_0 R V el_r.** 00K_0 R *00K_0 V 0 D0 BN upate R 0K_0 PIR R *0K_0 XTALI 0 X R *0K_0 PIR R 0K_0 XTALO R *0K_0 K_PIF R 0K_0.MHz p_0v_npo_0 p_0v_npo_0.v,0 R *K_0 FA R K_0 FB R *K_0 F V R *0K_0 PWRGD_P_BUF Z0 B PWRGD_P_BUF PWRGD_V R 0K_0 PWRGD_V E R0.K_0 Z0 Q N0 R K_0 K_PWRGD_R K_PWRGD FB R *0K_0 V..,,,0,,, LK..,,,0,,, DATA.V R0 K_0 Z0 V E B Q0 N0 R0 K_0 H_FBEL0 FA U Vdd_PLL Vdd_ Vdd_PI Vdd_REF Vdd_R Vdd_PU Vdd_IO Vdd_PLL_IO Vdd_R_IO Vdd_R_IO Vdd_R_IO Vdd_PU_IO el_r.** Xtal_I n Xtal_Out KPWRGD/PD# F_B / TestMode L DA _IO Vss_PLL Vss_ Vss_PU _PI Vss_REF Vss_R Vss_R Vss_R IDTV R 0K_0 PUT0 PU0 PUT 0 PU RT /PU_ ITPT R /PU_ ITP R0 / DOT RT0 / DOTT RT/MHz0 R/MHz/.MHz RT/ATA R/ATA R *0K_0 PIR RT / R#_ R / R#_D RT R PI_top#/ RT PU_top#/ R RT R 0 RT/ R#_F R/ R#_E RT R RT0 R0 0 RT/ R#_H R/R#_G PI0/ R#_A PI/R#_B *PI/R_ENABLE **PI/ATA_EL PI/ R_EN PIF/ ITP_EN UB / F_A 0 REF / F_ / Testel For LGXPT IH_PI_TP_R R 0_0 IH_PU_TP_R R 0_0 D0 Z0 Z0 PIR PIR PIR K_PIF FA F R _0 R _0 R _0 R _0 R _0 IH_PI_TP IH_PU_TP R R R00 R K_M_PU_DP K_M_PU_DN K_M_IOH_DP 0 K_M_IOH_DN 0 PIE_LK_WAN PIE_LK_WAN# PIE_LK_BUFFER# 0 PIE_LK_BUFFER 0 PIE_LK_UB PIE_LK_UB# K_00M_ATA_H K_00M_ATA_L K_PE_00M_IOH0_DP K_PE_00M_IOH0_DN IH_PI_TP IH_PU_TP K_PE_MXM_DP K_PE_MXM_DN K_PE_00M_IOH_DP K_PE_00M_IOH_DN K_PE_00M_IH_H K_PE_00M_IH_L PIE_LK_JMB 0 PIE_LK_JMB# 0 PIE_LK_B PIE_LK_B# PLK_TPM 0 K_P_M_IO K_P_M_IH K_UB_M_IH K_M_IH *K_0 V K_0 *K_0 K_0 PU IOH PIEX WLAN PIE_LK_BUFFER UB.0 ATA K_PE_MXM_DP K_PE_MXM_DN PIEX MXM.0 IOH PIEX MXM.0 IOH PIEX LK IH JMB B TPM E PIEX LK.V V R.K_0 R0 *K_0 Z0 R0 00_0 F 0 FB 0 0 FA PU 00 R[..0] PI.. UB DOT REF.. K_P_M_IO K_P_M_IH K_M_IH K_UB_M_IH 0 *0p_0V_NPO_0 *0p_0V_NPO_0 *0p_0V_NPO_0 *0p_0V_NPO_0 PWRGD_P_BUF PWRGD_V R *0K_0 PWRGD_P_BUF Z0 B PWRGD_V R 0K_0 E Z0 B Q N0 E Q N0 R K_0 H_FBEL F ,,,..,0,,,..0,,,.. V..,,,..,0..,0..,,,0, V 0..,,0,.V B - 0 lock Generator V

81 chematic Diagrams lock Buffer IDB0GLFT lock ZDB IDB0 V V U L 0.u_0V_XR_0 V 0.u_0V_XR_0 HB0KF-T0_0 VDD 0.u_0V_XR_0 VDD VDD 0.u_0V_XR_0 0u_0V_YV_0 0.u_0V_XR_0 0.u_0V_XR_0 VDD L VDD VA HB0KF-T0_0 VDDA 0 0.u_0V_XR_0 0u_0V_YV_0 0.u_0V_XR_0 A DIF_ DIF_# DIF_ DIF_# DIF_ DIF_# DIF_ DIF_# 0 0 LK_HDMI_IN LK_HDMI_IN# DIF_ DIF_# DIF_ DIF_# LK_ROBON LK_ROBON# RP PR 0 PIE_DIF_ PIE_DIF_# RP PR 0 PIE_DIF_ PIE_DIF_# RP PR 0 RP PR 0 PIE_LK_HDMI_IN PIE_LK_HDMI_IN# PIE_LK_ROBON PIE_LK_ROBON# HDMI-IN ROBON PIE_LK_BUFFER PIE_LK_BUFFER#, K_PWRGD V PIE_LK_BUFFER PIE_LK_BUFFER# OE_INV HDMI_IN_LKREQ ROBON_LKREQ BYPA_PLL R 0_0 Z00 R0 0K_0 Z00 HIGH_BW LK_IN LK_IN# OE_INV OE_ OE_ BYPA#/PLL PD# R_TOP# HIGH_BW# IREF LK DATA IREFR LK DATA _%_0 LK..,,,,,, DATA..,,,,,, PIE_LK_ROBON PIE_LK_ROBON# PIE_DIF_ PIE_DIF_# R R R R0._%_0._%_0._%_0._%_0 HDMI_IN_LKREQ# ROBON_LKREQ# R0 R K_0 Z00 G V R 0K_0 HDMI_IN_LKREQ Q MTN00ZH V R0 0K_0 ROBON_LKREQ K_0 Z00 G D D Q MTN00ZH IDB0 PIE_LK_HDMI_IN R._%_0 PIE_LK_HDMI_IN# R._%_0 PIE_DIF_ R._%_0 PIE_DIF_# R._%_0 Disable TPM function TPM. U 0, LP_AD0 LAD0 VDD V, LP_AD 0 LAD VDD, LP_AD LAD VDD, LP_AD LAD *0.u_V_YV_0 *0.u_V_YV_0 *0.u_V_YV_0 *U_.V_0 PLK_TPM R *0K_0 LLK V Z00 R0 *0_0, LP_FRAME# LFRAME# VB V,,,, PLTRT# LREET# 0, LP_IRQ R *0_0 Z0 ERIRQ LKRUN# U_T# TPM_PD# Z00 GPIO *0.u_V_YV_0 R *0_0 U_T# LPPD# Z00 T TPM_BADD GPIO T asserted before entering TETBI/BADD Z00 R *0_0 Z0 0 *P_0 XTALI LP reset timing: TPM_PP PP X LPPD# inactive to LRT# inactive ~us *.KHz o-layout Z0 XTALO Z00 X T Z0 N_ D0 R T Z0 N *.KHz-00 T N *0_0 R0 *00_0 Z0 _ Z00 0 *P_0 TETI _ heet 0 of lock Buffer IDB0GLFT B.chematic Diagrams HI : AE TPM_PP LOW : NORMAL( Internal PD ) HI : E/F h TPM_BADD LOW : E/F h *LBTT V V V PLK_TPM R *_0 Z0 *0p_0V_NPO_0 R0 R0 R0 TPM_PP R0 *0K_0 V *0K_0 0K_0 *0K_0 R *0K_0 V BYPA_PLL HIGH_BW OE_INV TPM_BADD R *0K_0 V R0 R R R *0K_0 0K_0 *0K_0 0K_0,,,..,,,..0,,,.. V..,,,..,..,0..,,,0, V lock Buffer IDB0GLFT B -

82 chematic Diagrams MXM.0 PI-E Master B.chematic Diagrams heet of MXM.0 PI-E Master VIN_MXM A J_MXMA E- MXM.0 MATER E- PWR_R E- PWR_R E- PWR_R E- PWR_R E- PWR_R E- PWR_R E- PWR_R E- PWR_R E-0 PWR_R E- PWR_R EX_DVI_HPD R *00K_0 E- E- E- E- E- E- E- VRUN_M E- E-0 V PWR_R(0A)---0V V V VRUN(.A)--V V V VRUN(A)--.V R 0_0 PEX_TD_W# PEX_TD_W# VGA_DIABLE# ENAVDD PNL_PWR_EN ENABKL PNL_BL_EN R0.K_0 PNL_BL_PWM V R00.K_0 HDMI_E DVI_HPD DD_DAT LVD_DD_DAT DD_LK LVD_DD_LK MXM_A_REET# OEM MXM_DIN R0 *0mil_NP_0 MXMPDIF-OUT OEM, PDIF-OUT OEM OEM PEG_RXN[:0] PEG_RXN PEG_RXN PEG_RXP[:0] 0.u_0V_XR_0 PEG_RXP 0.u_0V_XR_0 PEG_RXP PEX_RX# PEX_RX PEG_RXN0.u_0V_XR_0 PEG_RXN PEG_RXP 0.u_0V_XR_0 PEG_RXP PEX_RX# PEX_RX PEG_RXN0.u_0V_XR_0 PEG_RXN PEG_RXP 0.u_0V_XR_0 PEG_RXP PEX_RX# PEX_RX PEG_RXN0.u_0V_XR_0 PEG_RXN PEG_RXP 0.u_0V_XR_0 0PEG_RXP PEX_RX# PEX_RX PEG_RXN0.u_0V_XR_0 PEG_RXN PEG_RXP 0.u_0V_XR_0 PEG_RXP PEX_RX# PEX_RX PEG_RXN0.u_0V_XR_0 PEG_RXN0 PEG_RXP0 0.u_0V_XR_0 PEG_RXP0 PEX_RX0# PEX_RX0 PEG_RXN0.u_0V_XR_0 0PEG_RXN PEG_RXP 0.u_0V_XR_0 PEG_RXP PEX_RX# PEX_RX PEG_RXN0.u_0V_XR_0 PEG_RXN PEG_RXP 0.u_0V_XR_0 PEG_RXP PEX_RX# PEX_RX PEG_RXN0.u_0V_XR_0 PEG_RXN PEG_RXP 0.u_0V_XR_0 PEG_RXP PEX_RX# 0 PEX_RX PEG_RXN0.u_0V_XR_0 PEG_RXN 0 PEG_RXP 0.u_0V_XR_0 PEG_RXP 0 PEX_RX# 0 PEX_RX PEG_RXN0.u_0V_XR_0 PEG_RXN 0 PEG_RXP 0.u_0V_XR_0 PEG_RXP PEX_RX# PEX_RX PEG_RXN0.u_0V_XR_0 PEG_RXN PEG_RXP 0.u_0V_XR_0 PEG_RXP PEX_RX# PEX_RX PEG_RXN0.u_0V_XR_0 PEG_RXN PEG_RXP 0.u_0V_XR_0 PEG_RXP PEX_RX# PEX_RX PEG_RXN0.u_0V_XR_0 PEG_RXN PEG_RXP 0.u_0V_XR_0 PEG_RXP PEX_RX# PEX_RX PEG_RXN0.u_0V_XR_0 PEG_RXN PEG_RXP 0.u_0V_XR_0 00PEG_RXP PEX_RX# PEX_RX PEG_RXN00.u_0V_XR_0 0PEG_RXN0 PEG_RXP0 0.u_0V_XR_0 PEG_RXP0 PEX_RX0# PEX_RX0 BP0-0-H VIN_MXM MXM.0 MODULE BOARD ONNETOR PWR_R E- PWR_R E- PWR_R E- PWR_R E- PWR_R E- PWR_R E- PWR_R E- PWR_R E- PWR_R E- PWR_R E-0 E- E- E- E- E- VIN_MXM MXM_MD MXM_M E- E- E- E- E-0 PRNT_R# WAKE# MXM_PWRGD PWR_GOOD Z0 PWR_EN 0 A/BATL PWR_LEVEL 0 TH_OVERT# TH_OVERT# TH_ALERT# TH_PWM GPIO0 GPIO 0 GPIO MXM_MD MB_DAT MXM_M MB_LK OEM OEM 0 OEM OEM PEG_TXN PEX_TX# 0 PEG_TXP PEX_TX PEG_TXN PEX_TX# PEG_TXP PEX_TX 0 PEG_TXN PEX_TX# PEG_TXP PEX_TX PEG_TXN PEX_TX# PEX_TX 0 PEG_TXP PEG_TXN PEX_TX# PEG_TXP PEX_TX PEG_TXN0 PEX_TX0# 0 PEG_TXP0 PEX_TX0 PEG_TXN PEX_TX# PEG_TXP 0 PEX_TX 0 PEG_TXN PEX_TX# PEX_TX PEG_TXP PEG_TXN PEX_TX# PEX_TX 00 PEG_TXP 0 PEG_TXN 0 PEX_TX# 0 PEG_TXP PEX_TX 0 0 PEG_TXN PEX_TX# 0 PEG_TXP PEX_TX PEG_TXN PEX_TX# PEG_TXP PEX_TX 0 PEG_TXN PEX_TX# PEG_TXP PEX_TX PEG_TXN PEX_TX# PEX_TX 0 PEG_TXP PEG_TXN PEX_TX# PEX_TX PEG_TXP PEG_TXN0 PEX_TX0# 0 PEG_TXP0 PEX_TX0 0 D R0 R R R VIN_MXM G G V 0.u_0V_XR_0 PEG_TXN 0.u_0V_XR_0 PEG_TXP 0.u_0V_XR_0 PEG_TXN 0.u_0V_XR_0 PEG_TXP 0.u_0V_XR_0 PEG_TXN 0.u_0V_XR_0 PEG_TXP 0.u_0V_XR_0 PEG_TXN 0.u_0V_XR_0 PEG_TXP 0.u_0V_XR_0 PEG_TXN 0.u_0V_XR_0 PEG_TXP 0.u_0V_XR_0 0.u_0V_XR_0 0.u_0V_XR_0 PEG_TXN 0.u_0V_XR_0 PEG_TXP 0.u_0V_XR_0 PEG_TXN 0.u_0V_XR_0 PEG_TXP 0.u_0V_XR_0 PEG_TXN 0.u_0V_XR_0 PEG_TXP 0.u_0V_XR_0 PEG_TXN 0.u_0V_XR_0 PEG_TXP 0.u_0V_XR_0 0.u_0V_XR_0 Q MTN00ZH D Q MTN00ZH D *0mil_NP_0 PEG_TXN0 PEG_TXP0 0.u_0V_XR_0 PEG_TXN 0.u_0V_XR_0 PEG_TXP 0.u_0V_XR_0 PEG_TXN 0.u_0V_XR_0 PEG_TXP PEG_TXN PEG_TXP 0.u_0V_XR_0 PEG_TXN 0.u_0V_XR_0 PEG_TXP 0.u_0V_XR_0 PEG_TXN 0.u_0V_XR_0 PEG_TXP 0.u_0V_XR_0 PEG_TXN0 0.u_0V_XR_0 PEG_TXP0 MXM_PRENT# TH_OVERT# R 0K_0 V R *.K_0 Q GMTN00ZH A/BATL#,, VGATHERM_ALERT#.K_0 V.K_0 V.K_0 MXM_BIT_LK MXM_DATO MXM_Y N HDMI_, MD_VGA_THERM, M_VGA_THERM, MXM_PWR_EN, V A L TH_OVERT# PEG_TXN[:0] PEG_TXP[:0] MXM_PRENT# LVD_ULKN LVD_ULKP EX_DVI_DATAN[:0] EX_DVI_DATAP[:0] LVD_UN LVD_UP LVD_UN LVD_UP LVD_UN0 LVD_UP0 EX_DVI_LK# EX_DVI_LK,,,0, K_PE_MXM_DN K_PE_MXM_DP HDMI_LK# HDMI_LK HDMI_# HDMI_ HDMI_# HDMI_ HDMI_#0 HDMI_0 HDMI DA HDMI L R A HB0KF-T0_0 VRUN_M PLTRT# E_PIE_RT# LVD_ULKN LVD_ULKP LVD_UN LVD_UP LVD_UN LVD_UP LVD_UN LVD_UP LVD_UN0 LVD_UP0 DVI_DD_DAT DVI_DD_LK EX_DVI_DATAN EX_DVI_DATAP EX_DVI_DATAN EX_DVI_DATAP EX_DVI_DATAN0 EX_DVI_DATAP0 *0_0 VRUN_M Z0 R 0u_0V_YV_0 0.0u_V_XR_0 *0_0 R 0K_0 Z0 J_MXMB PEX_REFLK# PEX_REFLK LVD_ULK# LVD_ULK LVD_UTX# LVD_UTX LVD_UTX# LVD_UTX LVD_UTX# LVD_UTX LVD_UTX0# LVD_UTX0 0 DP L0# 0 DP L0 0 0 DP L# 0 DP L DP L# DP L DP L# DP L DP AUX# DP AUX DP_A_L0# DP_A_L0 DP_A_L# DP_A_L DP_A_L# DP_A_L DP_A_L# DP_A_L DP_A_AUX# DP_A_AUX PRNT_L# BP0-0-H VRUN V V MXM.0 MODULE BOARD ONNETOR MXM_RT# U AHG0GW *0.u_V_YV_0 LK_REQ# PEX_RT# VGA_DD_DAT VGA_DD_LK 0 VGA_VY N VGA_HYN VGA_RED VGA_GREEN 0 VGA_BLUE LVD_LLK# LVD_LLK 0 LVD_LTX# LVD_LTX LVD_LTX# 0 LVD_LTX LVD_LTX# LVD_LTX 00 LVD_LTX0# 0 LVD_LTX0 0 0 DP_D_L0# 0 DP_D_L0 0 DP_D_L# DP_D_L DP_D_L# 0 DP_D_L DP_D_L# DP_D_L 0 DP_D_AUX# DP_D_AUX DP HPD DP_D_HPD 0 DP_B_L0# DP_B_L0 0 DP_B_L# DP_B_L DP_B_L# 0 DP_B_L DP_B_L# DP_B_L 0 DP_B_AUX# DP_B_AUX DP_B_HPD DP_A_HPD V 0 V VIN_MXM,,,..,0,,..0,,,.. V..,,,..0,..,0..,,,0, V,,,..,,,..,, V VIN_MXM VRUN MXM_RT# R MXM_LKREQ# MXM_RT# LVD_LLKN LVD_LLKP LVD_LN LVD_LP LVD_LN LVD_LP LVD_LN LVD_LP LVD_LN0 LVD_LP0 EX_DVI_DATAN EX_DVI_DATAP EX_DVI_DATAN EX_DVI_DATAP EX_DVI_DATAN EX_DVI_DATAP VRUN 0K_0 V RT_DD_DAT RT_DD_LK EX_DA_VY N EX_DA_HYN EX_DA_R EX_DA_G EX_DA_B LVD_LLKN LVD_LLKP LVD_LN LVD_LP LVD_LN LVD_LP LVD_LN0 LVD_LP0 DP_D# DP_D DP_D# DP_D DP_D#0 DP_D0 DP_D# DP_D DP_D_AUX# DP_D_AUX HDMI_HPD DP_DHPD EX_DVI_DATAN[:0] EX_DVI_DATAP[:0] EX_DVI_HPD 0.0u_0V_XR_0.u_V_XR_0_A.u_V_XR_0_A 0.u_0V_YV_0 0.u_0V_YV_0 0.0u_0V_XR_0 0.u_0V_YV_0 0.u_0V_Y V_0 0 *0U_V_ 0u_V_YV_ *0U_V_ 0u_V_YV_.u_V_XR_0_A.u_V_XR_0_A LOE TO MXM PIN E LOE TO MXM PIN E LOE TO MXM ONN. LOE TO MXM ONN. B - MXM.0 PI-E Master

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