Block Diagram. Blue 3648 R G B 1

Transcription

1 368 R 368 G 368 B 368 3pixel CCD Linear Seor (Color) ILX6K Description The ILX6K is a reduction type CCD linear seor developed for color image scanner. This seor reads legal-size documents at a deity of DPI. pin DIP (Cer-DIP) Features Number of effective pixels: 9 pixels (368 pixels 3) Pixel size: 8µm 8µm (8µm pitch) Distance between line: 6µm (8 Lines) Single-sided readout Ultra low lag / High seitivity Single power supply Input clock pulse: CMOS drive Number of output 3 (R, G, B) Package: pin cer-dip ( mil) Absolute Maximum Ratings Supply voltage Operating temperature to + C Storage temperature 3 to +8 C Pin Configuration (Top iew) OUT-R OUT-G φrs φlh OUT-B φlh φ Block Diagram 6 Blue D7 D6 D63 S D D φrog-b 3 S368 Driver Read Out Gate CCD Register Green D7 D6 D63 S D D φrog-g S368 Driver Read Out Gate CCD Register Red D7 D6 D63 S D D CCD Register Read Out Gate S368 Driver φrog-r Driver 3 8 φrs φ φ 8 φ OUT-B OUT-G OUT-R 9 φrog-r 3 φrog-b φrog-g Sony reserves the right to change products and specificatio without prior notice. This information does not convey any licee by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume respoibility for any problems arising out of the use of these circuits. E983-PK

2 ILX6K Pin Description Pin No. Symbol Description Pin No. Symbol Description OUT-R Signal out (red) φrog-g 3 φrog-b 3 φrs φlh φ 6 power supply φ 9 9 power supply φrog-r OUT-B Signal out (blue) OUT-G Signal out (green) Recommended Supply oltage Item Min. Typ. Max. Unit...6 Clock Characteristics Item Symbol Min. Typ. Max. Unit Input capacity of φ, φ Cφ, Cφ 6 pf Input capacity of φlh CφLH pf Input capacity of φrs CφRS pf Input capacity of φrog CφROG pf It indicates that φrog-r, φrog-g, φrog-b as φrog. Clock Frequency Item Symbol Min. Typ. Max. Unit φ, φ, φlh, φrs fφ, fφ, fφlh, fφrs MHz Input Clock Pulse oltage Condition Item Min. Typ. Max. Unit φ, φ, φlh, φrs, φrog pulse voltage High level Low level.7...

3 ILX6K Electrooptical Characteristics (Note ) Ta = C, =, fφrs = MHz, Input clock = p-p, Light source = 3K, IR cut filter CM-S (t =.mm) Item Symbol Min. Typ. Max. Unit Remarks Seitivity Red Green Blue RR RG RB /(lx s) Note Seitivity nonuniformity Saturation output voltage Red PRNU SAT SER % Note 3 Note Saturation exposure Green Blue SEG SEB lx s Note Dark voltage average Dark signal nonuniformity Image lag Supply current Total trafer efficiency Output impedance Offset level Dynamic range DRK DSNU IL I TTE ZO OS DR m m % ma % Ω Note 6 Note 6 Note 7 Note 8 Note 9 Note ) In accordance with the given electrooptical characteristics, the black level is defined as the average value of D, D3 to D. ) For the seitivity test light is applied with a uniform inteity of illumination. 3) PRNU is defined as indicated below. Ray incidence conditio are the same as for Note. OUT-G = m (Typ.) PRNU = (MAX MIN) / [%] AE Where the 368 pixels are divided into blocks of. The maximum output of each block is set to MAX, the minimum output to MIN and the average output to AE. ) Use below the minimum value of the saturation output voltage. ) Saturation exposure is defined as follows. SE = SAT R Where R indicates RR, RG, RB, and SE indicates SER, SEG, SEB. 6) Optical signal accumulated time τint stands at ms. 7) OUT-G = m (Typ.) 8) os is defined as indicated bellow. OUT indicates OUT-R, OUT-G, and OUT-B. 9) Dynamic range is defined as follows. OUT OS DR = SAT DRK When the optical signal accumulated time is shorter, the dynamic range gets wider because the optical signal accumulated time is in proportion to the dark voltage. 3

4 D D D3 D3 D D D6 D6 D63 S S S366 S367 S368 D6 D6 D7 D7 D ILX6K Clock Timing Chart φrog φ φlh φ φrs OUT Optical black (9 pixels) Dummy signal (63 pixels) -line output period (373 pixels) Note) The trafer pulses (φ, φ, φlh) must have more than 373 cycles. OUT indicates OUT-R, OUT-G, OUT-B.

5 ILX6K Clock Timing Chart t t φrog t6 t t7 φ t t3 φ Clock Timing Chart 3 t7 t6 φ φlh φ t9 t t φrs t8 OUT t t3

6 ILX6K Clock Pulse Recommended Timing Item Symbol Min. Typ. Max. Unit φrog, φ pulse timing t φrog pulse high level period t 8 φrog, φ pulse timing t3 8 φrog pulse rise time t φrog pulse fall time t φ pulse rise time /φ pulse fall time t6 6 φ pulse fall time /φ pulse rise time φrs pulse high level period φrs, φlh pulse timing t7 t8 t9 6 φrs pulse rise time t 3 φrs pulse fall time t 3 Signal output delay time t t3 These timing is the recommended condition under fφrs = MHz. 6

7 OUT-R φrs φlh φ φrog-r OUT-G OUT-B φ φrog-b φrog-g ILX6K Application Circuit.kΩ.kΩ φ φrog-b φrog-g OUT-G OUT-B IC Tr Tr Ω Ω Ω Ω Ω Ω Ω.µF 7µF/6 Tr IC OUT-R.kΩ φrs φlh φ φrog-r IC: 7AC Tr: SC78 Data rate fφrs = MHz. Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume respoibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. 7

8 Output voltage rate Output voltage rate Relative seitivity ILX6K Example of Representative Characteristics ( =, Ta = C) Spectral seitivity characteristics (Standard characteristics) Wavelength [nm] Dark signal output temperature characteristics (Standard characteristics) Integration time output voltage characteristics (Standard characteristics) Ta Ambient temperature [ C] τint Integration time [ms] Offset level vs. characteristics (Standard characteristics) Ta = C Offset level vs. temperature characteristics (Standard characteristics) OS Offset level [] 8 6 OS.3 OS Offset level [] 8 6 OS Ta.m/ C..6 [] 3 6 Ta Ambient temperature [ C] 8

9 ILX6K Notes of Handling ) Static charge prevention CCD image seors are easily damaged by static discharge. Before handling be sure to take the following protective measures. a) Either handle bare handed or use non chargeable gloves, clothes or material. Also use conductive shoes. b) When handling directly use an earth band. c) Itall a conductive mat on the floor or working table to prevent the generation of static electricity. d) Ionized air is recommended for discharge when handling CCD image seor. e) For the shipment of mounted substrates, use boxes treated for prevention of static charges. ) Notes on Handling CCD Cer-DIP Packages The following points should be observed when handling and italling cer-dip packages. a) Remain within the following limits when applying static load to the ceramic portion of the package: () Compressive strength: 39N/surface (Do not apply load more than.7mm iide the outer perimeter of the glass portion.) () Shearing strength: 9N/surface (3) Teile strength: 9N/surface () Torsional strength:.9nm b) In addition, if a load is applied to the entire surface by a hard component, bending stress may be generated and the package may fracture, etc., depending on the flatness of the ceramic portion. Therefore, for itallation, either use an elastic load, such as a spring plate, or an adhesive. Upper ceramic layer lower ceramic layer 39N () Low-melting glass 9N 9N.9Nm () (3) () c) Be aware that any of the following can cause the glass to crack: because the upper and lower ceramic layers are shielded by low-melting glass, () Applying repetitive bending stress to the external leads. () Applying heat to the external leads for an extended period of time with soldering iron. (3) Rapid cooling or heating () Rapid cooling or impact to a limited portion of the low-melting glass with a small-tipped tool such as tweezers. () Prying the upper or lower ceramic layers away at a support point of the low-melting glass. Note that the preceding notes should also be observed when removing a component from a board after it has already been soldered. 3) Soldering a) Make sure the package temperature does not exceed 8 C. b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a grounded 3W soldering iron and solder each pin in less then seconds. For repairs and remount, cool sufficiently. c) To dismount an imaging device, do not use a solder suction equipment. When using an electric desoldering tool, ground the controller. For the control system, use a zero cross type. 9

10 ILX6K ) Dust and dirt protection a) Operate in clean environments. b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces. Should dirt stick to a glass surface, blow it off with an air blower. (For dirt stuck through static electricity ionized air is recommended.) c) Clean with a cotton bud and ethyl alcohol if the glass surface is grease stained. Be careful not to scratch the glass. d) Keep in a case to protect from dust and dirt. To prevent dew condeation, preheat or precool when moving to a room with great temperature differences. ) Exposure to high temperatures or humidity will affect the characteristics. Accordingly avoid storage or usage in such conditio. 6) CCD image seors are precise optical equipment that should not be subject to mechanical shocks.

11 . ± ±.. ±. 9.. ±. (AT STAND OFF).6 to 9 ILX6K. Package Outline Unit: mm pin DIP (mil) 7. ±.8.6 ±. 9.8 (8µm 368Pixels) No. Pixel (Green) H... PACKAGE STRUCTURE PACKAGE MATERIAL Cer-DIP LEAD TREATMENT TIN PLATING LEAD MATERIAL ALLOY PACKAGE WEIGHT.g.3 M. The height from the bottom to the seor surface is. ±.3mm.. The thickness of the cover glass is.8mm, and the refractive index is..