A/D Converters Nonlinearity Measurement and Correction by Frequency Analysis and Dither

Transcription

1 1200 IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. 52, NO. 4, AUGUST 2003 A/D Converters Nonlinearity Measurement and Correction by Frequency Analysis and Dither Francesco Adamo, Filippo Attivissimo, Nicola Giaquinto, and Amerigo Trotta, Member, IEEE Abstract In this paper, a new frequency-domain approach to measure and correct the static nonlinearity error of analog-to-digital converters is analyzed. The nonlinearity is measured as a linear combination of the Chebyshev polynomials, whose coefficients are derived via frequency-domain analysis, and corrected with a nonlinear equation solving method, which makes use of the parametric form of the static characteristic. The proposed methodology is especially suited for dithered converters, due to their particular features of smoother nonlinearity and very high resolution. Both simulation and experimental results are reported, quantifying also the achieved increase of effective bits. Index Terms Analog-to-digital conversion, Chebyshev functions, discrete fourier transform, dither techniques, nonlinearities. I. INTRODUCTION THE distortions of static characteristics are usually the main, but not the sole, source of errors in analog-to-digital converters (ADCs). The task of measuring the deviations of the characteristic from the ideal straight line is therefore not trivial, since comparing the output with the input of the device does not work: random errors are indeed of the same order of magnitude as the systematic errors that one wants to measure. The customary way for obtaining a noise-free measurement of the static characteristic is the statistical approach, i.e., the histogram test [1]. This method is, in principle, able to measure the actual threshold levels with any desired accuracy, provided a high enough number of samples is used for the measurement. Being performed with a dynamic signal (usually a sine wave), this test is much faster than the older servo-loop technique. This does not mean, however, that it is fast enough for any purpose. The fact that there is an upper bound to the frequency of the test signal (due to the intrinsic features of the ADC itself), joined with the fact that about one hundred of samples per code bin are usually needed, make the test time very long (up to many hours) for high-resolution converters. Since the problem in measuring the static characteristic of an ADC is to eliminate noise and random errors, the idea of comparing the input with a filtered version of the output seems quite natural. Filtering the output means to consider only certain harmonics of its spectrum, and this can be done by taking Manuscript received June 15, 2002; revised December 4, F. Adamo, F. Attivissimo, and N. Giaquinto are with the Department of Electrics and Electronics (DEE), Polytechnic of Bari, Bari, Italy ( adamo@misure.poliba.it; attivissimo@misure.poliba.it; giaquinto@misure.poliba.it). A. Trotta is with the Department of Innovation Engineering (DII), University of Lecce, Lecce, Italy ( amerigo.trotta@unile.it). Digital Object Identifier /TIM the fast Fourier transform (FFT) of the output with a sinusoidal input [2] [4]. As the test must distinguish spurious harmonics, due to linearity errors, from the noise floor, due to quantization and random errors, usually high-resolution converters are not a problem; in fact, even fewer samples can be required for such ADCs. Practical experiments [3] show that 4,000 to 8,000 samples are usually sufficient for an FFT test, regardless of the ADC resolution. However, even if the frequency-domain approach is much faster than the statistical one, it is intuitively understood that eliminating the noise means also to low-pass, i.e., to smooth, the characteristic. This greatly affects the accuracy of the FFT test as a method of measuring the nonlinearity. If the aim of the measurement is to certify the maximum static error of a converter, the statistical approach is clearly an unavoidable choice, even if time-consuming. The picture is quite different if, instead, the aim of the measurement is correcting the systematic error to improve linearity and effective resolution. The actual shape of the static characteristic slowly changes with time, and measurements must be repeated periodically; therefore, a fast, even if approximate, measurement method can be more useful than an extremely accurate method that lasts hours. This paper deals precisely with the FFT test as a method for both measuring and correcting the nonlinearity of an ADC. First, the accuracy of the FFT test is examined both with ordinary converters (Section II) and with dithered converters (Section III). The latter case is especially interesting because it is very logical to couple dithering (which removes small-scale errors like quantization) with linearization (which removes largescale errors) [5]. Afterward (Section IV), a novel algorithm to linearize the static characteristic is illustrated. The proposed method makes use of the parametric form (sum of Chebyshev polynomials) of the static characteristic as measured by the FFT test, allowing a meaningful performance increase in terms of effective resolution. The linearization method, especially if coupled with dithering, makes the FFT test a very effective tool for improving the accuracy of computer-based instruments. The theoretical arguments illustrated in the paper are validated by simulations and experiments with actual converters. II. FFT TEST FOR MEASURING THE NONLINEARITY OF ORDINARY ADC The FFT test is commonly employed to inspect the output spectrum of the ADC under test and derive figures of merit like SNR, THD, or effective bits. Using FFT to measure the static nonlinearity is not usual but is, in principle, very simple. Let be the actual static characteristic to be measured (for an /03$ IEEE

2 ADAMO et al.: A/D CONVERTERS NONLINEARITY MEASUREMENT AND CORRECTION 1201 actual ADC, it is of course an irregular staircase function), and let the input be Being an even function, and a static characteristic, the output will be also an even function with Fourier expansion (1) (2) By solving (1) with respect to in (2), it is readily obtained, and substituting the result (3) where are, according to a wellknown theory, polynomials of degree forming a family of orthogonal functions (Chebyshev polynomials of the first kind). Of course (3), which is an infinite sum, must be approximated in practice by a finite formula, that is Fig. 1. by the FFT test (N =10, N =50) for a simulated 16-bit ADC. Comparison between the INL and the static error h(x) 0 x measured (4) where is a finite number of harmonics considered. Unfortunately, the approximation introduced by substituting (3) with (4) is quite large in the specific case of A/D converters. The static characteristic of actual ADCs includes, indeed, sudden jumps due to quantization and (more important) large differential nonlinearity errors. As a consequence, the characteristic cannot be accurately approximated by (4), which is a polynomial of finite order and, consequently, a smooth function. The conclusion is that the FFT test, although much faster than the histogram method, gives only a smoothed approximation of the actual ADC characteristic. It trades accuracy with speed. The performance of the FFT test in measuring ADC nonlinearity has been thoroughly analyzed by the authors in [3], [4], and are briefly illustrated here by Figs Fig. 1 refers to a simulated 16-bit converter, while Figs. 2 and 3 have been obtained with actual converters, with 8 and 12 bits of resolution, respectively. In all of the cases, the FFT test has been performed with 4,096 samples of a coherently sampled sine wave: a very small number of samples, compared with the histogram test. The characteristic has been reconstructed in two ways, using 10 and 50 harmonics. Figs. 1 3 show, first, that [the static error measured via (4)] can be considered an approximation of the integral nonlinearity (INL), and not of the full static error (which is equal to the sum of the INL and a sawtooth-shaped quantization error of 0.5 LSB). Indeed, is in no way able to include quantization error for a reasonably low degree. Second, also as an approximation of the INL, the quantity certainly cannot compete in accuracy with the outcome of an histogram test because the INL of an actual converter has many sudden variations that is not able to reproduce accurately. The INL Fig. 2. by the FFT test (N =10, N =50) for an actual 8-bit ADC. Comparison between the INL and the static error h(x) 0 x measured measured by the FFT test is too smooth, does not have a guaranteed accuracy, and, therefore, cannot be used to certify the static error of an ADC. On the other hand, the FFT test is practically instantaneous and gives a reasonably accurate idea of the large-scale nonlinearity error. III. FFT TEST FOR MEASURING THE NONLINEARITY OF DITHERED ADC As reported in [6], the FFT test gains much ground with respect to the statistical methodology when dealing with dithered ADCs. This is not at all a rare occurrence: most modern analog acquisition devices include an internal noise generator with the specific purpose of utilizing the dither technique [7]. In a dithered ADC, the input signal is added to a wide-band random, pseudorandom, or deterministic signal. This dither signal is removed after A/D conversion by digital subtraction, averaging, filtering, or a combination of these techniques. The

3 1202 IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. 52, NO. 4, AUGUST 2003 Fig. 3. Comparison between the INL and the static error h(x) 0 x measured by the FFT test (N =10, N =50) for an actual 12-bit ADC. Fig. 5. Comparison between the true static error g (x) 0 x and the static error h(x) 0 x measured by the FFT test (N =50) for an actual 8-bit ADC with Gaussian dither ( = 1 LSB). Fig. 4. Comparison between the true static error g (x) 0 x and the static error h(x)0 x measured by the FFT test (N =50), for a simulated 16-bit ADC with Gaussian dither ( =1LSB). beneficial effect consists of the fact that, for a given input, the expected output of the converter is no more,but where is the probability density function of the dither signal. Equation (5) shows that the new static characteristic is a smoothed (low-pass filtered) version of the original characteristic, and is, therefore, usually much better. In particular, quantization error and large differential nonlinearity errors are removed by a large enough. Dithering, therefore, trades systematic errors with random errors, or, if one removes random errors by averaging or filtering, with conversion speed or bandwidth. As the dither smears the static characteristic, it is obvious to expect, in this case, better performance by the FFT test of nonlinearity. Figs. 4 6 compare the static error measured by (5) Fig. 6. Comparison between the true static error g (x) 0 x and the static error h(x) 0 x measured by the FFT test (N =50) for an actual 12-bit ADC with Gaussian dither ( = 1 LSB). the FFT test (the same of Figs. 1 3) with the true static error of the converters when a Gaussian dither (1 LSB rms) is applied. The characteristic has been measured with the brute force and time-consuming method illustrated in [6], consisting in comparing the averaged output of the dithered ADC with its sinusoidal input (many thousands records are necessary for the measurement). The reported data make it apparent that, when dealing with dithered ADCs, the FFT test can be much more accurate. The error is practically negligible (below 0.05 LSB) in almost all the points of the static characteristic (see especially Figs. 4 and 5), while larger errors are possible near large jumps in the INL of the converter (see, especially, Fig. 6). It is worth highlighting that, testing dithered converters, approximates the total static error in the conversion, and not merely the INL. This is a consequence of the disappearance of the quantization error. In evaluating the usefulness of the FFT test with dithered converters, one must consider two important facts.

4 ADAMO et al.: A/D CONVERTERS NONLINEARITY MEASUREMENT AND CORRECTION 1203 First, also in the case of ADC with dither, it is impossible to use the FFT test to certify the static error, that is, there is not a formula yielding the maximum difference between the true and the measured characteristic. One can only say, on the basis of the experience, that the test accuracy is usually good for many practical purposes. Second, the histogram test cannot be used directly to measure the characteristic of a dithered converter; so, the FFT test alternative can be convenient. After filtering or averaging, indeed, a dithered ADC has too many distinct output values (this is precisely the main goal of dithering), and the histogram test would require too many samples. On the other hand, if one does not filter the ADC output, the histogram test measures, not. Therefore, one can obtain only by smoothing [according to (5)] the characteristic obtained via histogram test. This procedure does not give much more guarantees than the FFT test, in terms of maximum measurement error. It must be highlighted that the same observations worked out for dithered converters apply to other resolution-enhancing techniques, like oversampling followed by filtering and decimation. Enhancing the resolution means to smear the static characteristic and to increase (usually by a large factor) the number of output codes. In this situation, especially if one does not have access to the ADC output before the filtering operations, the FFT test of nonlinearity appears to be the best choice. In few words, when measuring nonlinearity, the higher the resolution, the better the frequency-domain testing techniques with respect to statistical techniques. IV. LINEARIZATION OF DITHERED ADC USING CHEBYSHEV POLYNOMIALS Since the dither is a technique to correct static errors and enhancing the resolution, it is useful to examine the obtained performance increase, in terms both of maximum static error (Table I) and of number of effective bits (Table II). 1 It is clear that the achieved improvement is quite modest, especially if one thinks that dither would give, on a perfectly linear converter, a null static error and an infinite effective resolution. The problem, of course, lies in the residual large-scale nonlinearity that, as illustrated by Figs. 4 6, is not affected at all by dither. As a consequence, a great increase in the accuracy performance of a dithered converter can be expected by a proper linearization. This topic needs a brief discussion. In an ADC without dither, the static error can be minimized using a look-up table that substitutes each output code with a new value, equal to the arithmetic mean of the two threshold levels relevant to that code. It can be demonstrated that this procedure is optimal and removes the invertible part of the static error, so that the residual error is due to its noninvertible part (differential nonlinearity and quantization) [8]. To construct the look-up table, the accurate measurement of the threshold levels, and, therefore, many hours of test for a high-resolution ADC are, of course, necessary. 1 Effective bits are evaluated taking into account only the static systematic error, since we want to investigate on the effect of dithering on this specific error. The true effective resolution of the actual ADCs without dither is distinctly smaller, due to amplitude and time noise, which are not considered here. TABLE I MAXIMUM STATIC ERROR OF THE TESTED ADCs, WITHOUT AND WITH DITHER TABLE II NUMBER OF EFFECTIVE BITS OF THE TESTED ADCs, WITHOUT AND WITH DITHER Linearizing dithered converters is a slightly different matter. A look-up table can be used also in this case, but the substitution of the original output codes with the corrected ones must be performed before the final averaging (or filtering) operation that removes the dither signal. Constructing a look-up table to be used after averaging is totally unpractical, because of the huge number of the possible distinct output values (which is precisely the main goal of the dither technique). If one wants to perform the linearization after averaging, a look-up table is not needed, but a linearizing function, which must be easily computable for any value in the full-scale range of the ADC, is necessary. Having an (invertible) estimate of the true dithered characteristic, the linearizing function is of course, i.e. The technique of linearizing after averaging is attractive because obtaining can be, as seen in Section III, extremely simpler and faster than measuring the threshold levels of the undithered converters. It must be considered that the estimate yielded by the sum (4) of Chebyshev polynomials, being smoother than the true, in most practical cases, will be invertible and could, therefore, be employed, as indicated by (6). The problem is that a simple analytical way of inverting (4) cannot be seen, and, therefore, using (6) implies finding the numerical solution of the nonlinear equation for each output sample. This seems to be a heavy computational burden, but it is, in fact, a very simple and quick task, provided that the particular nature of is exploited. The function indeed, being a good approximation of the static characteristic of a dithered ADC, is certainly very close to a simple straight line with slope. This circumstance suggests searching for the solution of (7) iteratively; the initial guess can be, and the successive approximations can be evaluated with the updating rule, being (6) (7) (8)

5 1204 IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT, VOL. 52, NO. 4, AUGUST 2003 TABLE III NUMBER OF EFFECTIVE BITS OF THE TESTED ADCs, WITH DITHER AFTER LINEARIZATION Fig. 7. Plot of the residual error h (h(x)) 0 x, for n =1,2 (data refer to the actual 12-bit ADC). This procedure is a sort of a Newton s method, where the first derivative is substituted with the constant (it is, therefore, sometimes referred to as constant direction method ). It is mandatory now to pose two questions, which are critical for the practical use of (8). 1) Is the convergence of the method assured? 2) How many iterations, how many operations, and how much time are needed to reach an accurate enough solution? The answers, actually, encourage the use of the method (8). Regarding the first question, a well-known convergence condition is, which is equivalent to say that This inequality is true if does not have too sudden variations; in other words, it is a smoothness condition on.even if the condition could be false for an ADC with a very strange, this is very unlikely to happen for a real-word converter, if approximates well. Regarding the second question, once again, the shape of, which is a straight line with very small distortions, helps much. Let us define the approximation of obtained by performing iterations, i.e. (9) (10) In Fig. 7, the residual error is reported for and. The maximum residual error is in the first case, and in the second. In order to reach a very accurate correction, therefore, there is no need for many operations: executing only one or two iterations is sufficient. This also eliminates the necessity of checking a convergence condition to stop the algorithm. The overall computational cost of the proposed linearization method is quite reasonable: one iteration is equivalent to calculate one arccosine, the linear combination of cosines, one division, and two subtractions. Although it certainly is not as cheap as a simple substitution in a look-up table, it is not a great computational burden, for example, in a virtual instrument running on a modern PC. The performance, as of the proposed linearization technique, in terms of effective number of bits, is illustrated by Table III. The table shows that the achieved performance depends (quite weakly) on the number of harmonics considered in reconstructing the static characteristic. Considering more harmonics lead generally to a more accurate correction of the linearity and therefore to slightly better performance, but it must be considered also that a higher number of terms in implies also more computational burden. The most significant information derivable from the table, however, is that the proposed method does not give, of course, the infinite resolution that would be achieved by a perfect linearization, but assures an increase of 1 2 effective bits (6 12 db). V. CONCLUSION In this paper, the measurement of the static characteristic of A/D converters via the FFT test has been reviewed, referring both to ordinary and dithered ADCs. Also, a new linearization method, based on the parametric expression of the characteristic yielded by the FFT test (a sum of Chebyshev polynomials), has been presented. According to the obtained results, relevant to a simulated and two actual ADCs, some clear conclusions can be drawn. First, determining the static characteristic of an ADC via the FFT test cannot be accurate enough to assess, for example, the maximum static error; this quantity must be determined using the far more accurate statistical approach. On the other hand, the FFT test is practically instantaneous, regardless of the ADC resolution, while the histogram test can last hours with highresolution ADCs. Second, the FFT test can be distinctly more accurate on dithered ADCs, because of their smoother characteristic. Since, for these ADCs, the histogram test is a more complicated procedure (the result must be convolved with the pdf of the dither), the FFT test becomes more attractive, in this case.

6 ADAMO et al.: A/D CONVERTERS NONLINEARITY MEASUREMENT AND CORRECTION 1205 Third, the proposed linearization procedure, which makes use of the result yielded by the FFT test, and is especially suited for use together with the dither technique, can be implemented very simply and gives good results. It assures the gain of 1 2 effective bits for a small computational burden. Summing up, the illustrated frequency-domain approach to the measurement and the correction of static errors, far from being optimal as regards accuracy, is extremely fast and simple, and especially promising for high-resolution and dithered converters. It can certainly be implemented, with very little effort and very good results, in possibly any computer-based instruments, especially virtual instruments running on ordinary personal computers. REFERENCES [1] Standard for Digitizing Waveform Recorders, IEEE Std. 1057/94, Dec [2] A. J. E. M. Janssen, Fourier Analysis and Synthesis for a Mildly Non- Linear Quantizer, Philips Corp. Nat. Lab., Rep. UR 801/99. [3] F. Adamo, F. Attivissimo, and N. Giaquinto, Measurement of ADC integral nonlinearity via DFT, in Proc. IWADC, Vienna, Austria, Sept. 2000, pp [4] F. Adamo, F. Attivissimo, N. Giaquinto, and M. Savino, FFT test of A/D converters to determine the integral nonlinearity, IEEE Trans. Instrum. Meas., vol. 51, pp , Oct [5] J. Holub and O. Aumala, Large scale error reduction in dithered ADC, in Proc. IWADC, Vienna, Austria, Sept. 2000, pp [6] F. Adamo, F. Attivissimo, N. Giaquinto, and M. Savino, Measuring the static characteristic of dithered A/D converters, Comput. Stand. Interfaces, [7] National Instruments, Measurement and Automation Catalog, [8] N. Giaquinto, M. Savino, and A. Trotta, Detection, digital correction and global effect of A/D converters nonlinearities, in Proc. IWADC, Bratislava, Slovak Republic, May 1996, pp Francesco Adamo received the M.S. degree in electronic engineering from the Polytechnic of Bari, Bari, Italy, in He is currently pursuing the Ph.D. degree at the Department of Electrics and Electronics, Polytechnic of Bari. His research interests are in the field of electronic measurement on devices and systems, with special regard to digital signal processing for measurements, ADC modeling, characterization and optimization, and computer-based measurement systems. Dr. Adamo is a member of the Italian Group of Electrical and Electronic Measurements (GMEE). Filippo Attivissimo received the M.S. degree in electronic engineering and the Ph.D. degree in electric engineering from the Polytechnic of Bari, Bari, Italy, in 1992 and 1997, respectively. Since 1993, he has worked on research projects in the field of digital signal processing for measurements with the Polytechnic of Bari, where he is presently an Assistant Professor with the Department of Electrics and Electronics. His research interests are in the field of electric and electronic measurement on devices and systems, including estimation theory, ultrasonic sensors, digital measurements on power electronic systems, spectral analysis, and ADC modeling, characterization, and optimization. Dr. Attivissimo is a member of the Italian Group of Electrical and Electronic Measurements (GMEE). Nicola Giaquinto received the M.S. and Ph.D. degrees in electronic engineering from the Polytechnic of Bari, Bari, Italy, in 1992 and 1997, respectively. Since 1993, he has been in the field of electrical and electronic measurements, doing research mainly in the field of digital signal processing for measurement systems. From 1997 to 1998, he has been with the Casaccia Research Center, Rome, Italy, as a grant-holder of the Italian Agency for New Technologies (ENEA), concerned with real-time geometric measurements for autonomous robots. In 1998, he re-joined the Polytechnic of Bari, where he is an Assistant Professor of electric and electronic measurements. His main research interests are in the field of statistical, time-domain and frequency domain methods for nonlinear systems characterization, A/D converters modeling, characterization and optimization, parametric and nonparametric methods for spectral analysis, ultrasonic sensors, and neural networks for computer vision. Dr. Giaquinto is a member of the Italian Group of Electrical and Electronic Measurements (GMEE). Amerigo Trotta (M 92) received the M.S. and Ph.D. degrees in electrical engineering from the State University of Bari, Bari, Italy, in 1984 and 1989, respectively. He was an on-board avionics maintance technical officer in the Italian Air Force for one year, then an Assistant Professor of electrical measurements at the Polytechnic of Bari until In November 1998, he joined the University of Lecce, Lecce, Italy, as an Associate Professor of electronic measurements, where he has been Full Professor since His research activity has concerned optimization of spectral estimation algorithms for monitoring power systems and diagnostics of electrical drives, design of digital filters to increase performance of digital instrumentation, characterization of A/D converters through statistical, time-domain, and frequency-domain procedures, and DSP techniques for frequency measurements on signals. In addition, he coordinates a doctoral course for information engineering. Dr. Trotta is a member of the Italian Electrotechnical and Electronic Association (AEI) and the Italian Group of Electrical and Electronic Measurement (GMEE).