Optimal Scheduling and Controller Synthesis. Kim G. Larsen

Size: px
Start display at page:

Download "Optimal Scheduling and Controller Synthesis. Kim G. Larsen"

Transcription

1 Optimal Scheduling and Controller Synthesis Kim G. Larsen

2 Collaborators Wang Yi Paul Pettersson John Håkansson Anders Hessel Pavel Krcal Leonid Mokrushin Kim G Larsen Gerd Behrman Arne Skou Brian Nielsen Alexandre David Jacob Illum Rasmussen Marius Mikucionis Emmanuel Fleury, Didier Lime, Johan Bengtsson, Fredrik Larsson, Kåre J Kristoffersen, Tobias Amnell, Thomas Hune, Oliver Möller, Elena Fersman, Carsten Weise, David Griffioen, Ansgar Fehnker, Frits Vandraager, Theo Ruys, Pedro D Argenio, J-P Katoen, Jan Tretmans, Judi Romijn, Ed Brinksma, Martijn Hendriks, Klaus Havelund, Franck Cassez, Magnus Lindahl, Francois Laroussinie, Patricia Bouyer, Augusto Burgueno, H. Bowmann, D. Latella, M. Massink, G. Faconti, Kristina Lundqvist, Lars Asplund, Justin Pearson...

3 Real Time Systems Informationsteknologi Plant Continuous Eg.: Realtime Protocols Pump Control Air Bags Robots Cruise Control ABS CD Players Production Lines sensors actuators Controller Program Discrete Real Time System A system where correctness not not only only depends on on the the logical order of of events but but also also on on their their timing!!

4 Real Time Model Checking Informationsteknologi Plant Continuous Model of environment (user-supplied / non-determinism) b a c b a c sensors actuators UPPAAL Model 4 Controller Program Discrete Model of tasks (automatic?) 1 2 SAT φ a?? b c 3 4

5 Real Time Scheduling & Control Synthesis Informationsteknologi Plant Continuous Model of environment (user-supplied) b a c b a c sensors actuators Controller Program Discrete?? Partial UPPAAL Model Synthesis of tasks/scheduler (automatic) SAT φ!! SAT a φ!! b c

6 Overview Informationsteknologi Real Time Scheduling Timed Automata Verification Engine Optimal Scheduling Priced Timed Automata Applications: Task Graph Scheduling Optimal FPGA layout Dynamic Voltage Scaling Real Time Controller Synthesis Timed Game Automata Controller Synthesis Applications: Brick Sorting Climate Control CLASSIC CORA TIGA

7 Timed Automata [Alur & Dill 89] Informationsteknologi Resource Reset Invariant Synchronization Guard Semantics: ( Idle, x=0 ) ( Idle, x=2.5) ( InUse, x=0 ) ( InUse, x=5) ( Idle, x=5) ( Idle, x=8) ( InUse, x=0 ) d(2.5) use? d(5) done! d(3) use?

8 Composition Informationsteknologi Resource Synchronization Shared variable Semantics: ( Idle, Init, B=0, x=0) ( Idle, Init, B=0, x= ) ( InUse, Using, B=6, x=0 ) ( InUse, Using, B=6, x=6 ) ( Idle, Done, B=6, x=6 ) Task d(3) use d(6) done

9 Jobshop Scheduling Informationsteknologi J O B s Kim Maria Nicola Sport 2. 5 min min 4. 1 min R E S O U R C E S Economy 4. 1 min min min Local News 3. 3 min 3. 1 min min Problem: compute the minimal MAKESPAN Comic Stip min 4. 1 min min

10 Jobshop Scheduling in UPPAAL Informationsteknologi Kim Maria Sport 2. 5 min min Economy 4. 1 min min Local News 3. 3 min 3. 1 min Comic Stip min 4. 1 min Nicola 4. 1 min min min min

11 Experiments [TACAS 2001] B-&-B algorithm running for 60 sec. Informationsteknologi m=5 m=10 j=10 j=15 j=20 j=10 j=15 Lawrence Lawrence Job Job Shop Shop Problems Problems

12 Symbolic Transitions using Zones Informationsteknologi x>3 a y:=0 n m y y x x 1<=x<=4 1<=y<=3 delays to conjuncts to projects to y y x x 1<=x, 1<=y -2<=x-y<=3 3<x, 1<=y -2<=x-y<=3 3<x, y=0 Thus Thus (n,1<=x<=4,1<=y<=3) =a =a => => (m,3<x, y=0) y=0)

13 Forward Rechability Init -> Final? Informationsteknologi Waiting n,z Init n,z m,u Passed Final INITIAL Passed := Ø; Waiting := {(n0,z0)} REPEAT - pick (n,z) in Waiting - if for some Z Z (n,z ) in Passed then STOP -else/explore/ add { (m,u) : (n,z) => (m,u) } to Waiting; Add (n,z) to Passed UNTIL Waiting = Ø or Final is in Waiting

14 Canonical Datastructures for Zones Informationsteknologi x1-x2<=4 x1-x2<=4 x2-x1<=10 x2-x1<=10 x3-x1<=2 x3-x1<=2 x2-x3<=2 x2-x3<=2 x0-x1<=3 x0-x1<=3 x3-x0<=5 x3-x0<=5 3 x1 x x2 x3 Shortest Path Reduction O(n^3) x1 2 Shortest Path Closure O(n^3) -4 x2 2 3 x1 DBMs Bellmann x x0 1 x3 5 2 Space worst O(n^2) practice O(n) x0 x3 Minimal Constraint Form RTSS 97

15 Datastructures for Zones Informationsteknologi Difference Bounded Matrices (DBMs) Minimal Constraint Form [RTSS97] Clock Difference Diagrams [CAV99] PW List [SPIN03] x1 x2 x x3 2

16 Datastructures for Zones Informationsteknologi Difference Bounded Matrices (DBMs) Minimal Constraint Form [RTSS97] Clock Difference Diagrams Alexandre David [CAV99] PW List [SPIN03] -4 x1 x Elegant x0 RUBY 1bindings x3 for easy implementations 5

17 Informationsteknologi Task Graph Scheduling Optimal Static Task Scheduling Task P={P 1,.., P m } Machines M={M 1,..,M n } Duration Δ : (P M) N < : p.o. on P (pred.) A task can be executed only if all predecessors have completed Each machine can process at most one task at a time Task cannot be preempted. 16,10 2,3 P 2 P 1 2,3 6,6 10,16 P 6 P 3 P 4 P 7 P 5 2,2 8,2 M = {M 1,M 2 }

18 Informationsteknologi Task Graph Scheduling Optimal Static Task Scheduling Task P={P 1,.., P m } Machines M={M 1,..,M n } Duration Δ : (P M) N < : p.o. on P (pred.) 16,10 2,3 P 2 P 1 2,3 6,6 10,16 P 6 P 3 P 4 P 7 P 5 2,2 8,2 M = {M 1,M 2 }

19 Experimental Results Informationsteknologi Abdeddaïm, Kerbaa, Maler

20 Optimal Task Graph Scheduling Power-Optimality Informationsteknologi Energy-rates: C : M NxN P 2 P 1 16,10 2,3 2,3 cost ==1 6,6 10,16 P 6 P 3 P 4 cost ==4 P 7 P 5 2,2 8,2 1W 4W 2W 3W

21 Priced Timed Automata Timed Automata + COST variable Behrmann, Fehnker, et all (HSCC 01) Alur, Torre, Pappas (HSCC 01) Informationsteknologi cost rate TRACES l l 1 2 x 2 l 3 3 y 0 y 4 c =4 c =2 x:=0 c+=4 c+=1 ε(3) x:=0 y 4 (l 1,x=y=0) (l 1,x=y=3) (l 2,x=0,y=3) (l 3,_,_) ε(2.5) cost update (l 1,x=y=0) (l 1,x=y=2.5) (l 2,x=0,y=2.5) (l 2,x=0.5,y=3) (l 3,_,_) ε(3) (l 1,x=y=0) (l 2,x=0,y=0) (l 2,x=3,y=3) (l 2,x=0,y=3) (l 3,_,_) ε(.5) c=17 c=16 c=11

22 Priced Timed Automata Timed Automata + COST variable Behrmann, Fehnker, et all (HSCC 01) Alur, Torre, Pappas (HSCC 01) Informationsteknologi cost rate TRACES l l 1 2 x 2 l 3 3 y 0 y 4 c =4 c =2 x:=0 c+=4 c+=1 ε(3) x:=0 y 4 (l 1,x=y=0) (l 1,x=y=3) (l 2,x=0,y=3) (l 3,_,_) ε(2.5) Problem : Find the minimum cost of of reaching location ll 3 cost update (l 1,x=y=0) (l 1,x=y=2.5) (l 2,x=0,y=2.5) (l 2,x=0.5,y=3) (l 3,_,_) ε(3) (l 1,x=y=0) (l 2,x=0,y=0) (l 2,x=3,y=3) (l 2,x=0,y=3) (l 3,_,_) ε(.5) Efficient Implementation: CAV 01 and and TACAS c=17 c=16 c=11

23 Aircraft Landing Problem Informationsteknologi cost e*(t-t) E d+l*(t-t) Planes have to keep separation distance to avoid turbulences caused by preceding planes T L t E earliest landing time T target time L latest time e cost rate for being early l cost rate for being late d fixed cost for being late Runway

24 Modeling ALP with PTA Informationsteknologi Planes have to keep separation distance to avoid turbulences caused by preceding planes 129: Earliest landing time 153: Target landing time 559: Latest landing time 10: Cost rate for early 20: Cost rate for late Runway handles 2 types of planes Runway

25 Symbolic A*

26 Zones Operations Informationsteknologi y Z x

27 Priced Zone CAV 01 y Informationsteknologi Δ 4 2 Cost ( x, y) -1 Z x = 2 y x + 2

28 Branch & Bound Algorithm Informationsteknologi

29 Branch & Bound Algorithm Informationsteknologi Z' Z Z Z is isbigger & cheaper cheaperthan thanzz is is a well-quasi well-quasi ordering orderingwhich guarantees guarantees termination! termination!

30 Experimental Results

31 Aircraft Landing CAV 01 Source of examples: Baesley et al 2000 Informationsteknologi

32 Branch & Bound Algorithm Informationsteknologi Zone based Linear Programming Problems

33 Zone LP Min Cost Flow Exploiting duality Informationsteknologi minimize 3x 1-2x 2 +7 when x 1 -x x 2 3 x 2 1 minimize 3y 2,0 -y 0,2 +y 1,2 y 0,1 when y 2,0 -y 0,1 -y 0,2 =1 y 0,2 +y 1,2 =2 y 0,1 -y 1,2 =-3

34 Aircraft Landing Using MCF/Netsimplex Rasmussen, Larsen, Subramani TACAS04 Informationsteknologi

35 Dynamic Voltage Scaling UC b

36 Performance vs Ressource-Efficiency? Consumer constantly demand better functionality, flexibility, availability,.. increase in resources needed: Time Energy Memory Bandwidth.. Application of CUPPAAL to modeling, analysis and synthesis of resourceefficient schedules for realtime systems.

37 Power Management Dynamic Voltage Scaling

38 Energy in Processor Power consumption mainly by dynamic power energy A non-experts understanding of CMOS P E dynamic dynamic = C L pr. cycle V = 2 dd C L f clk V 2 dd Supply voltage reduction => decreased frequency delay V dd f clk ~ V ( α -1) dd ; α > 1 V dd We may miss deadlines

39 Task Scheduling utilization of CPU P(i), [E(i), L(i)],.. : period or earliest/latest arrival or.. for T i C(i): execution time for T i D(i): deadline for T i T 1 T 2 ready done Scheduler T n stop run T 2 is running { T 4, T 1, T 3 } ready ordered according to some given priority: (e.g. Fixed Priority, Earliest Deadline,..)

40 Modeling Task T 1 1 T 2 2 T n n ready done stop run Scheduler

41 Modeling Scheduler T 1 1 T 2 2 T n n ready done stop run Scheduler

42 Modeling Queue T 1 1 T 2 2 T n n ready done stop run Scheduler

43 Schedulability = Safety Property May be extended with preemption (Task0.Error or Task1.Error or ) A (Task0.Error or Task1.Error or )

44 Energy Optimal Scheduling Using Priced Timed Automata T 1 1 T 2 2 ready done Scheduler T n n stop run F:=?? ; V:=?? Choose Scaling/Cost (Freq/Voltage) C

45 Cost Optimal Scheduling = Optimal Infinite Path Informationsteknologi σ c 3 c n c 1 c 2 t 3 t n t 1 t 2 (Car0.Err or Car1.Err or ) Accumulated cost Accumulated time Value of path σ: val(σ) = lim n c n /t n Optimal Schedule σ * : val(σ * ) = inf σ val(σ)

46 Cost Optimal Scheduling = Optimal Infinite Path σ c 3 c n t 1 t 2 t 3 t n (Car0.Err or Car1.Err or ) Accumulated cost Accumulated time THEOREM: THEOREM: σ σ * * is is computable computable Bouyer, Brinksma, Larsen HSCC 04 Value of path σ: val(σ) = lim n c n /t n Informationsteknologi Optimal Schedule σ * : val(σ * ) = inf σ val(σ)

47 Approximate Optimal Schedule T<N T<N X X T<N X Optimal infinite schedule modulo cost-horizon T>=N T>=N C=M C=M C=M C=M E[] (not (Task0.Error or Task1.Error or Task2.Error) and (cost>=m imply time >= N)) = E[] φ(m,n) σ ² [] φ(m,n) imply val(σ) M/N

48 Preliminary Results P 1 =D 1 =32 C 1 =6 P 2 =D 2 =48 C 2 =18 P 3 =D 3 =64 C 3 =12 EDF w preemption no DVS: avr.: 48

49 Preliminary Results Cost horizon: 2,000 P 1 =D 1 =32 C 1 =6 P 2 =D 2 =48 C 2 =18 P 3 =D 3 =64 C 3 =12 EDF w preemption w DVS: avr.: 43.37

50 Optimal Reconfiguration of FPGA Introducing new features of UPPAAL 4.0 User-defined functions Types Select UC b

51 Field Programmable Gate Array

52 The Problem

53 The Problem

54 Example

55 Example

56 Example

57 Example 1

58 Example 1

59 UPPAAL Model Informationsteknologi

60 UPPAAL Model Informationsteknologi

61 UPPAAL Model Informationsteknologi

62 UPPAAL Model Informationsteknologi

63 TIGA Real Time Controller Synthesis with Franck Cassez, Agnes Counard, Alexandre David Emmanuel Fleury, Didier Lime

64 Controller Synthesis and Timed Games Production Cell GIVEN System moves S, Controller moves C, and property φ FIND strategy s C such that s C S ² φ A Two-Player Game

65 Untimed and Timed Games Reachability / Safety Games x>1 1 x<1 x 1 2 x 2 x<1 3 x:=0 x 1 4 Uncontrollable Controllable

66 Untimed Games Reachability / Safety Games Strategy: F : Run(A) E c Memoryless strategy: F : Q E c Winning Run: States(ρ) G Ø States(ρ) G = Ø Winning Strategy: Runs(F) WinRuns Uncontrollable Controllable

67 Untimed Games Reachability / Safety Games Strategy: F : Run(A) E c Memoryless strategy: F : Q E c Winning Run: States(ρ) G Ø States(ρ) G = Ø Winning Strategy: Runs(F) WinRuns Uncontrollable Controllable

68 Untimed Games Reachability / Safety Games Strategy: F : Run(A) E c Memoryless strategy: F : Q E c Winning Run: States(ρ) G Ø States(ρ) B = Ø Winning Strategy: Runs(F) WinRuns Loosing (memoryless) strategy Uncontrollable Controllable

69 Untimed Games Reachability / Safety Games Strategy: F : Run(A) E c Memoryless strategy: F : Q E c Winning Run: States(ρ) G Ø States(ρ) B = Ø Winning Strategy: Runs(F) WinRuns Winning (memoryless) strategy) Uncontrollable Controllable

70 Untimed Games Backwards Fixed-Point Computation cpred(x) = { q Q q X. q c q } upred(x) = { q Q q X. q u q } π(x) = cpred(x) \ upred(x C ) ] Theorem: The set of winning states is obtained as the least fixpoint of the function: X a π(x) Goal Uncontrollable Controllable

71 Untimed Games Backwards Fixed-Point Computation cpred(x) = { q Q q X. q c q } upred(x) = { q Q q X. q u q } π(x) = cpred(x) \ upred(x C ) ] Theorem: The set of winning states is obtained as the least fixpoint of the function: X a π(x) Goal Uncontrollable Controllable

72 Timed Games Reachability / Safety Games Strategy: F : Run(A) E c λ Memoryless strategy: F : Q E c λ x>1 1 x 1 x<1 Winning Run: States(ρ) G Ø States(ρ) G = Ø 2 3 x<1 x 2 x:=0 Winning Strategy: Runs(F) WinRuns x 1 4 Uncontrollable Controllable

73 Timed Games Reachability / Safety Games Strategy: F : Run(A) E c λ Memoryless strategy: F : Q E c λ x>1 1 x 1 x!= 1 : λ x=1 : c x<1 Winning Run: States(ρ) G Ø States(ρ) G = Ø x<2 : λ x 2 : c 2 3 x<1 x 2 x:=0 Winning Strategy: Runs(F) WinRuns x 1 4 x<1 : λ x 1 : c Winning (memoryless) strategy) Uncontrollable Controllable x!= 1 : λ x=1 : c

74 Timed Games State-of-the-Art Backwards Fixed-Point Computation Definitions cpred(x) = { q Q q X. q c q } upred(x) = { q Q q X. q u q } Pred t (X,Y) = { q Q t. q t X and s t. q s Y C } π(x) = Pred t [ X cpred(x), upred(x C ) ] X Pred t (X,Y) Y Theorem: The set of winning states is obtained as the least fixpoint of the function: X a π(x) Goal

75 Timed Games State-of-the-Art Backwards Fixed-Point Computation x>1 1 x<1 x 1 2 x 2 x<1 3 x:=0 x We want Forward and On-The-Fly Algorithm in order to avoid constructing all (backwards) reachable state-space and to allow for discrete variables (e.g. in UPPAAL)

76 On-the-fly Algorithms for Timed Games UPPAAL Tiga = on-the-fly algorithm for timed games [CONCUR 05] S Win(S)

77 Running Example

78 Production Cell

79 Experimental Results

80 New Experimental Results Using UPPAAL 4.0 architecture Tricks (Alexandre): - UPPAAL pipeline architecture, which implies * active clock reduction * PW-list * UPPAAL optimizations (successor computation, postponed evaluation, reduced copies..) * improved DBM library * improved copy-on-write implementations * improved subtraction (vital) * enormously improved merge (between DBMs) (vital)

81 A Buggy Brick Sorting Program First UPPAAL model Sorting of Lego Boxes eject Ken Tindell Boxes Piston eject remove 99 Conveyer Belt Conveyer Belt Blck Yel Black Controller MAIN PUSH Yellow Exercise: Design Controller so that only yellew boxes are being pushed out MCD 2001, Twente Kim G. Larsen 16

82 Brick Sorting Generic Plate Piston Controller

83 Brick Sorting Generic Plate Strategy for EJECT Piston Controller

84 Balancing Plates / Timed Automata A Plate The Joggler E (Plate1.Bang or Plate2.Bang or )

85 Balancing Plates / Time Uncertainty Strategy BDD/CDD

86 Timed Games and Test Generation Tidle=20 Tsw=4 + Time Uncertainty + Uncontrollable output + Input Enabledness + Determinism Off-line test-case generation = Compute winning strategy for reaching Bright

87 A trick light control Tidle=20 Tsw=4 How to test for Bright? E<> (control: A<> Bright) or <<c,u>> (<<c>> Bright)

88 By Jan J. Jessen Jacob I. Rasmussen Climate Control

89 Climate Control

90 Climate Control / Neighbor Neighboring zone Neighbor wants to receive flow? Temperature in neighbor zone (lower/higher)

91 Zone Controller Climate Control / Controller

92 Zone Controller Climate Control / Controller

93 Obtaining executable code Stragegy get0 give0 give0 1 temp0 temp0 temp0 get1 get1 get1 get1 give1 give1 give1 give1 temp1 temp1 temp1 objective hottest objective hottest humid0 humid0 humid1 humid1 humid1 humid1 have0 want0 have1 want1 inlet outlet heater dec_humid have0 have0 want0 want0 have1 want1 inlet outlet heater have1 want1 inlet outlet humid0 objective humid1 humid1 dec_humid have0 have0 dec_humid want0 want0 have1 want1 have1 want1 humid0 humid1 humid1 dec_humid have0 want0 have1 want1 inlet objective hottest humid0 humid1 humid1 dec_humid have0 want0 have1 temp1 temp1 temp1 hottest hottest hottest objective humid0 humid1 humid1 dec_humid hottest give1 give1 give1 give1 temp1 temp1 temp1 objective hottest objective hottest humid0 humid1 humid1 dec_humid have0 have0 want0 want0 dec_humid humid0 objective humid1 humid1 dec_humid have0 have0 dec_humid want0 want0 dec_humid humid0 humid1 humid1 dec_humid have0 want0 dec_humid objective hottest humid0 humid1 humid1 dec_humid have0 want0 dec_humid temp1 temp1 temp1 hottest hottest hottest hottest objective objective humid0 humid1 humid1 humid0 humid1 humid1 dec_humid objective objective objective humid0 humid1 humid1 dec_humid have0 dec_humid want0 have1 want1 humid0 humid0 humid1 humid1 dec_humid dec_humid humid1 dec_humid dec_humid hottest hottest objective objective humid0 humid1 humid1 dec_humid have0 want0 have1 humid0 humid1 humid1 dec_humid get1 get1 give1 give1 give1 give1 temp1 temp1 temp1 objective hottest objective hottest humid0 humid1 humid1 dec_humid have0 humid0 objective humid1 humid1 dec_humid have0 dec_humid humid0 humid1 humid1 dec_humid have0 objective hottest humid0 humid1 humid1 dec_humid have0 temp1 temp1 temp1 hottest hottest hottest objective humid0 humid1 humid1 dec_humid hottest 1296 cases BDD 289 nodes

94 u u u Obtaining executable code [T2] [H1] [H3] [H2] SafeT1 SafeH1 SafeT2 SafeH2 T1 T2 [Q_12]^+_2 [Q_12]^ _2 T objective H1 H2 H objective T1 T2 T3 [Q_12]^+_1 [Q_12]^ _1 [Q_23]^+_3 [Q_23]^ _3 T objective H1 H2 H3 H objective state Qout Qin [Q_12]^+_1 [Q_12]^ _1 Left zone controller state Qout Qin [Q_12]^+_2 [Q_12]^ _2 [Q_23]^+_2 [Q_23]^ _2 Middle Zone Controller [u2] [T2] T2 [T3] T3 state [Q_23]^+_2 Qout [Q_23]^ _2 Qin T objective [H2] SafeT3 H2 [H3] H3 [Q_23]^+_3 [u3] SafeH3 H objective [Q_23]^ _3 Right Zone Controller 16.5 [H1] [H2] [T2] [T1] [T3] [u1] 15 Simulink T 1 T 2 T 3 [T1] qout1 Qout1 qin1 q12p1 Qin1 q12m1 qout2 Q12 qin2 q12p2 Qout2 q12m2 Qin2 q23p2 q23m2 Q23 qout3 qin3 Qin3 q23p3 q23m3 Qout3 Flow Calc [T1] [T2] [T3] Ttotal [H1] [H2] [H3] Htotal q12 q23 [T2] Amb T&H amb [T1] [H1] [T3] [H3] [T2] [H2] [u1] [u2] [H2] [u3] qout1 qin1 T1 q12 T2 H2 Amb H1 u1 First Zone Dynamics q12 qout2 qin2 T2 u2 q23 T1 H1 T3 H3 H2 Amb Middle Zone Dynamics q23 T2 T3 H2 qin3 qout3 Amb H3 u3 Third Zone Dynamics [T1] [H1] [T2] [H2] [T3] [H3]

95 Reading material UPPAAL Cora (Priced Timed Automata): Buhrmann, Larsen, Rasmussen: Optimal Scheduling using Priced Timed Automata, ACM SIGMETRICS Performance Evaluation Review, vol. 32, nb. 4, 2005, pp , ACM Press. Priced Timed Automata: Algorithms, and Applications G. Behrmann, K. G. Larsen, J. I. Rasmussen. In proc. of FMCO'04, LNCS vol. 3657, pp , Springer Verlag, Patricia Bouyer. Weighted Timed Automata: Model-Checking and Games. In Proceedings of the 22nd Conference on Mathematical Foundations of Programming Semantics (MFPS'06), Genova, Italy, May 2006, ENTCS 158, pages Elsevier Science Publishers. UPPAAL Tiga (Timed Games & Controller Synthesis): Franck Cassez, Alexandre David, Emmanuel Fleury, Kim G. Larsen, and Didier Lime. Efficient on-the-fly algorithms for the analysis of timed games. CONCUR05, volume 3653 of Lecture Notes in Computer Science. Patricia Bouyer and Fabrice Chevalier. On the Control of Timed and Hybrid Systems. EATCS Bulletin 89, pages 79-96, Guided Controller Synthesis for Climate Controller using UPPAAL TIGA. Under Submission.

96

Optimal & Real Time Scheduling. using Model Checking Technology. Kim G. Larsen

Optimal & Real Time Scheduling. using Model Checking Technology. Kim G. Larsen Optimal & Real Time Scheduling using Model Checking Technology Kim G. Larsen AIPS a partial observation New community New faces New techniques April 2002 June 2005 IST-2001-35304 Academic partners: Nijmegen

More information

Timed Games and. Stochastic Priced Timed Games

Timed Games and. Stochastic Priced Timed Games STRATEGO Timed Games and TIGA Stochastic Priced Timed Games Synthesis & Machine Learning Kim G. Larsen Aalborg University DENMARK Overview Timed Automata Decidability (regions) Symbolic Verification (zones)

More information

Verification, Performance Analysis and Controller Synthesis of Real Time Systems. using UPPAAL. Kim Guldstrand Larsen

Verification, Performance Analysis and Controller Synthesis of Real Time Systems. using UPPAAL. Kim Guldstrand Larsen Verification, Performance Analysis and Controller Synthesis of Real Time Systems using UPPAAL Kim Guldstrand Larsen UPPAAL Branches Real Time Verification Real Time Scheduling & Performance Evaluation

More information

From Timed Automata to Stochastic Hybrid Games

From Timed Automata to Stochastic Hybrid Games From Timed Automata to Stochastic Hybrid Games Model Checking, Performance Evaluation and Synthesis Kim G. Larsen Aalborg University, DENMARK Aalborg Aalborg Aarhus Copenhagen Aalborg University leading

More information

Formal methods & Tools. UPPAAL Implementation Secrets. Kim Guldstrand Larsen & UCb

Formal methods & Tools. UPPAAL Implementation Secrets. Kim Guldstrand Larsen & UCb Formal methods & Tools UPPAAL Implementation Secrets Kim Guldstrand Larsen BRICS@Aalborg & FMT@Twente Collaborators @UPPsala Wang Yi Paul Pettersson Johan Bengtsson Fredrik Larsson Alexandre David Tobias

More information

Controller Synthesis with UPPAAL-TIGA. Alexandre David Kim G. Larsen, Didier Lime, Franck Cassez, Jean-François Raskin

Controller Synthesis with UPPAAL-TIGA. Alexandre David Kim G. Larsen, Didier Lime, Franck Cassez, Jean-François Raskin Controller Synthesis with UPPAAL-TIGA Alexandre David Kim G. Larsen, Didier Lime, Franck Cassez, Jean-François Raskin Overview Timed Games. Algorithm (CONCUR 05). Strategies. Code generation. Architecture

More information

Model-based. Verification, Optimization, Synthesis and Performance Evaluation of Real-Time Systems. Kim G. Larsen Aalborg University, DENMARK

Model-based. Verification, Optimization, Synthesis and Performance Evaluation of Real-Time Systems. Kim G. Larsen Aalborg University, DENMARK Model-based Verification, Optimization, Synthesis and Performance Evaluation of Real-Time Systems Kim G. Larsen Aalborg University, DENMARK Timed Automata.. and Prices, Games, Probabilities Kim G. Larsen

More information

Symbolic Real Time Model Checking. Kim G Larsen

Symbolic Real Time Model Checking. Kim G Larsen Smbolic Real Time Model Checking Kim G Larsen Overview Timed Automata Decidabilit Results The UPPAAL Verification Engine Datastructures for zones Liveness Checking Algorithm Abstraction and Compositionalit

More information

Timed Automata lllllllllll Decidability Results

Timed Automata lllllllllll Decidability Results Timed Automata lllllllllll Decidability Results Decidability? a c b OBSTACLE: Uncountably infinite state space Reachable? Stable Quotient Partitioning a c b y y x Reachable? x Stable Quotient Partitioning

More information

Verification and Performance Evaluation of Timed Game Strategies

Verification and Performance Evaluation of Timed Game Strategies Verification and Performance Evaluation of Timed Game Strategies Alexandre David 1, Huixing Fang 2, Kim G. Larsen 1, and Zhengkui Zhang 1 1 Department of Computer Science, Aalborg University, Denmark {adavid,kgl,zhzhang}@cs.aau.dk

More information

Timed Automata with Observers under Energy Constraints

Timed Automata with Observers under Energy Constraints Timed Automata with Observers under Energy Constraints Patricia Bouyer-Decitre Uli Fahrenberg Kim G. Larsen Nicolas Markey LSV, CNRS & ENS Cachan, France Aalborg Universitet, Danmark /9 Introduction The

More information

Reachability-Time Games on Timed Automata (Extended Abstract)

Reachability-Time Games on Timed Automata (Extended Abstract) Reachability-Time Games on Timed Automata (Extended Abstract) Marcin Jurdziński and Ashutosh Trivedi Department of Computer Science, University of Warwick, UK Abstract. In a reachability-time game, players

More information

Modelling Real-Time Systems. Henrik Ejersbo Jensen Aalborg University

Modelling Real-Time Systems. Henrik Ejersbo Jensen Aalborg University Modelling Real-Time Systems Henrik Ejersbo Jensen Aalborg University Hybrid & Real Time Systems Control Theory Plant Continuous sensors actuators Task TaskTask Controller Program Discrete Computer Science

More information

Patricia Bouyer-Decitre. Nicolas Markey

Patricia Bouyer-Decitre. Nicolas Markey Real-Time Model Checking Patricia Bouyer-Decitre Kim G. Larsen Nicolas Markey Timed Automata.. and Prices and Games Patricia Bouyer-Decitre Kim G. Larsen Nicolas Markey Model Checking System Description

More information

Embedded Systems 15. REVIEW: Aperiodic scheduling. C i J i 0 a i s i f i d i

Embedded Systems 15. REVIEW: Aperiodic scheduling. C i J i 0 a i s i f i d i Embedded Systems 15-1 - REVIEW: Aperiodic scheduling C i J i 0 a i s i f i d i Given: A set of non-periodic tasks {J 1,, J n } with arrival times a i, deadlines d i, computation times C i precedence constraints

More information

Job-Shop Scheduling Using Timed Automata

Job-Shop Scheduling Using Timed Automata Job-Shop Scheduling Using Timed Automata Yasmina Abdeddaïm and Oded Maler Verimag, CentreEquation 2, av. de Vignate 3861 Gières, France {Yasmina.Abdeddaim,Oded.Maler}@imag.fr Abstract. In this paper we

More information

UPPAAL tutorial What s inside UPPAAL The UPPAAL input languages

UPPAAL tutorial What s inside UPPAAL The UPPAAL input languages UPPAAL tutorial What s inside UPPAAL The UPPAAL inut languages 1 UPPAAL tool Develoed jointly by Usala & Aalborg University >>8,000 downloads since 1999 1 UPPAAL Tool Simulation Modeling Verification 3

More information

An introduction to Uppaal and Timed Automata MVP5 1

An introduction to Uppaal and Timed Automata MVP5 1 An introduction to Uppaal and Timed Automata MVP5 1 What is Uppaal? (http://www.uppaal.com/) A simple graphical interface for drawing extended finite state machines (automatons + shared variables A graphical

More information

Control Synthesis of Discrete Manufacturing Systems using Timed Finite Automata

Control Synthesis of Discrete Manufacturing Systems using Timed Finite Automata Control Synthesis of Discrete Manufacturing Systems using Timed Finite utomata JROSLV FOGEL Institute of Informatics Slovak cademy of Sciences ratislav Dúbravská 9, SLOVK REPULIC bstract: - n application

More information

Energy Centric Quantitative Model Checking

Energy Centric Quantitative Model Checking Energy Centric Quantitative Model Checking Kim G. Larsen Aalborg University DENMARK Axel Legay Inria FRANCE Partners Aalborg University, DK Kim G Larsen RWTH Aachen University, D Joost-Pieter Katoen Inria,

More information

Timed Control with Observation Based and Stuttering Invariant Strategies

Timed Control with Observation Based and Stuttering Invariant Strategies Author manuscript, published in "5th Int. Symp. on Automated Technology for Verification and Analysis (ATVA'07) 4762 (2007) 307--321" Timed Control with Observation Based and Stuttering Invariant Strategies

More information

arxiv: v1 [cs.lo] 1 Feb 2016

arxiv: v1 [cs.lo] 1 Feb 2016 Symbolic Optimal Reachability in Weighted Timed Automata Patricia Bouyer, Maximilien Colange, and Nicolas Markey LSV CNRS ENS Cachan arxiv:1602.00481v1 [cs.lo] 1 Feb 2016 Abstract. Weighted timed automata

More information

Robust Reachability in Timed Automata: A Game-based Approach

Robust Reachability in Timed Automata: A Game-based Approach Robust Reachability in Timed Automata: A Game-based Approach Patricia Bouyer, Nicolas Markey, and Ocan Sankur LSV, CNRS & ENS Cachan, France. {bouyer,markey,sankur}@lsv.ens-cachan.fr Abstract. Reachability

More information

large systems, and this might lead in the future to better algorithms for certain classes of scheduling problems. Even if they do not contribute to im

large systems, and this might lead in the future to better algorithms for certain classes of scheduling problems. Even if they do not contribute to im Job-Shop Scheduling using Timed Automata Yasmina Abdeddam and Oded Maler Verimag, Centre Equation, 2, av. de Vignate 3861 Gieres, France Yasmina.Abdeddaim@imag.fr Oded.Maler@imag.fr Abstract. In this paper

More information

Task Models and Scheduling

Task Models and Scheduling Task Models and Scheduling Jan Reineke Saarland University June 27 th, 2013 With thanks to Jian-Jia Chen at KIT! Jan Reineke Task Models and Scheduling June 27 th, 2013 1 / 36 Task Models and Scheduling

More information

for System Modeling, Analysis, and Optimization

for System Modeling, Analysis, and Optimization Fundamental Algorithms for System Modeling, Analysis, and Optimization Stavros Tripakis UC Berkeley EECS 144/244 Fall 2013 Copyright 2013, E. A. Lee, J. Roydhowdhury, S. A. Seshia, S. Tripakis All rights

More information

Distributing Timed Model Checking How the Search Order Matters

Distributing Timed Model Checking How the Search Order Matters Distributing Timed Model Checking How the Search Order Matters Gerd Behrmann 1, Thomas Hune 2, and Frits Vaandrager 3 1 Basic Research in Computer Science, Aalborg University Frederik Bajersvej 7E, 9220

More information

EECS 571 Principles of Real-Time Embedded Systems. Lecture Note #7: More on Uniprocessor Scheduling

EECS 571 Principles of Real-Time Embedded Systems. Lecture Note #7: More on Uniprocessor Scheduling EECS 571 Principles of Real-Time Embedded Systems Lecture Note #7: More on Uniprocessor Scheduling Kang G. Shin EECS Department University of Michigan Precedence and Exclusion Constraints Thus far, we

More information

QEES lecture 5. Timed Automata. Welcome. Marielle Stoelinga Formal Methods & Tools

QEES lecture 5. Timed Automata. Welcome. Marielle Stoelinga Formal Methods & Tools QEES lecture 5 Timed Automata Welcome Marielle Stoelinga Formal Methods & Tools Agenda 1. Solution to exercises 2. Timed Automata @ QEES content of 4 lectures 3. Formal definitions 4. Work on Assignment:

More information

From Timed Automata to Stochastic Hybrid Games

From Timed Automata to Stochastic Hybrid Games From Timed Automata to Stochastic Hybrid Games Model Checking, Performance Analysis, Optimization, Synthesis, and Machine Learning Kim G. Larsen Aalborg University, DENMARK CISS Center For Embedded Software

More information

Efficient On-the-fly Algorithms for the Analysis of Timed Games

Efficient On-the-fly Algorithms for the Analysis of Timed Games Efficient On-the-fly Algorithms for the Analysis of Timed Games Franck Cassez, Alexandre David, Emmanuel Fleury, Kim Guldstrand Larsen, Didier Lime To cite this version: Franck Cassez, Alexandre David,

More information

Towards the Complexity of Controls for Timed Automata with a Small Number of Clocks

Towards the Complexity of Controls for Timed Automata with a Small Number of Clocks Fifth International Conference on Fuzzy Systems and Knowledge Discovery Towards the Complexity of Controls for Timed Automata with a Small Number of Clocks Taolue Chen CWI PO Box 94079, 1090 GB Amsterdam,

More information

Directed Model Checking (not only) for Timed Automata

Directed Model Checking (not only) for Timed Automata Directed Model Checking (not only) for Timed Automata Sebastian Kupferschmid March, 2010 Model Checking Motivation Embedded Systems Omnipresent Safety relevant systems Pentium bug Ariane 5 Errors can be

More information

Real-time Systems: Scheduling Periodic Tasks

Real-time Systems: Scheduling Periodic Tasks Real-time Systems: Scheduling Periodic Tasks Advanced Operating Systems Lecture 15 This work is licensed under the Creative Commons Attribution-NoDerivatives 4.0 International License. To view a copy of

More information

Embedded Systems 14. Overview of embedded systems design

Embedded Systems 14. Overview of embedded systems design Embedded Systems 14-1 - Overview of embedded systems design - 2-1 Point of departure: Scheduling general IT systems In general IT systems, not much is known about the computational processes a priori The

More information

Scheduling Lecture 1: Scheduling on One Machine

Scheduling Lecture 1: Scheduling on One Machine Scheduling Lecture 1: Scheduling on One Machine Loris Marchal October 16, 2012 1 Generalities 1.1 Definition of scheduling allocation of limited resources to activities over time activities: tasks in computer

More information

As Soon As Probable. O. Maler, J.-F. Kempf, M. Bozga. March 15, VERIMAG Grenoble, France

As Soon As Probable. O. Maler, J.-F. Kempf, M. Bozga. March 15, VERIMAG Grenoble, France As Soon As Probable O. Maler, J.-F. Kempf, M. Bozga VERIMAG Grenoble, France March 15, 2013 O. Maler, J.-F. Kempf, M. Bozga (VERIMAG Grenoble, France) As Soon As Probable March 15, 2013 1 / 42 Executive

More information

Robust Controller Synthesis in Timed Automata

Robust Controller Synthesis in Timed Automata Robust Controller Synthesis in Timed Automata Ocan Sankur LSV, ENS Cachan & CNRS Joint with Patricia Bouyer, Nicolas Markey, Pierre-Alain Reynier. Ocan Sankur (ENS Cachan) Robust Control in Timed Automata

More information

Scheduling Lecture 1: Scheduling on One Machine

Scheduling Lecture 1: Scheduling on One Machine Scheduling Lecture 1: Scheduling on One Machine Loris Marchal 1 Generalities 1.1 Definition of scheduling allocation of limited resources to activities over time activities: tasks in computer environment,

More information

Minimum-Cost Reachability for. Priced Timed Automata?

Minimum-Cost Reachability for. Priced Timed Automata? Minimum-Cost Reachability for Priced Timed Automata? Gerd Behrmann 1, Ansgar Fehnker 3, Thomas Hune 2, Kim Larsen 1 Paul Pettersson 4, Judi Romijn 3, and Frits Vaandrager 3 1 Basic Research in Computer

More information

Networked Embedded Systems WS 2016/17

Networked Embedded Systems WS 2016/17 Networked Embedded Systems WS 2016/17 Lecture 2: Real-time Scheduling Marco Zimmerling Goal of Today s Lecture Introduction to scheduling of compute tasks on a single processor Tasks need to finish before

More information

CSE 380 Computer Operating Systems

CSE 380 Computer Operating Systems CSE 380 Computer Operating Systems Instructor: Insup Lee & Dianna Xu University of Pennsylvania, Fall 2003 Lecture Note 3: CPU Scheduling 1 CPU SCHEDULING q How can OS schedule the allocation of CPU cycles

More information

CIS 4930/6930: Principles of Cyber-Physical Systems

CIS 4930/6930: Principles of Cyber-Physical Systems CIS 4930/6930: Principles of Cyber-Physical Systems Chapter 11 Scheduling Hao Zheng Department of Computer Science and Engineering University of South Florida H. Zheng (CSE USF) CIS 4930/6930: Principles

More information

Layered Composition for Timed Automata

Layered Composition for Timed Automata Layered Composition for Timed Automata Ernst-Rüdiger Olderog and Mani Swaminathan Department of Computing Science University of Oldenburg, Germany {olderog, mani.swaminathan}@informatik.uni-oldenburg.de

More information

Timed Testing under Partial Observability

Timed Testing under Partial Observability Timed Testing under Partial Observability Alexandre David, Kim G. Larsen, Shuhao Li, Brian Nielsen Center for Embedded Software Systems (CISS) Aalborg University DK-9220 Aalborg, Denmark {adavid, kgl,

More information

models, languages, dynamics Eugene Asarin PIMS/EQINOCS Workshop on Automata Theory and Symbolic Dynamics LIAFA - University Paris Diderot and CNRS

models, languages, dynamics Eugene Asarin PIMS/EQINOCS Workshop on Automata Theory and Symbolic Dynamics LIAFA - University Paris Diderot and CNRS models, s, LIAFA - University Paris Diderot and CNRS PIMS/EQINOCS Workshop on Automata Theory and Symbolic Dynamics Context A model for verification of real-time systems Invented by Alur and Dill in early

More information

Liveness in L/U-Parametric Timed Automata

Liveness in L/U-Parametric Timed Automata Liveness in L/U-Parametric Timed Automata Étienne André and Didier Lime [AL17] Université Paris 13, LIPN and École Centrale de Nantes, LS2N Highlights, 14 September 2017, London, England Étienne André

More information

Testing of real-time systems IOCO

Testing of real-time systems IOCO Testing of real-time systems IOCO Brian Nielsen bnielsen@cs.aau.dk With Kim Larsen, Marius Mikucionis, Arne Skou Automated Model Based Conformance Testing x>=2 Model DBLclick! click? x:=0 click? x

More information

Automated Verification of a Parametric Real-Time Program: The ABR Conformance Protocol

Automated Verification of a Parametric Real-Time Program: The ABR Conformance Protocol Automated Verification of a Parametric Real-Time Program: The ABR Conformance Protocol Béatrice Bérard and Laurent Fribourg LSV Ecole Normale Supérieure de Cachan & CNRS 61 av. Pdt. Wilson - 94235 Cachan

More information

Aperiodic Task Scheduling

Aperiodic Task Scheduling Aperiodic Task Scheduling Jian-Jia Chen (slides are based on Peter Marwedel) TU Dortmund, Informatik 12 Germany Springer, 2010 2017 年 11 月 29 日 These slides use Microsoft clip arts. Microsoft copyright

More information

Timed Automata: Semantics, Algorithms and Tools

Timed Automata: Semantics, Algorithms and Tools Timed Automata: Semantics, Algorithms and Tools Johan Bengtsson and Wang Yi Uppsala University {johanb,yi}@it.uu.se Abstract. This chapter is to provide a tutorial and pointers to results and related work

More information

Real-Time Scheduling and Resource Management

Real-Time Scheduling and Resource Management ARTIST2 Summer School 2008 in Europe Autrans (near Grenoble), France September 8-12, 2008 Real-Time Scheduling and Resource Management Lecturer: Giorgio Buttazzo Full Professor Scuola Superiore Sant Anna

More information

Embedded Systems - FS 2018

Embedded Systems - FS 2018 Institut für Technische Informatik und Kommunikationsnetze Prof. L. Thiele Embedded Systems - FS 2018 Sample solution to Exercise 3 Discussion Date: 11.4.2018 Aperiodic Scheduling Task 1: Earliest Deadline

More information

Time(d) Petri Net. Serge Haddad. Petri Nets 2016, June 20th LSV ENS Cachan, Université Paris-Saclay & CNRS & INRIA

Time(d) Petri Net. Serge Haddad. Petri Nets 2016, June 20th LSV ENS Cachan, Université Paris-Saclay & CNRS & INRIA Time(d) Petri Net Serge Haddad LSV ENS Cachan, Université Paris-Saclay & CNRS & INRIA haddad@lsv.ens-cachan.fr Petri Nets 2016, June 20th 2016 1 Time and Petri Nets 2 Time Petri Net: Syntax and Semantic

More information

Lecture 7 Synthesis of Reactive Control Protocols

Lecture 7 Synthesis of Reactive Control Protocols Lecture 7 Synthesis of Reactive Control Protocols Richard M. Murray Nok Wongpiromsarn Ufuk Topcu California Institute of Technology AFRL, 25 April 2012 Outline Review: networked control systems and cooperative

More information

Model Checking Linear Duration Invariants of Networks of Automata

Model Checking Linear Duration Invariants of Networks of Automata Model Checking Linear Duration Invariants of Networks of Automata Miaomiao Zhang 1, Zhiming Liu 2, and Naijun Zhan 3 1 School of Software Engineering, Tongji University, Shanghai, China miaomiao@tongji.edu.cn

More information

Partial Order Reductions for Timed Systems

Partial Order Reductions for Timed Systems Partial Order Reductions for Timed Systems Johan Bengtsson 1 Bengt Jonsson 1 Johan Lilius 2 Wang Yi 1 1 Department of Computer Systems, Uppsala University, Sweden. Email: {bengt,johanb,yi}@docs.uu.se 2

More information

Lower-Bound Constrained Runs in Weighted Timed Automata

Lower-Bound Constrained Runs in Weighted Timed Automata Lower-Bound Constrained Runs in Weighted Timed Automata Patricia Bouyer LSV ENS Cachan & CNRS Email: bouyer@lsv.ens-cachan.fr Kim G. Larsen Dept. Computer Science Aalborg. Email:kgl@cs.aau.dk Nicolas Markey

More information

Andrew Morton University of Waterloo Canada

Andrew Morton University of Waterloo Canada EDF Feasibility and Hardware Accelerators Andrew Morton University of Waterloo Canada Outline 1) Introduction and motivation 2) Review of EDF and feasibility analysis 3) Hardware accelerators and scheduling

More information

Component-based Abstraction Refinement for Timed Controller Synthesis

Component-based Abstraction Refinement for Timed Controller Synthesis Component-based Abstraction Refinement for Timed Controller Synthesis Hans-Jörg Peter Reactive Systems Group Universität des Saarlandes Saarbrücken, Germany peter@cs.uni-sb.de Robert Mattmüller Foundations

More information

Behavioral Cartography of Timed Automata

Behavioral Cartography of Timed Automata Behavioral Cartography of Timed Automata Étienne André and Laurent Fribourg LSV ENS de Cachan & CNRS, France Abstract. We aim at finding a set of timing parameters for which a given timed automaton has

More information

Real-time operating systems course. 6 Definitions Non real-time scheduling algorithms Real-time scheduling algorithm

Real-time operating systems course. 6 Definitions Non real-time scheduling algorithms Real-time scheduling algorithm Real-time operating systems course 6 Definitions Non real-time scheduling algorithms Real-time scheduling algorithm Definitions Scheduling Scheduling is the activity of selecting which process/thread should

More information

Task Automata: Schedulability, Decidability and Undecidability

Task Automata: Schedulability, Decidability and Undecidability Task Automata: Schedulability, Decidability and Undecidability Elena Fersman 1, Pavel Krcal, Paul Pettersson 2 and Wang Yi 3 Email: fpavelk,paupet,yig@it.uu.se Department of Information Technology Uppsala

More information

A Modal Specification Theory for Timing Variability

A Modal Specification Theory for Timing Variability University of Pennsylvania ScholarlyCommons Technical Reports (CIS) Department of Computer & Information Science 11-13-2013 A Modal Specification Theory for Timing Variability Andrew King University of

More information

Exam Spring Embedded Systems. Prof. L. Thiele

Exam Spring Embedded Systems. Prof. L. Thiele Exam Spring 20 Embedded Systems Prof. L. Thiele NOTE: The given solution is only a proposal. For correctness, completeness, or understandability no responsibility is taken. Sommer 20 Eingebettete Systeme

More information

Power-Aware Scheduling of Conditional Task Graphs in Real-Time Multiprocessor Systems

Power-Aware Scheduling of Conditional Task Graphs in Real-Time Multiprocessor Systems Power-Aware Scheduling of Conditional Task Graphs in Real-Time Multiprocessor Systems Dongkun Shin School of Computer Science and Engineering Seoul National University sdk@davinci.snu.ac.kr Jihong Kim

More information

IMITATOR: A Tool for Synthesizing Constraints on Timing Bounds of Timed Automata

IMITATOR: A Tool for Synthesizing Constraints on Timing Bounds of Timed Automata ICTAC 09 IMITATOR: A Tool for Synthesizing Constraints on Timing Bounds of Timed Automata Étienne ANDRÉ Laboratoire Spécification et Vérification LSV, ENS de Cachan & CNRS Étienne ANDRÉ (LSV) ICTAC 09

More information

Analysis of a Boost Converter Circuit Using Linear Hybrid Automata

Analysis of a Boost Converter Circuit Using Linear Hybrid Automata Analysis of a Boost Converter Circuit Using Linear Hybrid Automata Ulrich Kühne LSV ENS de Cachan, 94235 Cachan Cedex, France, kuehne@lsv.ens-cachan.fr 1 Introduction Boost converter circuits are an important

More information

Folk Theorems on the Determinization and Minimization of Timed Automata

Folk Theorems on the Determinization and Minimization of Timed Automata Folk Theorems on the Determinization and Minimization of Timed Automata Stavros Tripakis VERIMAG Centre Equation 2, avenue de Vignate, 38610 Gières, France www-verimag.imag.fr Abstract. Timed automata

More information

Online Scheduling Switch for Maintaining Data Freshness in Flexible Real-Time Systems

Online Scheduling Switch for Maintaining Data Freshness in Flexible Real-Time Systems Online Scheduling Switch for Maintaining Data Freshness in Flexible Real-Time Systems Song Han 1 Deji Chen 2 Ming Xiong 3 Aloysius K. Mok 1 1 The University of Texas at Austin 2 Emerson Process Management

More information

3. Scheduling issues. Common approaches 3. Common approaches 1. Preemption vs. non preemption. Common approaches 2. Further definitions

3. Scheduling issues. Common approaches 3. Common approaches 1. Preemption vs. non preemption. Common approaches 2. Further definitions Common approaches 3 3. Scheduling issues Priority-driven (event-driven) scheduling This class of algorithms is greedy They never leave available processing resources unutilized An available resource may

More information

CPU SCHEDULING RONG ZHENG

CPU SCHEDULING RONG ZHENG CPU SCHEDULING RONG ZHENG OVERVIEW Why scheduling? Non-preemptive vs Preemptive policies FCFS, SJF, Round robin, multilevel queues with feedback, guaranteed scheduling 2 SHORT-TERM, MID-TERM, LONG- TERM

More information

Recent results on Timed Systems

Recent results on Timed Systems Recent results on Timed Systems Time Petri Nets and Timed Automata Béatrice Bérard LAMSADE Université Paris-Dauphine & CNRS berard@lamsade.dauphine.fr Based on joint work with F. Cassez, S. Haddad, D.

More information

Real-time Scheduling of Periodic Tasks (2) Advanced Operating Systems Lecture 3

Real-time Scheduling of Periodic Tasks (2) Advanced Operating Systems Lecture 3 Real-time Scheduling of Periodic Tasks (2) Advanced Operating Systems Lecture 3 Lecture Outline The rate monotonic algorithm (cont d) Maximum utilisation test The deadline monotonic algorithm The earliest

More information

EDF Feasibility and Hardware Accelerators

EDF Feasibility and Hardware Accelerators EDF Feasibility and Hardware Accelerators Andrew Morton University of Waterloo, Waterloo, Canada, arrmorton@uwaterloo.ca Wayne M. Loucks University of Waterloo, Waterloo, Canada, wmloucks@pads.uwaterloo.ca

More information

Lecture 6. Real-Time Systems. Dynamic Priority Scheduling

Lecture 6. Real-Time Systems. Dynamic Priority Scheduling Real-Time Systems Lecture 6 Dynamic Priority Scheduling Online scheduling with dynamic priorities: Earliest Deadline First scheduling CPU utilization bound Optimality and comparison with RM: Schedulability

More information

Using non-convex approximations for efficient analysis of timed automata: Extended version

Using non-convex approximations for efficient analysis of timed automata: Extended version Using non-convex approximations for efficient analysis of timed automata: Extended version Frédéric Herbreteau, D. Kini, B. Srivathsan, Igor Walukiewicz To cite this version: Frédéric Herbreteau, D. Kini,

More information

Specification Theories for Probabilistic and Real-Time Systems

Specification Theories for Probabilistic and Real-Time Systems Specification Theories for Probabilistic and Real-Time Systems Uli Fahrenberg, Axel Legay, and Louis-Marie Traonouez Inria / IRISA, Rennes, France Abstract. We survey extensions of modal transition systems

More information

Scheduling. Uwe R. Zimmer & Alistair Rendell The Australian National University

Scheduling. Uwe R. Zimmer & Alistair Rendell The Australian National University 6 Scheduling Uwe R. Zimmer & Alistair Rendell The Australian National University References for this chapter [Bacon98] J. Bacon Concurrent Systems 1998 (2nd Edition) Addison Wesley Longman Ltd, ISBN 0-201-17767-6

More information

Real-Time Systems. LS 12, TU Dortmund

Real-Time Systems. LS 12, TU Dortmund Real-Time Systems Prof. Dr. Jian-Jia Chen LS 12, TU Dortmund April 24, 2014 Prof. Dr. Jian-Jia Chen (LS 12, TU Dortmund) 1 / 57 Organization Instructor: Jian-Jia Chen, jian-jia.chen@cs.uni-dortmund.de

More information

Models for Efficient Timed Verification

Models for Efficient Timed Verification Models for Efficient Timed Verification François Laroussinie LSV / ENS de Cachan CNRS UMR 8643 Monterey Workshop - Composition of embedded systems Model checking System Properties Formalizing step? ϕ Model

More information

TDDB68 Concurrent programming and operating systems. Lecture: CPU Scheduling II

TDDB68 Concurrent programming and operating systems. Lecture: CPU Scheduling II TDDB68 Concurrent programming and operating systems Lecture: CPU Scheduling II Mikael Asplund, Senior Lecturer Real-time Systems Laboratory Department of Computer and Information Science Copyright Notice:

More information

APPROXIMATE SIMULATION RELATIONS FOR HYBRID SYSTEMS 1. Antoine Girard A. Agung Julius George J. Pappas

APPROXIMATE SIMULATION RELATIONS FOR HYBRID SYSTEMS 1. Antoine Girard A. Agung Julius George J. Pappas APPROXIMATE SIMULATION RELATIONS FOR HYBRID SYSTEMS 1 Antoine Girard A. Agung Julius George J. Pappas Department of Electrical and Systems Engineering University of Pennsylvania Philadelphia, PA 1914 {agirard,agung,pappasg}@seas.upenn.edu

More information

Real-Time Systems. Event-Driven Scheduling

Real-Time Systems. Event-Driven Scheduling Real-Time Systems Event-Driven Scheduling Marcus Völp, Hermann Härtig WS 2013/14 Outline mostly following Jane Liu, Real-Time Systems Principles Scheduling EDF and LST as dynamic scheduling methods Fixed

More information

There are three priority driven approaches that we will look at

There are three priority driven approaches that we will look at Priority Driven Approaches There are three priority driven approaches that we will look at Earliest-Deadline-First (EDF) Least-Slack-Time-first (LST) Latest-Release-Time-first (LRT) 1 EDF Earliest deadline

More information

Pattern Matching with Time Theory and Applications

Pattern Matching with Time Theory and Applications Thesis Defense Pattern Matching with Time Theory and Applications Doğan Ulus January 15, 2018 Grenoble, France Supervisor Reviewers Examiners Invited Oded Maler Rajeev Alur Saddek Bensalem Eugene Asarin

More information

A New Numerical Abstract Domain Based on Difference-Bound Matrices

A New Numerical Abstract Domain Based on Difference-Bound Matrices A New Numerical Abstract Domain Based on Difference-Bound Matrices Antoine Miné École Normale Supérieure de Paris, France, mine@di.ens.fr, http://www.di.ens.fr/~mine Abstract. This paper presents a new

More information

Real-Time Systems. Event-Driven Scheduling

Real-Time Systems. Event-Driven Scheduling Real-Time Systems Event-Driven Scheduling Hermann Härtig WS 2018/19 Outline mostly following Jane Liu, Real-Time Systems Principles Scheduling EDF and LST as dynamic scheduling methods Fixed Priority schedulers

More information

BRICS. Efficient Timed Reachability Analysis using Clock Difference Diagrams

BRICS. Efficient Timed Reachability Analysis using Clock Difference Diagrams BRICS Basic Research in Computer Science BRICS RS-98-47 Behrmann et al.: Efficient Timed Reachability Analysis using Clock Difference Diagrams Efficient Timed Reachability Analysis using Clock Difference

More information

Unbounded, Fully Symbolic Model Checking of Timed Automata using Boolean Methods

Unbounded, Fully Symbolic Model Checking of Timed Automata using Boolean Methods Unbounded, Fully Symbolic Model Checking of Timed Automata using Boolean Methods Sanjit A. Seshia and Randal E. Bryant Computer Science Department Carnegie Mellon University Verifying Timed Embedded Systems

More information

RCPSP Single Machine Problems

RCPSP Single Machine Problems DM204 Spring 2011 Scheduling, Timetabling and Routing Lecture 3 Single Machine Problems Marco Chiarandini Department of Mathematics & Computer Science University of Southern Denmark Outline 1. Resource

More information

Hourglass Automata. Yuki Osada, Tim French, Mark Reynolds, and Harry Smallbone

Hourglass Automata. Yuki Osada, Tim French, Mark Reynolds, and Harry Smallbone Hourglass Automata Yuki Osada, Tim French, Mark Reynolds, and Harry Smallbone The University of Western Australia. yuki.osada@research.uwa.edu.au, {tim.french,mark.reynolds}@uwa.edu.au, 21306592@student.uwa.edu.au

More information

Che-Wei Chang Department of Computer Science and Information Engineering, Chang Gung University

Che-Wei Chang Department of Computer Science and Information Engineering, Chang Gung University Che-Wei Chang chewei@mail.cgu.edu.tw Department of Computer Science and Information Engineering, Chang Gung University } 2017/11/15 Midterm } 2017/11/22 Final Project Announcement 2 1. Introduction 2.

More information

Clock-driven scheduling

Clock-driven scheduling Clock-driven scheduling Also known as static or off-line scheduling Michal Sojka Czech Technical University in Prague, Faculty of Electrical Engineering, Department of Control Engineering November 8, 2017

More information

Zone-Based Reachability Analysis of Dense-Timed Pushdown Automata

Zone-Based Reachability Analysis of Dense-Timed Pushdown Automata IT 12 034 Examensarbete 15 hp Juli 2012 Zone-Based Reachability Analysis of Dense-Timed Pushdown Automata Kristiina Ausmees Institutionen för informationsteknologi Department of Information Technology

More information

Lecture: Workload Models (Advanced Topic)

Lecture: Workload Models (Advanced Topic) Lecture: Workload Models (Advanced Topic) Real-Time Systems, HT11 Martin Stigge 28. September 2011 Martin Stigge Workload Models 28. September 2011 1 System

More information

Measuring Permissivity in Finite Games

Measuring Permissivity in Finite Games Measuring Permissivity in Finite Games Patricia Bouyer, Marie Duflot, Nicolas Markey, and Gabriel Renault 3 LSV, CNRS & ENS Cachan, France {bouyer,markey}@lsv.ens-cachan.fr LACL, Université Paris, France

More information

State Explosion in Almost-Sure Probabilistic Reachability

State Explosion in Almost-Sure Probabilistic Reachability State Explosion in Almost-Sure Probabilistic Reachability François Laroussinie Lab. Spécification & Vérification, ENS de Cachan & CNRS UMR 8643, 61, av. Pdt. Wilson, 94235 Cachan Cedex France Jeremy Sproston

More information

Real-Time Systems. Lecture #14. Risat Pathan. Department of Computer Science and Engineering Chalmers University of Technology

Real-Time Systems. Lecture #14. Risat Pathan. Department of Computer Science and Engineering Chalmers University of Technology Real-Time Systems Lecture #14 Risat Pathan Department of Computer Science and Engineering Chalmers University of Technology Real-Time Systems Specification Implementation Multiprocessor scheduling -- Partitioned

More information