FIT2009( 第 8 回情報科学技術フォーラム ) 12.8% A Selection Algorithm of Tasks for Applying DVS toward a Power-aware Task Scheduling

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1 FIT09( 第 8 回情報科学技術フォーラム ) RC % % A Selection Algorithm of Tasks for Applying toward a Power-aware Task Scheduling YUICHIRO MORI, 1 KOICHI ASAKURA 2 and TOYOHIDE WATANABE 1 Although (Dynamic Voltage Scaling) can reduce power consumption, this method is mainly used at idle time or low load computation time. In existing methods, which propose application of at high load computation time, interprocessor communication cost between tasks is not considered. In this paper, we propose a task scheduling algorithm for reducing power consumption especially for high load computation time. The algorithm takes interprocessor communication cost into consideration. is applied to tasks that are not in the critical path. Thus, we can reduce power consumption without increasing the whole processing time. Experimental results show that our algorithm can reduce about 9.0% and 12.8% of power consumption o and 8 processors respectively on average. 1. (Dynamic Voltage Scaling) 3) P-State 1) AMD Cool in Quiet 4) Power Now! 5) Intel 2) SpeedStep 6) 1 Department of Systems and Social Informatics, Graduate School of Information Science, Nagoya University 2 Department of Information Systems, School of Informatics, Daido University 157

2 FIT09( 第 8 回情報科学技術フォーラム ) S time[ut] 0 n 2 P 1 n 2 n 8 n 7 P 3 n 7 2 Fig. 2 An example of a schedule n 8 G 0 1 Fig. 1 An example of a task graph 8) ( 5 ) P-State 1 P-State P-State comp(n) comm(n i,n j ) CMOS P-State 7) ( 2 ) 2 2 [unit time] P-State s 1 s 2 P-State f s1 f s2 T s1 T s2 = T s 2. f s2 T s1 ( 3 ) ( 4 ) 8) ( 1 ) 1 f s1 158

3 FIT09( 第 8 回情報科学技術フォーラム ) 1 Table 1 Specification of a computer parts specification Motherboard Gigabyte GA-K8 VM800M CPU AMD Athlon Clock frequency 2.00GHz Number of P-States 3 RAM 1.00GB OS Windows XP Professional SP3 n 2 n 7 2 Table 2 Effects of P-State [W] [MHz] [V] P-State 2 3 P-State Varatkar 3. 9))11)12) Chen 3 9) Chen 12) 3 Fig. 3 A tree task graph ) Chen 11) Chen 1 CPU 0% 159

4 FIT09( 第 8 回情報科学技術フォーラム ) P1 n 2 50 連接タスク群 A P n 2 n 7 Fig. 5 連接タスク群 B 5 An example of connective tasks (a) P1 n 2 50 Fig. 4 (b) 4 An example of applying 4. slack-time slack-time P-State slack-time n 2 n 2 slack-time 5 [ut] 5, n 2,,, n 2 00MHz slack-time, n 7 00MHz, n 2,, slack-time 2 4,770[W ut], 3,660[W ut] 6 Fig. 6 Our proposed algorithm 6 est(n, p) n p (earliest start P-State P-State time) ect(n, p) n p 160

5 FIT09( 第 8 回情報科学技術フォーラム ) (earliest completion time) wait(n, n s0 ) 7) p n n s0 slacktime(n s0 ) ( 1 ) ( 2 ) ( 3 ) slack-time 7 slack-time Fig. 7 A computation method of slack-time n slack-time nlist n ( Slack-time n slack-time n prev nlist n prev slacktime(n) slack-time n slack-time n (6 ).3 n nlist n s1 slack-time p s1 P-State wait(n,n s1 ) wait(n,n s1 ) = est(n s1, p s ) ect(n, p) comm(n,n s1 ). n s0 ) slacktime(n s0 ) 4.4 slack-time wait(n,n s0 ) = est(n s0, p) ect(n, p) + slacktime(n s0 ). slacktime(n s0 ) nlist slack-time nlist n slack-time slacktime(n) = min wait(n,n s). n s succ(n) p s wait(n, n s1 ) n slacktime(n) = 0 slack-time 8(a) ETF 7) 8(b) slack-time 8(b) 2 n s1 n s0 5 ) p n n prev slacktime(n prev ) n target n target n target (12 13 n target slack-time n target est slack-time (14 ) n target nlist

6 FIT09( 第 8 回情報科学技術フォーラム ) P 1 n 2 n 15 4 S 0 0 G 45 (a) Fig. 8 n (b) 8 Examples of a task graph and a schedule 9(a) 6,770[W ut] 5,270[W ut] slack-time P-State ETF P-State 9(a) STG(Standard Task Graph set) 13) slack-time 50, slack-time CCR(Communication to Computation Ratio) 7) slack-time CCR slack-time 1 7) CCR 3 P 1 P 1 Fig n (a) n (b) 9 After applying the methods for reducing power consumption 8(b) 2 9(b) 9(a) n 2, n 2 9 P 1 [,0] 2 [ms] STG CCR

7 FIT09( 第 8 回情報科学技術フォーラム ) 3 Table 3 Power consumption model of the processor P-State [W] [MHz] [V] P-State slack-time slack-time 1 slack-time AMD Athlon P f V P fv 2 49[W] 2 00MHz 1800MHz 3/4 00MHz 00MHz 1/4 3 ( 2 ) Intel Speed Step [µs] µs 14) [µs] STG 3.1[ms] 1% 4 9.0% % 5.3 ETF 4 4 P-State ETF ( 1 ) ( 3 ) slack-time CCR CCR CCR slack-time 15) 163

8 FIT09( 第 8 回情報科学技術フォーラム ) 4 Table 4 Experimental results 50 0 CCR %.8% 4.8% 9.4% %.8% 5.0% 9.3%.3% 11.0% 9.0% 13.8% % 15.7% 8.9% 14.3% 8 1.8% 14.7%.6% 16.5%.8% 13.3% 11.2% 15.1% MPI : PC,, Vol. 47, No. SIG12(ACS15), pp (06). 13) T.Tobita and H.Kasahara: Performance Evaluation of Minimum Execution Time Multiprocessor Scheduling Algorithms Using Standard Task Graph Set, Proc. of 00 Int l. Conf. on Parallel and Distributed Processing Techniques and Applications 1) L.A.Barroso: The Price of Performance, Queue, Vol.3, No.7, pp (05). 2) X.Fan, W.D.Weber and L.A.Barroso: Power Provisioning for a Warehouse-sized Computer, Proc. of the 34th Annual Int l. Symp. on Computer Architecture, pp (07). 14), (PDPTA), pp (00). 3) Y.Zhang, X.S.Hu and D.Z.Chen: Task Scheduling and Voltage Selection for Energy Minimization, Proc. of the 39th Conf. on Design Automation, pp (02). 4) AMD Corporation. Cool in Quiet technology. 5) AMD Corporation. Power now! technology. 6) Intel Corporation. SpeedStep technology. 7) O.Sinnen: Task Scheduling for Parallel Systems, Wiley-Interscience (07). 8) O.Sinnen, L.A.Sousa and F.E.Sandnes: Toward a Realistic Task Scheduling Model, IEEE Transactions on Parallel and Distributed Systems, Vol. 17, No.3, pp (06). 9) G.Chen, K.Malkowski, M.Kandemir and P.Raghavan: Reducing Power with Performance Constraints for Parallel Sparse Applications, Proc. of Workshop on High-Perfomance, Power-Aware Computing (IPDPS), pp (05). ) :,, Vol.05, No.79, pp (05). 15) L.Choy, S.G.Petiton and M.Sato: Toward Power- Aware Computing with Dynamic Voltage Scaling for Heterogeneous Platforms, Proc. of 07 Int l. Conf. on Cluster Computing, pp (07). :,, Vol. 47, No.SIG12(ACS15), pp (06). 11) G.Varatkar and R.Marculescu: Communication- Aware Task Scheduling and Voltage Selection for Total Systems Energy Minimization : Proc. of 03 Int l. Conf. on Computer-aided design (ICCAD), pp (03). 12) 164