Fabrication of interdigitated micro-supercapacitors for portable electronic devices

Transcription

1 Fabrication of interdigitated micro-supercapacitors for portable electronic devices DTU-NTU Innovation Workshop 2013 Søren Elmin Diederichsen, DTU Chua Yen Hao, NTU Supervisors: Chen Xiaodong, Tim Booth & Kristian Mølhave Nanyang Technical University June 27, 2013

2 1 ABSTRACT 1 Abstract In the application of portable electronics, the current trend is to downsize electronics components for greater portability. High performance interdigitated planar microsupercapacitors could be fabricated with current micro-fabrication technology and is compatible with the fabrication of integrated circuit (IC). The applications of such device will be useful for electronics component that requires high burst of energy in a short time and response to high frequency. Basing on the state-of-the-art interdigitated microsupercapacitors, a proposal to downscale the device was brought up for the purpose of achieving higher performance in the device. Several fabrication methods were discussed. Also, key performance parameters of the device were mentioned and corresponding characterization methods were suggested. i

3 Contents 1 Abstract i 2 Motivation 1 3 Theoretical Background Conventional Capacitors Supercapacitors State-of-the-art Electrode Materials Electrolytes Fabrication of interdigitated micro-supercapacitor Graphene electrodes: Conventional stacked geometry versus in-plane device geometry Proposal to down-scale current micro-supercapacitor interdigitated design Electrode separation Methods for down-scaling device dimensions Performance characterization Infuence of the active material and thickness of the electrode Frequency response Energy density, Power density and rate capability Conclusion and Outlook 14

4 2 MOTIVATION Figure 1: Illustration of an interdigitated micro-supercapacitor. A potential difference is achieved by applying an external voltage to two electrodes patches (marked with a plus and minus sign, respectively). In between the electrodes is a solid-state electrolyte, effectively removing the need for a separator. Illustration from [2] 2 Motivation In the application for portable electronics, the current trend is gearing towards the continuous downsizing of existing components for greater portability. In the meantime, enhancement of the functionality and reliability of the component is also crucial, such that the miniaturization will not compromise the functionality of the component. Progress in micro-fabrication technology has enabled the fabrication of micro-supercapacitor in an interdigitated planar form. For the discussion in our report we define a micro-supercapacitor as being a planar supercapacitor having electodes of micrometer-scale in at least one dimension, as schematically illustrated in Figure 1. In contrast to a conventional sandwich structured supercapacitor, this interdigitated planar structure will allow the micro-supercapacitor to be more compatible together with the fabrication of integrated circuits (IC) that can be integrated with MEMS or CMOS in a single chip [1]. Other than better integration with ICs, micro-supercapacitor was experimentally found to yield higher power density as compared to the conventional supercapacitor. Micro-supercapacitors have great potential to complement batteries for portable electronic. Some of the desired properties of micro-supercapacitors would be high power density, high frequency response and rate capability. These properties are particularly useful if the micro-supercapacitors were to be coupled with micro-batteries, micro-fuel cells, and energy harvesters to provide peak power [3]. The device can also be use to power radio frequency identification (RFID) tags and with further optimization of electrode compositions and structural design of the micro-supercapacitors, the device can be use for ac-line-filtering applications in portable electronics[4]. Thus, the motivation for the studies presented in this report is to investigate key aspects related to the fabrication and final performance of a micro-supercapacitor based on an interdigitated electrode design. Furthermore, methods for achieving new devices in micro- and nano-scale regimes will be proposed, including discussions on how to perform measurements that hopefully could reveal some characteristics related to supercapacitors that have not yet been fully understood, including in-planar diffusion versus normal diffusion of electrolyte ions into the bulk few-layer graphene electrodes. 1

5 3 THEORETICAL BACKGROUND (a) (b) Figure 2: Drawings of: (a) A conventional capacitor [6]. d indicates the separation distance between the to conductive electrodes. (b) Electrical double-layer supercapacitor[7]. An electrical double-layer is created due to electrostatic forces making it possible to store electrical energy when an external voltage is applied. Again, d denotes the distance between the conductive electrodes. A zoom-in on the porous electrode material reveals charge build-up. Yet another zoom-in reveals the charge separation distance between the electrolytic ions and the electrode, indicated by δ. 3 Theoretical Background This section will provide a brief description and comparison of the conventional capacitor, the electrolytic capacitor and the supercapacitor, including important schematics (which will be referred to in other sections of the report). 3.1 Conventional Capacitors A conventional capacitor is a component that can store and release electrical energy. A typical conventional capacitor consists of two conductive electrodes separated by a dielectric. This structure is also known as a parallel plate capacitor and a principle sketch can be seen in Figure 2a. In the presence of an applied external potential between the positive and the negative electrode, electrical charges are electrostatically stored. On the other hand, when a load is connected to the two electrodes, the capacitor delivers an electric current, thus the capacitor is discharged. For a parallel plate capacitor the total capacitance, C, is given as[5]: C = ɛa d (1) where ɛ is the dielectric constant, A is the total area of the two electrodes, and d is the distance between the two electrodes. The latter parameter and its influence of supercapacitor performance will be discussed in another section of this report, namely in Section 5.1. The maximum energy that can be stored in such a set-up, can be expressed as[5]: E = 1 2 CV 2 (2) in which V is an applied potential. The max power released, P, when discharging the capacitor is given as[5]: P = V 2 4R (3) 2

6 3.2 Supercapacitors 3 THEORETICAL BACKGROUND where R is the resistance of the capacitor. In this equation a maximum external power from is assumed that the resistance of the load is equal to that of the internal resistance of the capacitor, according to the maximum power transfer theorem[8]. However, this condition will not result in maximum efficiency. This way of storing energy can be used for numerous applications, e.g. as a buffer power supply when a battery is being charged, or to applications where a high voltage needs to be maintained. Also, changes in the distance between the electrodes will result in a change in the capacitance (according to Eq. 1), which therefore makes it possible to use in several sensor applications, e.g. the capacitive micromachined ultrasonic transducer[9]. 3.2 Supercapacitors The term supercapacitor, or ultracapacitor, is used to designate capacitors that rely on electrochemical mechanisms. Supercapacitors have, in general, an almost identical cell construction as conventional capacitors, as illustrated in Figure 2b. However, the main difference is that the metal electrodes in supercapacitors are generally constituted by highly porous electrodes [10] and the fact that an electrolyte is used instead of a dielectric (which, then, might require the insertion of a separator). Also, supercapacitors have smaller separation distance than compared to the ordinary electrolytic capacitor (which has been around for more than a hundred years), since the latter is relies on an oxide layer separation between the electrode and the electrolyte[11]. In fact, supercapacitors can be classified according to the energy storage mechanisms involved; one being electrical double-layer capacitors (EDLC), and the other being pseudocapacitors [10]. In an EDLC the energy is stored by the adsorption of both anions and cations, resulting in a electrical double-layer at the boundary between an electrolyte and a high-surface-area electrode [10]. For this capacitor class, porous carbon materials are used as electrode material for electrostatical storage of charge, including but not limited to; Activated carbon, carbon nanotubes and graphene[5]. On the other hand, pseudocapacitors rely on a Faradic process in which reversible redox reactions take place between the electrolyte and the electroactive material on an electrode surface. For a pseudocapacitor mainly three electroactive materials have been investigated; Transition metal oxides, conducting polymers and materials containing oxygen- and nitrogen surface functional groups[10]. In addition, a combination of the aforementioned two supercapacitor classes is called a hybrid capacitor and exhibits both outstanding double-layer capacitance as well as pseudocapacitance [12, 13]. Energy storage in a supercapacitor results in a higher energy density than the conventional dielectric capacitors [14]. Furthermore, supercapacitors have a higher capacitance per unit volume and a larger energy density compared to traditional solid dielectric capacitors. On the downside, the energy density is lower than that of modern conventional batteries, say lithium-ion batteries [12]. Therefore, one of the key figures of merit is the power density, which is significantly higher than that of conventional batteries, i.e. energy can be transferred to the load at a higher rate. As a result, supercapacitors have much faster charging and discharging cycles [15]. 3

7 4 STATE-OF-THE-ART 4 State-of-the-art 4.1 Electrode Materials From a material s point of view, carbon is one of the most abundant materials on Earth and it is the most important element for all living organism on Earth. When two or more carbon atoms are brought together, they can assume a variety of forms, which is unique and fascinating. Hence, many nanostructured carbon-based materials have been used in the making of electric double-layer micro-supercapacitors [1]. These materials include activated carbon (AC), onion-like carbon (OLC), carbon nanotubes (CNT), and graphene. In order to achieve EDLCs with high performance, several factors of the carbonbased materials are crucial: specific surface area (SSA), electrical conductivity, and pore size and distribution [10]. In most cases, although porous materials can obtain high SSA, the low conductivity of the porous materials restricts its application in high power density supercapacitors [16]. Therefore, it is necessary to optimize these factors to achieve desire properties of the carbon-based electrodes for high performance EDLCs. The performance defined in this report is based on the measurement of the device power density, frequency response and rate capability. The unique properties of graphene give graphene an advantage over other carbon-based materials especially in the making of high performance in-plane micro-supercapacitors. Graphene is a material with one-atom-thick 2D single layer of sp2-bonded carbon. The unique structural property of graphene allows the material to possess the physical properties of strong mechanical strength, extraordinary high electrical conductivity and large surface area as compare to traditional porous carbon materials [10] Electrolytes Another important component in a supercapacitor is the electrolyte. In general, there are three types of electrolytes: aqueous electrolytes, organic electrolytes, and ionic liquids[5]. Each type electrolyte has its own advantages and disadvantages, which will not be discussed in this report. Liquid based electrolytes are commonly used in the fabrication of conventional supercapacitors. In the fabrication process, the substrates are often immersed directly into the liquid electrolyte or the liquid electrolyte will be drop onto the substrate. It will be difficult for the electronic chip to contain liquid electrolyte and also to shelter other electronic components from the impact of the liquid electrolyte [17]. Therefore, micro-supercapcitor with liquid electrolytes posts a challenge in the making of on-chip micro-supercapacitor and is definitely not a feasible option to adopt liquid-base electrolytes. A gel-like electrolyte is a good alternative of conventional liquid electrolytes for the purpose of on-chip micro-supercapacitors. El-Kady and Kaner reported an all-solidstate flexible interdigitated micro-supercapacitors using Ionogels, which is a hybridization of ionic liquids (1-butyl-3-methylimidazolium bis(trifluoromethylsulfonyl)imide) with a solid component (fumed silica nanopowder) to form gel-like eletrolytes [1]. Similarly, Niu et al. reported an all-solid-state flexible ultrathin interdigitated micro-supercapacitor using phosphoric acid/polyvinyl alcohol (H3PO4/PVA) gel electrolyte[17] Fabrication of interdigitated micro-supercapacitor Currently, few researches had been done on micro-supercapacitors with interdigitated electrode design. Pech et al. [2] reported the fabrication of the micro-supercapacitor that was based on onion-like carbon (OLCs). The interdigitated electrode patterns were deposited 4

8 4.2 Graphene electrodes: Conventional stacked geometry versus in-plane device geometry 4 STATE-OF-THE-ART Figure 3: Schematic drawing of indigitated micro-supercapacitors fabrication procedures[3]. by electrophoretic deposition technique (EPD) onto interdigitated gold current collector patterned on silicon wafer. The gold current collector was deposited by evaporation and conventional photolithography/etching processes were used to form the interdigitated patterns. At the scan rate of 1 V/s, the energy density of 1.63 mwh/cm3 and power density of 36 W/cm3 was achieved. With a time constant of only 26 ms, the OLC based micro supercapacitors are capable of handling ultra-high power, due to the coupling of micrometer-sized interdigital electrode deign with a binder free deposition technique and the non-porous morphology of OLC materials. Beidaghi and Wang [3] reported the fabrication of interdigitated micro-supercapacitor. The binder-free interdigitated electrodes were formed with the combination of electrostatic spray deposition (ESD) and photolithography lift-off methods, see Figure 3. The electrode material used was a composite of reduced graphene oxide (rgo) with CNT and the electrolyte used is aqueous KCl. At the scan rate 1 V/s, the energy density obtained was 1.63 mwh/cm3 and the power density of 17 W/cm3. The time constant obtained at 4.8 ms demonstrates the superior frequency response of the micro-supercapacitors fabricated. Recently, El-Kady and Kaner reported a scalable method to fabricate graphene based interdigitated micro-supercapacitors, see Figure 4. A standard Lightscribe DVD burner was used to form interdigitated electrodes by laser direct writing on graphene oxide (GO) films. The insulating GO films were converted into highly conducting computer-designed patterned laser-scribed graphene (LSG). With the over coating of Ionogel, an energy density of 1.37 mwh/cm3 and power density of 34 W/cm3 at 1 V/s scan rate. It was reported that the micro-supercapacitors fabricated could perform up to a scan rate of 10 V/s. The time constant obtained of 19 ms was achieved. Table 7 summarized the data obtained from different researches. The figures obtained for volumetric capacitance, energy density and power density are obtained at the scan rate of 1V/s. The figures for power densities tabulated in the table were extrapolated from the Ragone plot provided in each literature, based on the energy densities reported. 4.2 Graphene electrodes: Conventional stacked geometry versus inplane device geometry Recent work [17, 1] suggest that micro-patterned electrodes constituted by reduced graphene oxide allow for improved electrolytic ion diffusion in the direction parallel to the electrodes. At this point, however, this is only empirically deduced and further investigations need to 5

9 4.2 Graphene electrodes: Conventional stacked geometry versus in-plane device geometry 4 STATE-OF-THE-ART Figure 4: Photograph of laser-scribed micro-supercapacitors with 4, 8 and 6 interdigitated electrodes [1] Table 1: Table summarizing performance obtained by state-of-the-art fabrication methods. Electrode Electrolyte Operating Volumetric Energy Power Time Ref material voltage capacitance density density constant [V] [ F ] [ mw h ] [ W ] [ms] cm 3 cm 3 cm 3 AC 1M TEABF [2] in PC OLC 1M TEABF [2] in PC rgo/cnt 3M KCl [3] LSG PVA/H 2 SO [1] LSG Iongel [1] 6

10 4.2 Graphene electrodes: Conventional stacked geometry versus in-plane device geometry 4 STATE-OF-THE-ART (a) (b) Figure 5: Schematics of: (a) A stacked graphene supercapacitor. The figure illustrates that the electrolytic ions will not completely utilize the electrochemical graphene surface area. In contrast, (b) shows the geometry of an in-plane graphene supercapacitor, allowing better utilization and better charge/discharge rates. Illustrations from [18] be performed. It has been demonstrated that the use of graphene in an in-plane device geometry instead of a more conventional stacked geometry will result in better utilization of the electrochemical surface area of graphene layers, and thus improving the extent of the electrical double-layer formed at the interface[1, 17, 18]. Figure 5 shows simplified illustrations of the in-plane and the stacked supercapacitor design, respectively. In the conventional stacked design, graphitic carbon-based materials are randomly oriented with respect to the current collectors[18]. In Figure 5a the most unfavourable situation is shown, in where all graphene layers are lying parallel to the current collectors. Having both electrodes in the same plane makes it suitable for on-chip integration. As a result the electrolytic ions will not completely utilize the electrochemical surface area[17]. With an in-plane architecture, as depicted in Figure 5b, the electrolytic ions will be able to diffuse in a direction parallel to the graphene sheets allowing full utilization of the electrochemical surface area. Notice, however, that the illustration in Figure 5b is greatly idealized, and a real device using would have much more concatenated graphene sheets. Nonetheless, graphene stacked in an in-plane design has shown to have higher specific capacitance as function of scan rate[17]. This makes the graphene interdigitated in-plane stacked design more suitable for applications demanding high charge/discharge rates[1]. 7

11 5 PROPOSAL TO DOWN-SCALE CURRENT MICRO-SUPERCAPACITOR INTERDIGITATED DESIGN (a) (b) Figure 6: (a) Plot of specific capacitance as function of scan rate. Device 1 (blue) is a conventional supercapacitor, having a design as depicted in Figure 5a. Device 5 and 6 are rgo electrode structures with 300 µm and 100 µm spacing, respectively[17]. (b) Stack capacitance of different supercapacitors as function of scan rate. The performance of a conventional sandwich supercapacitor (as illustrated in Figure 5a is represented by the black curve. The other curves represent laser scribed rgo in an interdigitated electrode pattern having 4, 8 and 16 electrodes respectively, as depicted in Figure 4 [1]. 5 Proposal to down-scale current micro-supercapacitor interdigitated design Looking at recent results for the performance of interdigitated micro-supercapacitors it appears that design parameters such as the width of the electrodes as well as the interspace distance between the electrodes certainly have influence on device performance. In particular, it has been suggested [1, 17] that down-scaling the interdigitated electrode design will result in better ion diffusion and thus better device performance. In particular, the separation distance between interdigitated graphene electrodes (as depicted in Figure 5) will result in a shorter diffusion pathway of the electrolytic ions in directions parallel to the plane of the device. Figure 6a shows the specific capacitance as function of scan rate obtained by Niu et el.[17]. The plot qualitatively shows that the specific capacitance with smaller electrode distance, d, dropped less abruptly with increasing scan rate[17]. This is believed to be due to the shorter pathway ions need to travel. As a result, higher rate capability is obtained for smaller electrode separation distances. This observation is further substantiated by El-Kady et al. In a somewhat similar design using laserscribed interdigitated supercacitors with reduced graphene-oxide as electrode material, they obtained a plot of the stack capacitance as function of scan rate, as shown in Figure 6b. The same tendency is again seen with respect to device performance enhancement for smaller device dimensions. Devices with 4, 8 and 16 electrodes were made (see Figure 4, and Figure 6b surely indicates that the more electrodes per area, the higher a specific capacitance is obtained. Furthermore, a less abrupt fall is again obtained. It has been suggested[1] that average migration distance is proportional to the width of the micro-electrodes and similarly with the space between them, and is thus decreasing from 16 to 4 electrodes. Having more electrodes in the same area will therefore reduce the mean ionic diffusion path will effectively result in lowering of the electrolyte resistance between the micro-electrodes. In essence; The more electrodes per unit area, the more power can be achieved. 8

12 5 PROPOSAL TO DOWN-SCALE CURRENT MICRO-SUPERCAPACITOR 5.1 Electrode separation INTERDIGITATED DESIGN Therefore, in this work we propose to make smaller structures by suggesting possible fabrication methods as well as what the key parameters are and how to find them using characterization methods and calculations. Furthermore we will provide an overview of possible ways of making supercapacitors with interdigitated structure on a micron- and even sub-micron-scale. Now a brief discussion of the influence of electrode distance follows. 5.1 Electrode separation For the interdigitated micro-supercapacitor the specific capacitance will be mainly due to ion-interactions at each electrode/electrolyte interface. As explained in Section 3, this contribution exits because of electrostatic as well as chemical interaction between the electrode and the electrolyte. Then, looking at the EDLC, a Helmholtz layer is created between the electrode and the electrolyte, resulting in a separation distance between the charged ion and the oppositely charged electrode. This distance, δ (see Figure 2b), is indeed the key to the high capacitance obtained by supercapacitors, since charge layer separation is on the order of a few angstroms. That is to say, the contribution due to the separation between the positive and negative electrodes will not contribute mentionable to the specific capacitance. However, changing the distance between the electrodes, d (see Figure 2b), will alter the pathway of the ions in the electrolyte. In terms of internal resistance, the shorter the distance an ion needs to diffuse will result in a smaller resistance. Since the resistivity of electrolyte will be determined by the electrolyte solution/composition in use, it can be hard to give any quantitative predicts about the resistance as the separation distance, d, is decreased. However, as it is our intention to suggest a supercapacitor design for portable on-chip devices, we assume the use of an all-solid-state electrolyte. Furthermore, in this case it is definitely expected that a smaller distance between the electrodes will result in lowering of the resistance R, as expressed by: R = ρ L A (4) where ρ is the resistivity of the electrolyte, L is the length an ion travels and A is the cross-sectional area seen by an ion in the electrolyte. This decrease in resistance with decreasing separation distance will, then, result in a lower characteristic time constant τ = RC (the time it takes for the system to charge/discharge), i.e. have the advantage of better charge/discharge performance. Furthermore, lowering the resistance will increase the resulting power density, according to Equation 3. Also, when looking at the sheet resistance of the total device, it is expected that minimizing all dimensions with the same factor will not alter the sheet resistance. The downscaling of micro-supercapacitors also plays an important role in the improvement of frequency response of the device. In theory, the electrolytes in a supercapacitor can be deemed as a dielectric material in a conventional capacitor. In the presence of electric field, E, the electrolyte molecules will be re-oriented, inducing an electric dipole moment. Polarization, P, is the total electric dipole moment per unit volume and is dependent on the electric field applied to it. There are three possible types of contributions (mechanisms) to the polarization in the electrolytes: electronic polarization (α e ), dipolar polarization (α d ) and space charge polarization (α s ). α e is due to the separation of positive and negative charge center in atoms, α d is due to the reorientation of the existing dipoles and α s is due to the diffusive separation of ions in the electrolyte medium. The total polarization is the summation of these contributions. 9

13 5 PROPOSAL TO DOWN-SCALE CURRENT MICRO-SUPERCAPACITOR 5.2 Methods for down-scaling device dimensions INTERDIGITATED DESIGN The polarization contributed by space charge is the greatest, follow dipolar, and electronic is the least. These contributions have different response speed, which is characterized by response time, τ. The response is the fastest for α e and the slowest for α s. under the perturbation of an AC electric field, polarization contributed from a particular mechanism occurs instantaneously when the response time of the mechanism is much faster than the frequency of the applied electric field. However, when the response time is much slower than the frequency, no polarization from the particular mechanism occurs. Therefore, if we were to increase the frequency of the AC electric field, fewer mechanisms will contribute to the total polarizability, giving rise to lower P, and thus lower D. The frequency response will be the extent to which the electrolyte can maintain its polarization in an increasing AC electric field frequency. In summary, down-scaling will have the advantage of higher charge/discharge rate and frequency response due to a smaller internal resistance. Also, the a lower resistance will result in higher power densities. Furthermore, downscaling of the device dimensions makes it possible to fit more on-chip devices in an integrated circuit design. That is, it would allow the interconnection of several supermicrocapacitors in parallel or series in order to improve output current and/or potential[17]. It is indeed these intriguing properties that has lead to our proposal of down-scaling the dimensions of the current micro-supercapacitor interdigitated design. 5.2 Methods for down-scaling device dimensions Several well-known fabrication methods exit that will make small dimensions achievable - even on a few-nanometer scale. However, some of these methods cannot be used for largescale production but will be most interesting for research purposes, e.g. for studying the ion diffusion when when the electrode separation is comparable to the charge-layer distance of the Helmholtz layer. The technique used for micro-patterning of the electrode material to form an interdigitated pattern will of course depend on the choice of material, which will, as suggested in Section 4, alter the device performance properties. Therefore, finding suitable methods for micro- or nano-patterning of different electrodes is very essential. In the following, four fabrication techniques together with are discussed. These are e-beam lithography, nanoimprint lithography, pyrolysis processing and LIGA, respectively. E-beam lithography[19]: is the process of making a pattern in a thin film by exposing the thin film, referred to as the resist layer, to a beam of accelerated electrons. The resulting structures achievable with this technique can have very high resolution due to the short wavelength of high-energy electrons. In this way it would be possible to obtain very narrow gaps between the electrodes in the interdigitated supercapacitor, and would therefore be interesting in the study of ion diffusion and contributions to the specific capacitance of the device. The downside of this method is that is definitely not usable for large-scale manufacturing due to long exposure time for a large area of small structures. Another possible use of e-beam lithography is to make a patterned stamp, and then use the stamp to form a pattern in a polymer. This will be elaborated in the following. Nanoimprint lithography[20]: is the process of transferring a pattern from a stamp into a polymer mask. Nanoimprint lithography comes in many different variants, but describing these is beyond the scope of this report. However, using this technique will be a discipline in where viscous sqeeze flow of the polymer and mechanical deformation of the stamp will be important aspects to consider. In particular, this 10

14 5 PROPOSAL TO DOWN-SCALE CURRENT MICRO-SUPERCAPACITOR 5.2 Methods for down-scaling device dimensions INTERDIGITATED DESIGN method has its limitations exactly due to these aspects, resulting in limited use for large structures with varying pattern densities. It is therefore hard to tell, before further investigations have been performed, whether or not this method will be particularly suitable for making sub-micron interdigitated supercapacitors. However, high throughput nanoimprinting has been well-demonstrated[21] in a large-area rollto-roll and roll-to-plate set-up. We therefore firmly believe that it would in fact be possible to make large-scale production using this method, thus making it interesting with respect to the fabrication of micro-supercapacitors for on-chip applications. Pyrolysis processing[22]: uses SU-8 photoresist as starting material. This technique relies on the irreversible change of chemical composition and physical phase, by means of high temperature exposure. Patterns of carboneous material can in this way be made with very high aspect-ratios. Also, it has been shown that these photoresist derived structures can be charged and discharged, thus making this technique an interesting alternative to current fabrication methods for interdigitated microsupercapacitors, by means of adding a 3rd dimension. Using this method will thus allow a low-cost, well-controlled way of defining high-aspect ratio electrodes. In addition, the resist surface can easily be functionalized. The resolution of the defined electrode patterns using this technique is limited by the use of UV lithography, i.e. diffraction limited. LIGA[23]: is short for LItographie, Galvanoformung, Abformung. As the name of this technique indicates, it relies on three main process steps (in English:) Lithography, Electroplating and Molding ). In particular, using X-ray LIGA as a fabrication method it is possible to achieve very high aspect ratio microstructures (on the order of 100:1). A thin X-ray sensitive polymer resist, such as PMMA, is bonded onto an electrically conductive substrate and exposed to highly collimated high-energy synchronton radiated X-rays through a mask that is partly covered with X-ray absorbing material. Removing the exposed or unexposed photoresist chemically will result in very high aspect-ratio 3D structures. Filling these trenches with metal by electrodeposition is then possible. Finally the remaining resist is stripped and high-aspect ratio structures are left (this is, then, often used for replication through injection molding). We therefore suggest that this method can be used to obtain 3D structured interdigitated microsupercapacitors by electropheretic deposition of carbon-based electrodes, e.g. using small sheets of reduced graphene-oxide. Of the above mentioned methods, the pyrolysis and the LIGA processes offer the possibility to make high-aspect ratio 3D structures. Now, adding more electrode material by making higher structures will make it possible to store even more charge on the same planar area, making the maximum stored energy per area appreciably higher. This would then be interesting in the application for interdigitated supercapacitors with sub-micron electrode separation distance. The main advantage of the pyrolysis being low-cost way of mass-producing micro-supercapacitors. Due to the nature of collimated X-rays, the LIGA process will probably result in the finest structures of the methods in questions. Nanoimprinting will have the advantages of low-cost high-throughput devices. However, imprinting in a polymer on a nanometer-scale might result in uniformity in the structure, thus making this method more suitable for micro-sized dimensions. In summary, our proposal is to achieve higher power density by down-scaling the interdigitated planar dimensions and higher effective energy density per area by creating high-aspect ratio 3D electrodes. Figure 7 shows the prospects of our proposal, using an existing Ragone plot as reference[1]. 11

15 6 PERFORMANCE CHARACTERIZATION Figure 7: Ragone plot showing the energy and power densities of laser-scribed micro-supercapacitors (LSG-MSC) with different electrolytes, traditional sandwich structure, commercially available activated carbon supercapacitors (AC-SC), an electrolytic capacitor and a lithium-ion thin-film battery. The blue arrows are our suggestion to improving the energy and power densities, respectively[1]. The red arrow, then, is the overall intended outcome. 6 Performance characterization 6.1 Infuence of the active material and thickness of the electrode According to Stoller and Ruoff [24], the mass of the active material and thickness of the electrodes have influence on the characterization of the device performance. The electrodes should be of comparable thickness with commercial cell electrode thickness range of 10 µm to several hundreds µm. Electrodes with minute amounts of active material will lead to an overstatement of the active material performance. In our proposal, the electrode thickness would be much smaller compared to the electrode thickness suggested by the best practice method. Therefore, the performance achieved through our proposal may not be comparable with the best practice method. Nevertheless, in our proposal, we are more concern about the performance we can achieve in down-scaling micor-supercapacitors, while the suggestion provided by the best practice method are more for the purpose to assess the electrode s performance. Therefore, it will not be of our interest to comply with the best practice method. 6.2 Frequency response The frequency response of the micro-supercapacitors can be studied by electrochemical impedance spectroscopy (EIS). The dependence of phase angle with frequency of the microsupercapacitors can be plotted to study its frequency response. A graph of phase angle versus frequency is shown in the figure 8. From the plot, a characteristic frequency (f 0 ) at a phase angle of 45 o can be extrapolated and its corresponding time constant can be calculated (τ 0 = 1/f 0 ). The capacitive behavior dominates at frequencies lower than f 0 are equal and a more resistive behavior dominates at frequencies higher than f 0 [25]. Therefore, by comparing f 0, the frequency response of different micro-supercapacitors can be compared. The one with higher f 0 will be the one with better frequency response. 6.3 Energy density, Power density and rate capability According to the best practice methods recommended by Stoller and Ruoff [24] for determining performance of ultracapacitors, the device capacitance (C dev ) is best determined 12

16 6.3 Energy density, Power density and rate 6 capability PERFORMANCE CHARACTERIZATION Figure 8: Phase angle versus frequency graph for different micro-supercapacitors[3]. from galvanostatic discharge curves using the formula C dev = i dv/dt where i is the discharge current and dv/dt is the slope of the discharge curve. The volumetric capacitance is to be calculated based on the volume of the device, including the active area, the current collector and the electrolyte. The discharged energy and power of the device is to be calculated according to the equations below[1]: (5) E = C dev( E) 2 2 (6) ( E) P = 2 4R ESR (7) where E is the operating voltage and R ESR is the internal resistance of the device. The power and energy densities are then obtained based on the volume of the device. The rate capability of the device is determined by the extent, in which the device can perform effectively as a capacitor in an increasing charge/discharge rate. The higher the charge/discharge rate the device can sustain its function as a capacitor, the better the rate capability of the device. 13

17 7 CONCLUSION AND OUTLOOK 7 Conclusion and Outlook In conclusion, state-of-the-art of interdigitated planar micro-supercapacitors were reviewed. It was found that carbon-based electrode materials with solid-state gel-like electrolytes are suitable for the fabrication of high performance micro-supercapacitors. Several current fabrication methods were presented and the performance outcome was summarized in a table. In particular, the effects of interdigitated device geometry for graphene-based electrodes were discussed in comparison to conventional stacked device geometry. In the purpose to improve the device performance for portable electronics applications, the down-scale of current interdigitated micro-supercapacitors was proposed based on existing literatures. By down-scaling of the current design, our target is to improve the frequency response, rate capability and power density of the device. Furthermore, better portability and compatibility for on-chip intergration can also be achieved. Some possible fabrication methods for downscaling were discussed and the LIGA process was found to be the most feasible method for down-scaling and yet obtaining high aspect ratio of electrodes. The additional improvement in energy density of the device can be attained by creating a 3D electrode, on top of the improvement in power density by down-scaling. Therefore, miniaturized interdigitated micro-supercapacitor fabricated by LIGA process is particularly interesting for research purposes and possible commercialization. 14

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