Introduction to Digital Logic Missouri S&T University CPE 2210 Combinatorial Circuit Analysis and Synthesis

Transcription

1 Introduction to Digital Logic Missouri S&T University CPE 2210 Combinatorial Circuit Analysis and Synthesis Egemen K. Çetinkaya Department of Electrical & Computer Engineering Missouri University of Science and Technology 9 September 2016 rev Egemen K. Çetinkaya

2 Logic Analysis and Synthesis Outline Introduction Logic analysis Logic synthesis Summary 2

3 Logic Gates AND Gate Output is 1 if only both inputs are 1 Symbol: Truth table: x y AND F x y F

4 Logic Gates OR Gate Output is 1 if one input is 1 Symbol: Truth table: x y OR F x y F

5 Also known as inverter Symbol: Truth table: x Logic Gates NOT Gate N O T F x F

6 Boolean Algebra Properties Understand the important Boolean algebra properties commutativity distributivity associativity identity complementery null elements idempotent law involution law DeMorgan s law absorption law 6

7 Equations Boolean Representations Mappings allows simplification e.g. F = x Circuits using logic gates, represents actual physical implementation e.g. Truth tables represents all possible combinations of input values one function has only one truth table representation e.g. x x F F 7

8 Boolean Representations Mapping Conversion Equations to circuits Circuits to equations Equations to truth tables Truth tables to equations Circuits to truth tables Truth tables to circuits 8

9 Logic Analysis Notes Can be formally done via truth tables Exhaustively analyze output for each input We have been analyzing combinatorial circuits 9

10 Logic Synthesis Notes What are the steps of designing logic circuits? 10

11 Logic Synthesis Notes Combinatorial circuit design process: capture the behavior capture the function via truth table or equations convert the behavior into a circuit create equations/simplify as necessary implement as a gate-based circuit 11

12 Logic Synthesis Example Detect three consecutive 1s in 8-bit input: abcdefgh

13 Logic Synthesis Example Detect three consecutive 1s in 8-bit input: abcdefgh Capture the function: y = abc + bcd + cde + def + efg + fgh a b c d e f g h abc cde efg bcd def fgh y 13

14 Logic Analysis and Synthesis Simplification of Inputs Simplify equations via Boolean algebra Simplify circuit notations Listing inputs multiple times to reduce crossings a b c a b c a b 14

15 Logic Analysis and Synthesis Simplification of NOT Gates Simplify equations via Boolean algebra Simplify circuit notations Listing inputs multiple times to reduce crossings Use inversion bubbles to reduce NOT gates or list input as complemented Egemen K. Çetinkaya b a c a b c a b' c 15

16 Logic Analysis and Synthesis Example Egemen K. Çetinkaya 16

17 Logic Analysis and Synthesis Example Egemen K. Çetinkaya 17

18 Logic Analysis and Synthesis Summary Combinatorial logic circuit analysis truth table might be hard to construct for many inputs equations can be simplified via Boolean algebra circuits Combinatorial logic circuit design/synthesis capture behavior create equations simplify implement as a gate-based circuit 18

19 References and Further Reading [V2011] Frank Vahid, Digital Design with RTL Design, VHDL, and Verilog, 2nd edition, Wiley, [BV2009] Stephen Brown and Zvonko Vranesic, Fundamentals of Digital Logic with VHDL Design, 3rd edition, McGraw-Hill, [MKM2016] M. Morris Mano, Charles R. Kime, Tom Martin, Logic and Computer Design Fundamentals, 5th edition, Pearson, [W2006] John F. Wakerly, Digital Design Principles and Practices, 4th edition, Prentice Hall,

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