Experiment # 3 Introduction to Digital Logic Simulation and Xilinx Schematic Editor

Transcription

1 EE2L - Introution to Diitl Ciruits Exprimnt # 3 Exprimnt # 3 Introution to Diitl Loi Simultion n Xilinx Smti Eitor. Synopsis: Tis l introus CAD tool (Computr Ai Dsin tool) ll Xilinx Smti Eitor, wi is us in svrl ourss (sis EE2L) t USC to sin n simult iitl rwr. In tis l, w will implmnt prormml NAND t sin usin Xilinx Smti Eitor. 2. Ltur/Dmo Vio: Bor omin to t l sssion, you r rquir to wt t Introution to Xilinx Smti Eitor vio (post t t lss wsit). It is srn-ptur o n ntir sssion o Xilinx Smti Eitor strtin rom invokin t tool to smti ntry, tst ixtur rtion n simultion. 2l_prormml_NAND.m [Rvis: /3/8] /8

2 EE2L - Introution to Diitl Ciruits Exprimnt # 3 3. Prl: 3. Wt t Introution to Xilinx Smti Eitor ltur/mo vio. ( pts) Wt / Di not wt it yt. 3.2 Pls instll Xilinx Tools (Xilinx ISE, CipSop, n Molsim) on your om lptop / sktop. T stp-y-stp prour to instll t tools s n post to t lss wsit. (2 pts) Instll / Di not instll yt. Atr vin wt t ltur/mo vio, nswr t ollowin Prl qustions: Q 3. 3: Two nts wit sm nms (lls) ut not pysilly onnt to otr r loilly onnt to otr. (5 pts) Tru / Fls Q 3. 4: I tr is soli lu squr ot t t juntion rossin two wirs, ts wirs r (onnt/ not onnt) to otr. A (ollow r squr ot / soli lu squr ot) inits nlin n o wir. (5 pts) Q 3. 5: Mr. n Ms. Bruin m t smtis or -it r. Atr svin t smtis, ty wnt to run t Molsim - Simult Bviorl Mol (Unr Prosss). Wt i ty ort to o? (5 pts) Q 3. 6: Mr. n Ms. Bruin inlly mn to t Molsim to run ut v no lu out ow to vriy tir sin rom tr. Wt o ty n to o? (5 pts) Q 3. 7: How o you rt symol? (5pts) Q 3. 8: How o you swit twn sts? (5 pts) For oin to t nxt st: For oin k to t prvious st: Q 3. 9: Wt is t purpos o lllin n instn o sin (or xmpl o t iv 2-to- 4 ors in tr-or ormin 4-to-6 or)? (5 pts) 2l_prormml_NAND.m [Rvis: /3/8] 2/8

3 EE2L - Introution to Diitl Ciruits Exprimnt # 3 4. Prour: 4. Follow t uilins ivn in t tutoril xris (post t t lss wsit) n implmnt n simult t 4-it r.. Tis is just to miliriz you wit t Xilinx Smti Eitor n Molsim. 4.2 Prormml NAND t, n or su vi: In intrin mmory to miroprossor, on ns to o ir orr its o t rss snt out y t prossor (in mmory r or writ trnstion). For xmpl, t Intl 888 prossor puts out 2 it rss on 2 rss lins [A(9:)]. Sin 2 2 = M lotions = 2 8 * 2 2 = 256 o 6 K lotions; you n us 256 6KB mmory ips to ill up t myt rss sp. In smll pplition, you my not ully popult t ntir myt rss sp wit mmory ips. Inst, you my v w 6KB mmory ips oupyin slt 6KB slots o t 256 slots. Dpnin on t slot you oos to us or 6KB mmory ip, you n to slt tt 6KB mmory ip, only wn (i n only i) prtiulr omintion o t 8 ir orr rss its A(9:2). For xmpl, i your 6KB mmory ip is oupyin t irst 6KB slot tr t ottom l-myt, tn A(9:2) =. So w n to nrt low-tiv ips slt sinl CS wn A(9:2) =. Tirty yrs k su rss oin ws on usin TTL ips. A TTL sin is sown ov. Tis sin uss n 8-input NAND t n svrl invrtrs. Tis mns too mny ips n too mu wirin. W r lookin or on-ip solution wi n us or numr o omintions o A(9:2), (not just suitl or only on omintion, A(9:2) = ). Wt i w mk oniurl (prormml) NAND t wr t usr n oos invrt or not to invrt n input or t sinl rs t NAND t. A2 A3 A4 A5 A6 A7 A8 A9 CS W know rom our EE, tt 2-input XOR A I Y Y A Y t n us s oniurl invrtr s I S INV sown on t si. Wn t INV (or invrt) ontrol is, t input is invrt n ivn to t INV output. Wn t INV ontrol is, t input is ivn to t output witout invrsion. Not: Tis n iv y usin 2-to- mux lso. So, on possil on-ip solution is to pk n 8-input NAND t wit 8 XOR ts n provi to t usr t 8 INV ontrol pins s sown on t si. T only prolm wit tis sin is tt it s too mny pins n t ost o t ip is too mu. inv_ inv_ inv_ inv_ inv_ inv_ inv_ inv_ CS 2l_prormml_NAND.m [Rvis: /3/8] 3/8

4 EE2L - Introution to Diitl Ciruits Exprimnt # 3 I w oro t ility to invrt ll 8 inputs n r to invrt only 7 inputs t most, tn w v 8 ois o invrtin, nmly oos to invrt zro inputs to oos to invrt 7 inputs. Ts 8 ois (nmly, inv_, inv_, inv_, inv_, inv_, inv_, inv_ =,,,,,, stnin or zro invrtrs to inv_, inv_, inv_, inv_, inv_, inv_, inv_ =,,,,,, stnin or svn invrtrs) n no into tr its. Hn, w will v tr prormmin pins, ll p[2:]. T 8 omintions o tr pins r onvrt to t 8 omintions o t 7 ontrol lins y t Spil nor sown in t jnt iur. W ll t sin in t jnt ox, n 8-it prormml NAND t. Inst o uilin tis irtly, r in tis l, w will uil 4-it prormml NAND t in prt o t l n us two o ts (n itionl loi) to uil t 8-it prormml NAND t. Spil nor inv_ inv_ inv_ inv_ inv_ inv_ inv_ CS 4.3 Crt nw projt unr C:/xilinx_projts/. Hr, w r oin to implmnt (n simult) on Xilinx Smti Eitor, prormml NAND t. In prt w implmnt 4- it prormml NAND t n in prt 2 n 8-it prormml NAND t. Prtilly omplt sins r ivn to you. You n to omplt t sin n simult it. Unrstn t spiitions n omplt t sin or proin. 4.4 Spiitions or t 4-it prormml NAND t- Prt Trut Tl or t Spil Enor inv_ inv_ inv_ Spil Enor inv_ inv_ inv_ y_r y_r or CS_r,,, -- Inputs to t NAND t p [:] -- Prormmin inputs (2-its) T init t numr o inputs tt n to invrt. p [:] n tk vlus in t rn -3 T two xtrm ss r. wn no input is invrt (p [:] = ) 2. 3 o t 4 inputs r invrt (p [:] = 3) y_r All otr omintions Wn p [:] = Non o t inputs r invrt, Output y_r = (...) Wn p [:] = input is invrt ( is invrt), Output y_r = (...) Wn p [:] = 2 2 inputs r invrt ( & r invrt), Output y_r = (...) Wn p [:] = 3 3 inputs r invrt (, & r invrt), Output y_r = (...) 2l_prormml_NAND.m [Rvis: /3/8] 4/8

5 EE2L - Introution to Diitl Ciruits Exprimnt # Driv t ooln xprssion or t sinls (inv_, inv_, inv_) n rw t AND OR implmnttion o t ontrol sinls (inv_, inv_, inv_) or t spil nor. 4.6 Gt your ppr-pn sin k y t TA n tn omplt t sin in Xilinx Smti Eitor. 4.7 Atr ompltin t smti ntry prt, rt vrilo tst ixtur to tst t sin. A smpl inomplt vrilo tst ixtur is lry provi to you (s prt o t.zip il or tis projt). Followin t uilins ivn in t xilinx smti ntry tutoril xris, omplt t tst ixtur to simult t sin xustivly. Tt is, t simultion pttrns soul xust ll possil input omintions. Us Molsim to simult t sin usin t tst ixtur you wrot. You n sk lp rom your TA in rtin t vrilo tst ixtur il. Do not sitt to sk lp s tis is your irst simultion xris usin CAD tool n w o xpt tt stunts will xprin iiulty. 4.8 Atr ompltin Prt n nsurin tt t sin works orrtly, rt symol o t 4-it prormml NAND t. (us t tutoril xris or uilins.) 4.9 For Prt 2, sin n 8-it prormml NAND t (wit t ollowin spiition), usin 2 o t 4-it prormml NAND ts (sin in prt) n som itionl loi. y_r 4. Spiitions or t 8-it prormml y_r NAND t:,,,,,,, -- Inputs to t NAND t p [2:] -- Prormmin inputs (3-its) Inits t numr o inputs tt n to invrt. p n tk vlus in t rn -7 T two xtrm ss r. wn no input is invrt (p = ) 2. 7 o t 8 inputs r invrt (p = 7) All otr omintions Wn p [2:] = Non o t inputs r invrt, Output y_r = (...) Wn p [2:] = input is invrt ( is invrt), Output y_r = (...) Wn p [2:] = 2 2 inputs r invrt ( & r invrt), Output y_r = (....) Wn p [2:] = 7 7 inputs r invrt (,,,,,, r invrt), Output y_r = ( ) 2l_prormml_NAND.m [Rvis: /3/8] 5/8

6 EE2L - Introution to Diitl Ciruits Exprimnt # 3 Hints or rrivin t t Prt 2 sin: -- Suppos w wir 4 o t 8 inputs (,,, ) to on 4-it prormml NAND t (instn ll: TOP) n t otr 4 inputs (,,, ) to t otr 4-it prormml NAND t (instn ll: BOT or ottom) s sown on t si. -- E o t two 4-it prormml NAND ts will provi us ility to invrt 3 inputs. So, s is, w n invrt t most 6 inputs. But w n to invrt totl o 7 inputs. So lt us v n xtrnl XOR t in t input o t TOP to invrt t input or rtin pproprit omintions o,,. So t moii sust sin is s sown low. Complt t untion tl or t Spil Enor low. Spil Enor top_ top_ ot_ ot_ TOP BOT y_r y_r top_ ot_? y_r Trut Tl or t Spil Enor or Prt 2 _inv top_ top_ ot_ ot inv Spil Enor top_ top_ ot_ ot_ TOP BOT top_y_r ot_y_r y_r 4. Complt t trut tl ov n lso i wt t you wis to us or ominin t top_y_r n ot_y_r into t ovrll y_r. You n to sumit tis. 4.2 As in prt, rt t smti in Xilinx Smti Eitor, rt vrilo tst ixtur n vriy your sin. 2l_prormml_NAND.m [Rvis: /3/8] 6/8

7 EE2L - Introution to Diitl Ciruits Exprimnt # 3 5. L Rport: Nm: L Sssion: Dt: TA s Sintur: For TAs: Prl (out o 65): Rport (out o 85): Commnts: Q 5. : Sumit t omplt trut tl n t inl t prouin t ovrll y_r. (5 pts) Trut Tl or t Spil Enor or Prt 2 _inv top_ top_ ot_ ot inv Spil Enor top_ top_ ot_ ot_ TOP F BOT F top_y_r ot_y_r y_r Q 5. 2: Print n tt t ollowin itms to tis rport. Your TA will miliriz you wit t ommns to tk printouts. () t smtis (pro_nn_4_inp.s, pro_nn_8_inp.s), (3 pts) () t vrilo tst ixtur il (pro_nn_4_inp_t.v, pro_nn_8_inp_t.v), ( pts) () t portion o t Prt wvorm sowin t omintion o inputs,,, ( pts) or wi t output sinl, y_r, oms zro, wn, =, n t portion o t Prt 2 wvorm sowin t omintion o inputs ( pts),,,,,,, or wi t output sinl, y_r, oms zro, wn,, =,,. Q 5. 3: Ar t ollowin, vli simultion ommns? Try tm on t molsim tool n nswr.( pts) VSIM>run 2ns VSIM>run 2 VSIM>run 2 ns VSIM>run 2 yls (Vli / Invli) (Vli / Invli) (Vli / Invli) (Vli / Invli) 2l_prormml_NAND.m [Rvis: /3/8] 7/8

8 EE2L - Introution to Diitl Ciruits Exprimnt # 3 p() p() inv_ XOR2 inv_ XOR2 inv_ NAND4 XOR2 y_r p(:) p(:) 2l_prormml_NAND.m [Rvis: /3/8] 8/8