Semiconductors. PN junction. n- type

Transcription

1 Semicoductors. PN juctio We have reviously looked at the electroic roerties of itrisic, - tye ad - time semicoductors. Now we will look at what haes to the electroic structure ad macroscoic characteristics (e.g. curret- volatge, etc.) as we brig - ad - tye semicoductors together. Thus, we shall cosider the P- N juctio. First, we shall look at how the electroic structure is affected across the P- N juctio. I the followig we assume for simlicity that both - ad - tye semicoductors have idetical atomic structures ad bad gas ad oly differ i the ositio of the Fermi level. We will address questios related to surface coditios as well as to the bad ga variatios later i this module. Cosider a - juctio with N D doors ad N A accetors o the - ad - tye sides resectively. If these are fully ioised at room temerature the the electro ad hole cocetratios are: = N ad = N. These are the majority carrier desities. The suerscrit idicates the side of the juctio. There will also be small but imortat cocetratios of the oosite, miority carriers, i each regio, which ca be calculated from the law of mass actio: = ad = related to surface coditios as well as to the bad ga variatios later i this module. CB N doors CB E F E F - tye VB - tye VB N accetors N doors

2 Figure A. A juctio i thermal equilibrium with zero bias voltage alied. Electros ad holes cocetratio are reorted resectively with blue ad red lies. Grey regios are charge eutral. Evetually, the state of equilibrium is reached oce electrostatic iteractio ad diffusio balace each other. This equilibrium is achieved with the aid of the diffusio of the majority of carriers o each side ito directio of carrier miority: holes diffuse ito - tye material ad electros diffuse ito - tye. The equilibrium situatio is the as follows: Electro eergy E F CB VB ev B CB E F VB

3 Potetial diffrece (volts) V B x Free carrier cocetratio N D N A holes electros x Deletio layer Oce the equilibrium is reached the Fermi eergy is costat across the device ad there is a built- i otetial differece V B. The absece of free carriers meas that the otetial differece is droed across the deletio layer givig a high electric field there ad the eergy bads are bet i the deletio layer to form a ste. The height of the ste i eergy is ev B. Let s follow the coductio bad edge from the - to the - side. The CB lie corresods to the eergy of a electro at rest otetial eergy (as kietic eergy is zero). We ca see that alog CB lie the otetial eergy of the electro is icreased by ev B. Similarly, the otetial eergy of a hole would icrease as it moves from the - to - regio dow the ste i the valece bad. The juctio ossesses roerties which have useful alicatios i moder electroics. Both - doed ad - doed semicoductors are relatively good coductors, but the juctio betwee them ca become deleted of charge carriers, ad hece ocoductive, deedig o the relative voltages of the two semicoductor regios. By maiulatig this o- coductive layer, juctios are commoly used as diodes: circuit elemets that allow a flow of electricity i oe directio but ot i the other (oosite) directio. This roerty is exlaied i terms of forward bias ad reverse bias, where the term bias refers to a alicatio of electric voltage to the juctio. Normally, juctios are maufactured from a sigle crystal with differet doat cocetratios diffused across it. Creatig a semicoductor from two searate ieces of material would itroduce a grai boudary betwee the semicoductors which severely limits its usage by scatterig the electros ad holes.

4 IDEAL JUNCTION: BAND PICTURE Oe circuit E o ev B ε F Forward bias E o - E ε F e(v B - V) I - V

5 Reverse bias (ideal) E o E e(v B V r ) ε F - V r Reverse bias (real) E o E e(v B V r ) ε F Thermal geeratio - V r I=very small

6 JUNCTION: CURRENT FLOWS, DIODE EQUATION Oe circuit i 2 / N A J e (- ) J e (- ) N D =ex(- ev B /kt) ε F ev B N D N A J h (- ) J h (- ) The electro flux from to side is limited by diffusio across the deletio layer with: j "## = Ae /" O the side the electros are miority carriers ad their cocetratio is extremely low ( i 2 /N A ), but they do ot require extra eergy to dro dow ito side, roducig what is called the drift (or geeratio) flux: If o exteral voltage is alied we must have: j "#$% ( ) N j "#$% = j "## = Ae /" A exteral voltage will lower or raise the otetial ste, so the diffusio flux will certaily chage due to chage i eergy differece (e.g. V B V), while drift flux ca be cosidered as uchaged (a reasoable first aroximatio). The total flux is the: We use aroximatio Bulk Sacecharge Layer (SCL) Bulk j = j "## V j "#$% V j "#$% V = j "#$% 0 = Ae /" (see above)

7 Hece j j "## V j "#$% 0 = Ae ()/" ) Ae " = Ae " e " " 1 ad the diode equatio ca be writte as j = j e " " 1 JUNCTION: I- V CHARACTERISTIC I T 1 ej drift ma ideal A V T 2 T 2 > T 1 Effect of light: I ~ hoto flux V Light off Light o

8 Built- i otetial differece, V B I thermal equilibrium with V ext = 0 the elctro desity o the side must be equal to the electro desity o side: N = N e /" ad fially V = kt e l N N