Inorganic Nanocomposite Solar Cells by Atomic Layer Deposition (ALD)

Transcription

1 Inorganic Nanocomposite Solar Cells by Atomic Layer Deposition (ALD) Investigators Stacey Bent, Professor, Department of Chemical Engineering; James S. Harris, Professor, Department of Electrical Engineering; Michael McGehee, Assistant Professor, Department of Materials Science and Engineering; Jeffrey King, Post-Doctoral Researcher; David Jackrel, Post-Doctoral Researcher; Evan Pickett, Graduate Researcher Introduction This project is a fundamental study into the development of low-cost, thin film solar cells. It explores the fabrication of semiconductor nanocomposites for photovoltaics using nanostructured inorganic materials and atomic layer deposition (ALD). The focus is on cells built by high-throughput techniques where nanoporous structures, ultrathin layers, and multiple junctions are used to achieve good energy conversion efficiencies at low cost. Background There is a strong need for the development of photovoltaic cells with low cost, high efficiency, and good stability. In thin film technologies, there exists a common problem with conversion efficiency due to poor materials quality; the photogenerated electrons and holes cannot travel very far before recombination (short free-carrier diffusion lengths) and are hence lost for power conversion. If the solar cell can be made using nanoscale heterojunctions, then every photogenerated carrier will have less distance to travel, and the problem of recombination can be greatly reduced. ALD is particularly well suited for this application since it can allow for highly uniform deposition on complex non-planar nanostructures with controllable thickness. With nanoscale diffusion lengths for the photogenerated carriers, the materials constraints can be relaxed, and low cost deposition routes become acceptable. A basic proposed structure for a nanostructured single-junction solar cell is illustrated in Figure 1, and consists of a nanostructured substrate that is coated with semiconducting layers through ALD and possibly other wet chemistry deposition techniques, such as chemical bath deposition or spray pyrolysis. Another related design involves first depositing the semiconductor absorber material in a planar geometry, then etching a periodic array of nanopores, and finally using ALD or other wet techniques to fill in the nanopores with an opposite polarity window layer to form the p/n junction. The absorber material could be composed of silicon, GaAs, CdTe, CIGS, or virtually any other solar cell material, since this layer can be deposited on a planar substrate and subsequently nanostructured. GCEP Technical Report

2 Figure 1: Schematic illustration of a single-junction nanostructured interpenetrated p/n junction solar cell, with an anodic alumina substrate. Results There are three major issues which must be addressed in the proposed solar cells. First is the development of the nanostructured substrates (or absorbers) with variable pore size and morphology. Second is the issue of deposition of the other material forming the p/n junction and the subsequent growth of additional layers into the nanostructured substrate, such as GaAs and other III-V materials, or CdTe, CdSe, and other II-VI materials. The third challenge is the electrical connection and current collection from all of the nanostructured p/n junctions. Nanostructuring The nanostructured substrates (or absorbers) could potentially be fabricated by three techniques: nanosphere lithography, laser interference (or holographic) lithography, or anodization of a metal such as aluminum.[1-3] The primary reason for nanostructuring is to create a device that is optically thick to efficiently absorb the incident sunlight, and to simultaneously have every photogenerated electron-hole pair be very close to the p/n junction with respect to the minority carrier diffusion length, to minimize recombination losses. The minority carrier diffusion length in high quality silicon can be as long as 1 mm, and only a few hundred microns of material are needed to absorb over 95% of the incident light. As a result, high quality silicon devices have achieved efficiencies near their theoretical limit. With poor quality (i.e. cheaply deposited) inorganic semiconductors, the diffusion length can be on the order of only 100 nm, while the absorption length is a micron at best. This leads to poor efficiencies in planar solar cells made from these materials, since only a small fraction of the sunlight is absorbed within a minority carrier diffusion length of the p/n junction, and many of the photogenerated minority carriers recombine before reaching the junction. Nanostructuring addresses this problem, provided the pore radius of the nanostructures is on the order of the minority carrier diffusion length, or about 100 nm. Nanosphere lithography is well-established for the nm length scales, and interference lithography for length scales above about 200 nm. Some preliminary studies using 100 nm and 200 nm carboxylated polystyrene nanospheres to pattern crystalline and amorphous silicon substrates are underway. The procedure involves spin-coating the nanospheres, followed by a reactive-ion etch (RIE) to reduce the sphere size, as illustrated in Figure 2. The spheres used for this preliminary study have poor size dispersity, which will be addressed by switching GCEP Technical Report

3 vendors for future studies. The next step involves depositing a few nanometers of Cr, and subsequently dissolving the spheres in a lift-off process, which leaves a film of metal protecting the silicon, with holes in the metal film where spheres previously were. Then the silicon can be reactive-ion etched to form pores with aspect ratios greater than 10:1. Figure 3 shows a nanostructured silicon substrate formed by this method. Figure 2: Carboxylated polystyrene nanospheres on a silicon substrate, after 90 sec RIE etch in O 2 plasma (originally ~100 nm in diameter). Note the large polydispersity in the sphere sizes. Figure 3: Nanostructured p-type monocrystalline silicon substrate. GCEP Technical Report

4 Nanostructured Solar Cell Materials The second major challenge is the deposition of the other material forming the p/n junction into the nanostructured substrate, and the larger concern of what solar cell materials are appropriate to nanostructure in general. A major thrust of the project work thus far has been focused on theoretical modeling in order to determine materials design parameters. We have performed initial modeling studies on single and multijunction device geometries, buffer layers, pore dimensions, and materials electrical and optical properties, such as bandgap, free-carrier mobility, free-carrier lifetime, doping density, and dielectric constant. Thus far the electrical properties have been modeled in a 1-D geometry (using the modeling program AMPS), or evaluated using models from the literature, but work is beginning on a 2-D and 3-D modeling program (DESSIS) in order to more fully investigate the effects of different nanostructure geometries and the effects of materials parameters on nanostructured devices.[4-6] Buffer layers that could be used to reduce the recombination at the p/n junction were 1-D modeled to evaluate different buffer layer/device materials combinations. Since the project is focused on novel device architectures, it was determined that it would simplify the development if well-established solar cell semiconductors could be used. Furthermore, the device performance of a candidate material should be limited by the minority carrier diffusion length in planar structures, since this is the problem that nanostructuring addresses. There are many inorganic solar cell materials that have short diffusion lengths when deposited cheaply; cheap deposition often leads to small grain poly-crystalline material, or large impurity concentrations (point defects). These short diffusion lengths, however, are often the result of recombination through traps which leads to short minority-carrier lifetimes. Unfortunately, the negative effects of short minority-carrier lifetimes, namely high dark current, will be greatly exacerbated by the large increase in junction area that occurs with nanostructuring. As a result, it appears that materials with short diffusion lengths caused primarily by short minority-carrier lifetimes may not be good candidates for nanostructuring. Instead, what would be desired is a material with a short diffusion length and a relatively long minority-carrier lifetime. This can only occur in materials with fairly low free-carrier mobilities, on the order of 1~10 cm 2 /V-s, such as hydrogenated amorphous silicon (a-si:h). Kayes, et al. pointed out in 2005 that, somewhat counter intuitively, a material that has a high freecarrier mobility, such as crystalline silicon or GaAs, would have excessive leakage current in a nanostructured interpenetrated p/n junction geometry; this would cause the open-circuit voltage, and thus the efficiency, to drop almost to zero.[6] From the combined results of all of the modeling, we have chosen hydrogenated amorphous silicon to be our first test material. We will have a-si:h films deposited on planar substrates, and then nanostructure them, and finally deposit a conformal layer of opposite polarity to form the interpenetrated p/n junction. The opposite polarity material will be deposited by both ALD and by chemical bath deposition. An ALD reactor is being built to deposit II-VI materials. CdTe and CdSe are common absorber layers used in thin film solar cells, and CdS is a commonly used heterojunction material for thin film solar cells. Furthermore, zinc compounds (ZnSe, ZnTe and ZnS) are possible alternative window materials (E g > 2.0 ev), and lead GCEP Technical Report

5 compounds (PbSe, PbTe, and PbS) are excellent narrow bandgap materials (E g < 0.5 ev) useful in third-generation multijunction and multiple electrons per photon solar cells. Thus, II-VI-like compounds of Cd, Zn and Pb, with Se, Te and S, cover the whole solar spectrum, and, being compound in nature, are readily depositable by ALD. Chemical bath deposition (CBD) is a solution-based deposition technique used for rapid, economical growth of thin films on a variety of substrates. The method is applicable for many different materials, including oxides and sulfides.[7] Specifically, CBD is a well-established technique for growth of CdS films in solar cell applications, and our first test structures will therefore be fabricated using this method. For CBD growth of CdS, a substrate is typically immersed in a hot ( C), well-stirred aqueous solution containing cadmium salt, a sulfur source (e.g. thiourea), an ammonia salt, and ammonia hydroxide. For our preliminary experiments, the deposition bath was maintained at 85 C and contained cadmium sulfate (CdSO 4 ), ammonium sulfate (NH 3 ) 2 SO 4, thiourea ((NH 2 ) 2 CS), ammonium hydroxide (NH 4 OH), and deionized water. Conditions were optimized to ensure that film growth occurs heterogeneously on the substrate and beaker walls, instead of homogeneously as colloidal particles in the bath.[8] For this to occur, NH 3 must be present in sufficient amounts to bind Cd 2+ in a Cd tetraamine complex. The use of ammonium sulfate helps stabilize this complex as well as control the ph of the bath. An SEM image of a planar CdS film grown via CBD is shown in Figure 4 below. Test structures of monocrystalline p-type silicon were nanostructured via nanosphere lithography, and a ~ 100 nm thick n-type CdS film was then deposited on the structure, as shown in Figures 5 and 6 below. Figure 4. Cross sectional view of CdS film on planar silicon substrate GCEP Technical Report

6 Figure 5. Cross sectional SEM image of CdS/Si nanostructured p-n junction. Figure 6. Cross sectional SEM image of CdS/Si nanostructured p-n junction at higher magnification. Electrical Connection and Current Collection The third challenge is the electrical connection and current collection from all of the nanostructured p/n junctions. The electrical connection will be made much simpler if the device structures can be planarized, either during or after growth. However, if the GCEP Technical Report

7 surface roughness is too great and standard metal evaporation is not sufficient to create a good electrical contact then alternative contact deposition techniques, such as screenprinting, will be investigated. One of the biggest fundamental electrical challenges facing interpenetrated p/n junction nanostructured solar cells is the recombination at the p/n junction interface. Recombination scales linearly with the junction area, and in these cells the junction area can be orders of magnitude larger than a planar design with the same solar cross-section. There has been some work done depositing thin buffer layers (~10 nm) in between the p- and n-type materials in nanostructured cells to suppress interfacial recombination.[9, 10] 1-D modeling was performed to evaluate the effects of different buffer layer/device materials combinations. It has been suggested that a buffer layer with appropriate conduction and valence band energies could reduce interfacial recombination by reducing free-carrier concentrations at the interface between the n- and p-type materials. This will increase the open-circuit voltage, but modeling shows it comes at the cost of the device current; the lower carrier concentrations near the junction interface also reduce the electric field strength which is needed to collect the photogenerated carriers. We have therefore determined that much of the benefit of buffer layers observed in nanostructured interpenetrated p/n junction solar cells is likely the result of improved interface chemistry (passivation) at the junction, rather than an altering of electron and hole concentrations through band-level engineering. The versatility and film thickness control afforded by ALD will be invaluable to experimentally investigate the effects of different buffer layers of various thicknesses in our cells (1~10 nm). We plan to investigate various materials combinations involving a-si:h as the absorber, such as n-cds/p-cdse/p-a-si:h. The p-type CdSe buffer layer moves the p/n junction interface to between the CdS and the CdSe, two very similar materials, and away from the CdS/a-Si:H interface, which will likely suffer from poorer interface chemistry and more recombination centers. Progress The current world record power conversion efficiency for single-junction hydrogenated amorphous silicon solar cells is just below 10%.[11] The world record for a multijunction hydrogenated amorphous silicon solar cell is below 13%.[11] Hydrogenated amorphous silicon has a bandgap of about 1.7 ev and the theoretical limit of efficiency for a solar cell with a 1.7 ev bandgap is above 25%. Some of the loss in efficiency in state of the art a-si:h cells is due to low open-circuit voltages and low fillfactors, neither of which could be improved by nanostructuring. However, our modeling has shown that if nanostructuring enabled the cells to achieve 100% quantum efficiency, then the current could be increased from 16 ma/cm 2 up to 21.5 ma/cm 2. Device modeling indicates that the increase in current would significantly increase the opencircuit voltage as well, and such a device could achieve a power conversion efficiency as high as 15%. These devices would be single-junction cells, manufactured largely without vacuum processing. We are therefore moving towards the design and fabrication of a nanostructured solar cell that could be made using low-cost production techniques at efficiencies matching current thin-film devices. GCEP Technical Report

8 Future Plans Nanostructured interpenetrated p/n junction solar cells will be investigated. The nanostructured substrates (or absorbers) could potentially be fabricated by three techniques: nanosphere lithography, laser interference (or holographic) lithography, or anodization of a metal such as aluminum. From the results of our modeling, we have chosen hydrogenated amorphous silicon to be our first test material. The opposite polarity material will be deposited by both ALD and by chemical bath deposition. An ALD reactor is being built to deposit II-VI materials. ALD will be invaluable to investigate the effects of different buffer layers in our cells. Our initial test structures will be fabricated using a p-type a-si:h absorber, a thin (~10 nm) p-type II-VI buffer layer deposited by ALD, and a chemical bath deposited n-type CdS window. Future device generations will potentially incorporate alternate absorber materials, such as thin films of CIGS and CdTe, fabricated by standard techniques as well as more inexpensive, lower quality techniques, such as chemical bath deposition. The free-carrier mobilites in many of the thin film materials are somewhat lower than bulk crystalline Si or GaAs and thus could be good candidates for nanostucturing as well. Finally, sub-cells with different bandgap absorber layers will be integrated monolithically to form a multijunction cell. The original proposal described a multijunction nanostructured cell comprised of conformally deposited semiconducting layers. Figure 7 illustrates two additional possibilities for multijunction cell structures. The wide bandgap material needs to filter the light before reaching the narrow bandgap material in order to reap all of the benefits of the multijunction design. In Figure 7a two separately nanostructured junctions are formed. The tunnel junction and the transparent material in the figure, forming the nanostructured substrate for the upper wide bandgap junction, would be deposited onto a finished narrow bandgap junction. In both sub-cells the light gray nanostructured pillars could be n-type semiconductors, or insulators (such as anodic alumina). For the structure in Figure 7b, only one nanostructuring process is needed. The narrow bandgap junction can be fabricated similarly to the single junction devices (growth #1 in the figure), but then a selective wet etch process would be performed to selectively remove half of each of the narrow bandgap layers, and leave the nanostructured scaffold intact. In a commercial process the etched materials may be recovered and reused. Finally, the tunnel junction and the wide bandgap layers would be grown in a re-growth step (growth #2 in the figure). Note the narrow bandgap material needs to be the first material grown in the re-growth, in order to form a single polarity layer (p-type in this example) on which to grow the tunnel junction and subsequent device layers. This creates some areas of the cell where the incoming light is not effectively filtered by the wide bandgap top sub-cell. Other possible disadvantages of the second design (Figure 7b) are that the tunnel junction is non-planar, and the process requires the complexity of added etching steps. On the other hand, it may be difficult in practice to nanostructure on top of a nanostructure, as in Figure 7a, and thus the structures in Figure 3b could be easier to fabricate with good uniformity. GCEP Technical Report

9 Figure 7: Two multijunction nanostructured interpenetrated p/n junction solar cell designs; a.) two independently nanostructured junctions, b.) an integrated nanostructured design, in which only one nanostructuring process is needed. The second junction is formed by a selective etch that leaves the nanostructured scaffolding, but removes two conformally grown p- and n- type materials (growth #1), followed by a re-growth (growth #2)that forms the upper junction. The materials properties and electrical device properties of each round of test structures will be characterized and modeled, and improvements in the materials and geometry will be incorporated into subsequent test structures. Future modeling studies will investigate nanostructure geometries and materials properties using the 2-D software DESSIS. Particularly, the effect of minority-carrier mobilities and lifetimes on the performance of solar cells with different nanostructures and interface properties will be investigated. Materials characterization will be performed using techniques such as SEM and TEM to determine the degree of pore-filling and film uniformity, and XRD to determine crystal structure and crystallinity. Scanning probe microscopy will be used to determine grain boundary and junction properties such as surface photovoltage at the nanometer length scale. XPS studies could be useful to determine the composition and bonding character of the surface species present before and after etching processes and buffer layer deposition. Optical absorption and photoluminescence will be performed to determine absorption coefficients and bandgaps. DLTS, deep-level transient spectroscopy could also be utilized to measure the non-radiative recombination centers (performed at Accent Optical, San Jose, CA), and spectral CL mapping could be used to determine uniformity and threading dislocation density (performed at NREL, Golden, CO). The device characterization will include photocurrent-voltage under simulated AM1.5 solar spectrum, spectral quantum efficiency, and capacitance-voltage measurements. GCEP Technical Report

10 Publications (none) References 1. Hulteen, J. C., Van Duyne, R. P. J. Vac. Sci. Technol. A 13, (1995) 2. Berger, V., Gauthier-Lafaye, O. & Costard, E. J. Appl. Phys. 82, (1997) 3. Diggle, J. W.,Downie, T. C. & Goulding, C. W. Chem. Rev. 69, 365 (1969) Kayes, B.M. and Atwater, H.A., J. Appl. Phys 97, (2005) 7.. Mane, R. S. and Lokhande, C. D., Mat. Chem. and Phys. 65, 1-31 (2000). 8. Oladeji, I. O. and Chow, L., J. Electrochem. Soc. 144, (1997) 9. Nanu, M., Schoonman, J., and Goossens, A., Nano Lett. 5(9), (2005) 10. Nanu, M., Schoonman, J., and Goossens, A., Adv. Func. Mat. 15(1), (2005) 11. Green, M.A., et al., Prog. Photovolt: Res. Appl. 14, (2006) Contacts Stacey Bent: sbent@stanford.edu James S. Harris: harris@snowmass.stanford.edu Michael McGehee: mmcgehee@stanford.edu GCEP Technical Report