N-Channel Lateral DMOS FETs
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1 N-Channel Lateral DMOS FETs (Available Only In Extended Hi-Rel Flow) Part Number V (BR)DS Min (V) V GS(th) Max (V) r DS(on) Max ( ) C rss Max (pf) t ON Max (ns) SDDE- 3.5 V GS = V.5 SDDE-.5 V GS = V.5 Ultra-High Speed Switching t ON : ns Ultra-Low Reverse Capacitance:. pf Low Guaranteed r 5 V Low Turn-On Threshold Voltage N-Channel Enhancement Mode High Speed System Performance Low Insertion Loss at High Frequencies Low Transfer Signal Loss Simple Driver Requirement Single Supply Operation Fast Analog Switch Fast Sample-and-Holds Pixel-Rate Switching DAC Deglitchers High-Speed Driver The are enhancement-mode MOSFETs designed for high speed low-glitch switching in audio, video, and high-frequency applications. The SDDE- is normally used for -V analog switching. These MOSFETs utilize lateral construction to achieve low capacitance and ultra-fast switching speeds. These MOSFETs do not have a gate protection Zener diode which results in lower gate leakage and voltage capability from gate to substrate. A poly-silicon gate is featured for manufacturing reliability. The SDDE/DE are available only in the extended hi-rel flow. The flow complies with the requirements of MIL-PRF-95 for JANTX discrete devices. For similar products see: quad array SD5I-, and Zener protected SDDE-/3DE-/5DE-. TO-6AF (TO-7) S Body Substrate (Case) 3 D G Top View Gate-Drain, Gate-Source Voltage V Gate-Substrate Voltage V Drain-Source Voltage SDDE V SDDE-) V Source-Drain Voltage SDDE- V SDDE- V Drain-Substrate Voltage SDDE- 3 V SDDE- 5 V Source-Substrate Voltage SDDE- 5 V SDDE- 5 V Drain Current ma Lead Temperature ( / 6 from case for seconds) C Storage Temperature to 5 C Operating Junction Temperature to 5 C Power Dissipation a mw Notes: a. Derate 3 mw/ C above 5 C Applications Information See Applications Note AN5 Document Number: 79 S-889 Rev. E, -Dec-
2 Limits SDDE- SDDE- Parameter Symbol b Test Conditions b Typ c Min Max Min Max Unit Static V GS = V BS = V, I D = A 35 3 Drain-Source Breakdown Voltage V (BR)DS V GS = V BS = 5 V, I D = na 3 Source-Drain Breakdown Voltage V (BR)SD V GD = V BD = 5 V, I S = na Drain-Substrate Breakdown Voltage V (BR)DBO V GB = V, I D = na, Source Open V Source-Substrate Breakdown Voltage V (BR)SBO V GB = V, I S = A, Drain Open Drain-Source Leakage I DS(off) V GS = V BS = 5 V Source-Drain Leakage I SD(off) V GD = V BD = 5 V V DS = V. V DS = V.9 V SD = V.5 na V SD = V.8 Gate Leakage I GBS V DB = V SB = V, V GB = V... Threshold Voltage V GS(th) V DS = V GS, I D = A, V SB = V V V GS = 5 V V Drain-Source On-Resistance r SB = V DS(on) I D = ma V GS = V V GS = 5 V 3 V GS = V 6 V GS = 5 V Dynamic Forward Transconductance g fs g os V DS = V, V SB = V, I D = ma f = khz.9 ms Gate Node Capacitance C (GS+GD+GB) Drain Node Capacitance C (GD+DB) V DS = V, f = MHz..5.5 Source Node Capacitance C (GS+SB) V GS = V BS = 5 V pf Reverse Transfer Capacitance C rss..5.5 Switching Turn-On Time Turn-Off Time t d(on).5 t r VSB V = V, V IN to 5 V, R G = 5.6 t d(off) V DD = 5 V, R L = 68 t f 6 ns Notes: a. T A = 5 C unless otherwise noted. DMCBB b. B is is the body (substrate) and V (BR) is breakdown. c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing. Document Number: 79 S-889 Rev. E, -Dec-
3 rds(on) Drain-Source On-Resistance ( ) On-Resistance vs. Gate-Source Voltage V GS = V 5 V V Leakage na na pa pa Leakage Current vs. Applied Voltage ID VGS = VBG = 5 V VGD = VBD = 5V VGB = V, Drain Open I S(off) I SBO I GSS (Diode) I D(off) 8 6 V SB Source-Body Voltage (V) pa 8 6 Applied Voltage (V) ( ) rds(on) Drain-Source On-Resistance ( ) R L On-Resistance vs. Temperature I D = 5 ma, V BS = V V GS = 5 V 5 V V V 6 6 T A Temperature ( C) Switching Characteristics gfs Forward Transconductance V GS(th) Gate-Source Threshold Voltage (V) 6 8 Common-Source Forward Transconductance vs. Drain Current V DS = 5 V V BS = V T A = 55 C 5 C 5 C 5 3 I D Drain Current (ma) Threshold Voltage vs. Temperature V GS = V DS = V TH I D = ma V BS = V 5 V V V.5 V 6 6 t f Fall Time (ns) T A Temperature ( C) Document Number: 79 S-889 Rev. E, -Dec- 3
4 V GS(th) Gate-Source Threshold Voltage (V) Threshold Voltage vs. Substrate-Source Voltage 5 3 V GS = V DS = V TH I D = A T A = 5 C H L Leakage (na) Leakage Current vs. Temperature I V GS = V BS = 5 V, V DS = V I V GD = V BD = 5 V, V SD = V I V GS = V I V SB = V Drain Open I GSS (Diode) I S(off) I D(off) I SBO V BS Body-Source Voltage (V) T A Temperature ( C) 8 Capacitance vs. Gate-Source Voltage V DS = V, f = MHz V GS = V BS A A A Body Leakage Current vs. Drain-Body Voltage I D = 3 ma Capacitance (pf) 6 C (GS+SB) C (GS+GD+GB) C (GD+DB) Body Leakage I B na na na pa pa ma C (DG) 8 6 pa 8 6 V GS Gate-Source Voltage (V) V DB Drain-Body Voltage (V) V DS = V I D = ma T A = 5 C Input Admittance V DS = V I D = ma T A = 5 C Forward Admittance g fs b is g is b fs Document Number: 79 S-889 Rev. E, -Dec-
5 V DS = V I D = ma T A = 5 C Reverse Admittance V DS = V I D = ma T A = 5 C Output Admittance 9 b rs. +g rg b og. g rg g og V BS = V T A = 5 C Output Characteristics. Output Conductance vs. Drain Current V BS = V f = khz Drain Current (ma) I D 3 V GS = 5 V V 3 V V gos Output Conductance V 5 V V DS = 5 V V DS Drain-Source Voltage (V) I D Drain Current (ma) To Scope +V DD +5 V 5 R L V OUT To Scope V IN V 5% V IN Input pulse: td, tr < ns Pulse width: ns Rep rate: MHz t d(on) t d(off) 5 Sampling Scope tr < 36 ps RIN = M CIN = pf BW = 5 MHz +V DD V OUT V t r 5% % t f 9% Document Number: 79 S-889 Rev. E, -Dec- 5
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