CTC Turbo Decoding Architecture for LTE Systems Implemented on FPGA

Transcription

1 ICN 01 : The Eleventh Internatnal Cnference n Netwrks CTC Turb Decdng Archtecture fr LTE Systems Implemented n FPGA Crstan Anghel, Valentn Stancu, Crstan Stancu, and Cnstantn Palelgu Telecmmuncatns Department Unversty Pltehnca f Bucharest Rmana canghel@cmm.pub.r, svl117@yah.cm, crstan@cmm.pub.r, pale@cmm.pub.r Abstract Ths paper descrbes a turb decder fr Lng Term Evlutn (LTE) standard, release 8, usng a Max Lg MAP algrthm. The Frward Errr Crrectn (FEC) blck dmensns, as ndcated n the standard, are nsde a range f 40 t 6144 bts. The cdng rate s 1/3, the puncturng blck nt beng taken nt dscussn here. The number f turb teratns s varable, but n ths study t was usually set t 3. The turb decder s mplemented n a Xlnx Vrtex-5 XC5VFX70T Feld Prgrammable Gate Array (FPGA). Keywrds- turb cdes; Max Lg MAP decder; FPGA mplementatn; LTE standard. I. INTRODUCTION The dscussns arund the channel cdng thery were ntense n the last decades, but even mre nterest arund ths tpc was added nce the turb cdes were fund by Berru, Glaveux, and Thtmajshma [1][][3]. At the begnnng f ther lfe, after prvng the btaned decdng perfrmances, the turb cdes were ntrduced n dfferent standards as recmmendatns, whle cnvlutnal cdes were stll mandatry. The reasn behnd ths decsn was especally the hgh cmplexty f turb decder mplementatn. But the turb cdes became mre attractve nce the supprts fr dgtal prcessng, lke Dgtal Sgnal Prcessr (DSP) r Feld Prgrammable Gate Array (FPGA), were extended mre and mre n terms f prcessng capacty. Tday the chps nclude dedcated hardware acceleratrs fr dfferent types f turb decders, but ths apprach makes them standard dependent. The Thrd-Generatn Partnershp Prject (3GPP) [4] s an rganzatn, whch adpted early these advanced cdng technques. Turb cdes were standardzed frm the frst versn f Unversal Mble Telecmmuncatns System (UMTS) technlgy, n The next UMTS releases (after Hgh Speed Packet Access was ntrduced) added supprt fr new and nterestng features, whle turb cdng remaned stll unchanged. Sme mdfcatns were ntrduced by the Lng Term Evlutn (LTE) standard [5][6], nt sgnfcant as vlume, but mprtant as cncept. Whle keepng exactly the same cdng structure as n UMTS, 3GPP prpsed fr LTE a new nterleaver scheme. Valent and Sun presented n [7] a UMTS dedcated turb decdng scheme. Due t the new LTE nterleaver, the decdng perfrmances are mprved cmpared wth the nes crrespndng t UMTS standard. Mrever, the new LTE nterleaver prvdes supprt fr the parallelzatn f the decdng prcess nsde the algrthm, takng advantage n the man prncple ntrduced by turb decdng,.e., the usage f extrnsc values frm ne turb teratn t anther. Ths paper presents an effcent slutn fr the hardware mplementatn f a Cnvlutnal Turb Cde (CTC) LTE decder. The ptmzatn ndcatrs refer t the used lgc area and t the btaned decdng speed. Als the level f perfrmances degradatn ntrduced by the fnte precsn representatn s taken nt accunt when selectng the fnal mplementatn slutn. The paper s rganzed as fllws. Sectn II descrbes the LTE cdng scheme wth the new ntrduced nterleaver. Sectn III presents the decdng algrthm. In Sectn IV, the mplementatn slutns and the prpsed decdng scheme are dscussed. Sectn V presents area and speed results btaned when targetng a XC5VFX70T [8] chp n Xlnx ML507 [9] bard; t als prvdes smulatn curves cmparng the results btaned when varyng the mst mprtant decdng parameters. Sectn VI presents the fnal cnclusns and the future perspectve f ths study. II. LTE CODING SCHEME The cdng scheme presented n 3GPP LTE specfcatn s a classc turb cdng scheme, ncludng tw cnsttuent encders and ne nterleaver mdule. It s descrbed n Fg. 1. One can bserve at the nput f the LTE turb encder the data blck C k. The K bts crrespndng t ths blck are sent as systematc bts at the utput n the steam X k. In the same tme, the data blck s prcessed by the frst cnsttuent encder resultng party bts Z k, whle the nterleaved data blck C k s prcessed by the secnd cnsttuent encder resultng party bts Z k. Cmbnng the systematc bts and the tw streams f party bts, the fllwng sequence s btaned at the utput f the encder: X 1, Z 1, Z 1, X, Z, Z,, X k, Z k, Z k. At the end f the cdng prcess, n rder t drve back the cnsttuent encders t the ntal state, the swtches frm Fg. 1 are mved frm pstn A t B. Snce the fnal states f the tw cnsttuent encders are dfferent, dependng n the nput data blck, ths swtchng prcedure wll generate tal bts fr each encder. These tal bts have t be transmtted tgether wth the systematc and party bts resultng the fllwng fnal sequence: X k1, Z k1, X k, Z k, X k3, Z k3, X k1, Z k1, X k, Z k, X k3, Z k3. Cpyrght (c) IARIA, 01. ISBN:

2 ICN 01 : The Eleventh Internatnal Cnference n Netwrks W(Xk) V1(Xk) SISO V(Xk) Interleaver V(X k) SISO Denterleaver Decsn ˆ Xk Fgure. LTE turb decder. Fgure 1. LTE CTC encder. As mentned befre, the nvelty ntrduced by the LTE standard n terms f turb cdng s the nterleaver mdule. The utput bts are rerganzed usng C = C, = 1,,..., K, (1) π( ) where the nterlvng functn π appled ver the utput ndex s defned as 1 π( ) = ( f f ) md K. () The length K f the nput data blck and the parameters f 1 and f are prvded n Table n [5]. III. DECODING ALGORITHM The LTE turb decdng scheme s depcted n Fg.. The tw Recursve Systematc Cnvlutnal (RSC) decders are usng n thery the Maxmum A Psterr (MAP) algrthm. Ths classc algrthm prvdes the best decdng perfrmances, but t suffers frm very hgh mplementatn cmplexty and t can lead t large dynamc range fr ts varables. Fr these reasns the MAP algrthm s used as a reference fr targeted decdng perfrmances, whle fr real mplementatn new sub-ptmal algrthms have been studed: Lgarthmc MAP (Lg MAP) [10], Maxmum Lg MAP (Max Lg MAP), Cnstant Lg MAP (Cnst Lg MAP) [11], and Lnear Lg MAP (Ln Lg MAP) [1]. Fr the prpsed decdng scheme, the Max Lg MAP algrthm s selected. Ths algrthm reduces the mplementatn cmplexty and cntrls the dynamc range prblem wth the cst f acceptable perfrmances degradatn, cmpared t classc MAP algrthm. The Max Lg MAP algrthm keeps frm Jacb lgarthm nly the frst term,.e., max*( x, y) = ln(e e ) = x max( x, y) ln(1 e ) max( x, y). y y x (3) The LTE turb decder trells dagram cntans 8 states. Each dagram state permts nputs and utputs. The branch metrc between the states S and S j s ( X ) X ( j) ( Z ) Z ( j) γ = V,,, (4) j k k where X(,j) represents the data bt and Z(,j) s the party bt, s the Lg bth asscated t ne branch. Als Lkelhd Rat (LLR) fr the nput party bt. When Sft Input Sft Output (SISO) 1 decder s taken nt dscussn, whle fr SISO t becmes ths nput LLR s ; V(X k )=V 1 (X k ) represents the sum between ( ) and W(X k ) fr SISO 1 and V(X k )=V (X k ) represents the nterleaved versn f the dfference between 1 and W(X k ) fr SISO. In Fg., W(X k ) s the extrnsc are the utput LLRs nfrmatn and ( ) 1 X k and generated by the tw SISOs. In the LTE turb encder case, there are 4 pssble values fr the branch metrcs between states n the trells: γ = 0 0 γ = V 1 γ = ( Zk ) ( X ) ( Z ) γ = V. k The decdng prcess s based n gng frward and backward thrugh the trells. A. Backward recursn The trells s cvered backward and the cmputed metrcs are stred n a nrmalzed frm at each nde f the trells. These stred values are used fr the LLR cmputatn at the trells frward recursn. The backward metrc fr the S state at the k th stage s β k ( S ), where k K 3 and 0 7. The backward recursn s ntalzed wth β K 3 ( S0 ) = 0 and β K 3 ( S ) = 0, > 0. k X k (5) Cpyrght (c) IARIA, 01. ISBN:

3 ICN 01 : The Eleventh Internatnal Cnference n Netwrks Startng frm the stage k=k and cntnung thrugh the trells untl stage k=, the cmputed backward metrcs are { } ( S ) ( S ) ( S ) ˆ β = max ( β γ ),( β γ ), (6) k k j j k j j where ( S ) ˆk β represents the un-nrmalzed metrc and S j1 and S j are the tw states frm stage k1 cnnected t the state S frm stage k. After the cmputatn f ˆk β ( S 0 ) value, the rest f the backward metrcs are nrmalzed as ( S ) ˆ ( S ) ˆ ( S ) β = β β (7) k k k and then stred n the dedcated memry. B. Frward recursn Durng the frward recursn, the trells s cvered n the nrmal drectn, ths prcess beng smlar wth the ne specfc fr Vterb algrthm. Nw nly the frward metrcs frm the last stage (k-1) have t be stred, n rder t allw the cmputatn f the current stage (k) metrcs. The frward metrc fr the state S at the stage k s αk ( S ) wth 0 k K 1 and 0 7. The frward recursn s ntalzed wth α 0 ( S0 ) = 0 and α 0 ( S ) = 0, > 0. Startng frm the stage k=1 and cntnung thrugh the trells untl the last stage k=k, the un-nrmalzed frward metrcs are gven by 0 ( S ) { 1 ( S 1 ) 1 1 ( S ) } ˆ α = max ( α γ ),( α γ ), (8) k j k j k j where S 1 and S are the tw states frm stage k-1 cnnected t the state S j frm stage k. After the cmputatn f α value, the rest f the frward metrcs are nrmalzed ˆk ( S 0 ) as ( S ) ( S ) ( S ) α = ˆ α ˆ α. (9) k k k Because the frward metrcs α are cmputed fr the stage k, the decdng algrthm can btan n the same tme a LLR estmated fr the data bts X k. Ths LLR s fund the frst tme by cnsderng that the lkelhd f the cnnectn between the state S at k-1 stage and the state S j at k stage s ( j) 1 ( S ) ( S ) λ, = α γ β. (10) k k j k j The lkelhd f havng a bt equal t 1 (r 0) s when the Jacb lgarthm f all the branch lkelhds crrespnds t 1 (r 0) and thus: 0 ( X ) λ ( j) λ ( j) = max {, } max {, }, (11) k k k ( S S j ): X = 1 ( S S j ): X = 0 where max peratr s recursvely cmputed ver the branches, whch have at the nput a bt f 1 ( S S ) : X 1 ( S S ) : X = 0. { j = } r a bt f 0 { j } IV. PROPOSED DECODING SCHEME A. Blck Scheme Snce ne cnsttuent decder extrnsc utputs are nputs fr the ther, and because the nterleavng r denterleavng prcedure s appled ver data blcks, the peratng perds fr the tw cnsttuent decders are nt verlapped. Thus, the decdng scheme can use a sngle cnsttuent decder, whch perates tme-multplexed. The prpsed scheme s depcted n Fg. 3 and t s based n the prevus wrk presented n [13] fr a WMAX CTC decder. The memry blcks are used fr strng data frm ne sem-teratn t anther and frm ne teratn t anther. SISO 1 reads the memry lcatns crrespndng t V 1 (X k ) and vectrs. The readng prcess s perfrmed frward and backward and t serves the frst sem-teratn. At the end f ths prcess, SISO reads frward and backward frm the memry blcks crrespndng t V (X k ) and vectrs n rder t perfrm the secnd semteratn. Vectr V 1 (X k ) s btaned by addng the nput vectr wth the extrnsc nfrmatn vectr W(X k ). After havng the nput data ready, SISO 1 starts the decdng prcess. At the utput, the LLRs are avalable sequentally, at 8 clck perds dstance. Perfrmng the subtractn between these LLRs and the extrnsc values W(X k ), the vectr V (X k ) s cmputed and then stred nt ts crrespndng memry. The nterleavng prcess s started and the re-rdered LLRs V (X k ) are stred n ther memry, where the crrespndng values fr the 3 tal bts X k1, X k, X k3 are als added n the last memry lcatns. The secnd sem-teratn can start at ths pnt. The same SISO unt s used, but readng ths tme data nputs frm the ther memry blcks. As ne can see frm Fg. 3, tw swtchng mechansms are ncluded n the scheme. When n pstn 1, the memry blcks fr V 1 (X k ) and are used, whle n pstn the memry blcks fr V (X k ) and becme actve. At the utput f the SISO unt, after each sem-teratn, K LLRs are btaned. The nes crrespndng t the secnd memry, then they sem-teratn are stred n the are denterleaved and fnally they are stred n the memry. Subtractng frm these denterleaved LLRs the values f V (X k ) vectr, the extrnsc nfrmatn W(X k ) s btaned. Als, f the decder perfrms the last Cpyrght (c) IARIA, 01. ISBN:

4 ICN 01 : The Eleventh Internatnal Cnference n Netwrks W(Xk) W(Xk) memry (Xk) memry (Zk) memry ( ) X k ( ) Z k V1(Xk) memry 1 V1(Xk) 1 V(X k) RSC (SISO1 r SISO) 1 ( X ) 1 k V(Xk) memry V(Xk) Interleaver V(X k) memry (Z k) memry (X k) memry Denterleaver (Xk) memry Xˆ k Fgure 3. Prpsed turb decder blck scheme. secnd sem-teratn, the hard decsn s made ver these denterleaved LLRs, resultng ths way the decded bts. In rder t be able t handle all the data blck dmensns, the used memry blcks have 6144 lcatns (ths s the maxmum data blck length), except the nes strng the nput data fr RSCs, whch have lcatns, ncludng here als the tal bts. Each memry lcatns s 10 bts wde, the frst bt beng used fr the sgn, the next 6 bts representng the nteger part and the last 3 bts ndcatng the fractnal part. Ths frmat was decded studyng the dynamc range f the varables (fr the nteger part) and the varatns f the decdng perfrmances (fr the fractnal part). B. The Interleaver The nterleaver mdule s used bth fr nterleavng and denterleavng. The nterleaved ndex s btaned based n a mdfed frm f (),.e., ( ) ( ) π = {[ f f md K ] }md K. (1) 1 In rder t btan bth functns, ether the nput data s stred n the memry n natural rder and then t s read n nterleaved rder, ether the nput data s stred n the nterleaved rder and then t s read n natural rder. Fg. 4 depcts the mplementatn slutn fr ths mdule. As ne can bserve frm Fg. 4, the nterleaved ndex cmputatn s perfrmed n three steps. Frst the value fr ( f1 f ) md K s cmputed. Ths partal result s multpled by natural rder ndex and then a new mdul K functn s appled. In the frst stage f ths prcess, the remark that the frmula s ncreased wth f fr cnsecutve values f ndex s used. Ths way, a regster value s ncreased wth f at each new ndex. If the resulted value s bgger than K, the value f K s subtracted frm the regster value. Ths prcessng s ne clck perd lng, ths beng the reasn why data s generated n a cntnuus manner. f 1 f (f 1 f ) md K md K () In the secnd stage, a ppe-lne multpler s used fr btanng the result f the multplcatn between ndex and the frst stage resulted value. The prduct result s btaned after 13 clck perds and t s 6 bts wde. In the thrd stage ths result s cmpared wth values n K, wth n between 13 and 0. Less subtractn fr cmputng mdul K functn are perfrmed ths way, the ttal number f clck perds beng reduced frm 614 t 13. At the end f ths thrd stage the nterleaved ndexes are btaned. C. The SISO mdule The nternal SISO scheme s presented n Fg. 5. One can ntce bth the un-nrmalzed metrc cmputng blcks ALPHA (frward) and BETA (backward), and the transtn metrc cmputng blck GAMMA, whch n addtn ncludes the nrmalzatn functn (subtract the metrcs fr the frst state frm all the ther metrcs). The L blck cmputes the utput LLRs, whch are nrmalzed by the NORM blck. The MUX-MAX blck selects nputs crrespndng t the frward r backward recursn and cmputes the maxmum functn. The MEM BETA blck stres the backward metrcs, whch are cmputed befre frward metrcs. The metrc nrmalzatn s requred t preserve the dynamc range. Wthut nrmalzatn, the frward and backward metrc wdth shuld be wder n rder t avd saturatn, whch means mre memry blcks, mre cmplex arthmetc (.e., mre used resurces), and lwer frequency (as an verall cnsequence). Hence, reducng the lgc levels by elmnatng the nrmalzng prcedure des nt ncrease the system perfrmances. V 1 ( X k ) / V ( X k ) ( Zk ) / GAMMA Zk ( ) StartTrells Reset 8 X R ALPHA BETA MUX MAX MEM BETA L NORM 1 ( X k ) / ( X k ) Fgure 4. Prpsed nterleaver lgc scheme. Fgure 5. Prpsed SISO blck scheme. Cpyrght (c) IARIA, 01. ISBN:

5 ICN 01 : The Eleventh Internatnal Cnference n Netwrks The ALPHA, BETA, and GAMMA blcks are mplemented n a dedcated way. Each metrc crrespndng t each state s cmputed separately, nt usng the same functn wth dfferent nput parameters. Cnsequently, 16 equatns shuld be used fr transtn metrc cmputatn ( pssble transtns fr each f the 8 states frm a stage). In fact, nly 4 equatns are needed [as ndcated n (5)]; mrever, frm these 4 equatns ne f them leads t zer value, s that the cmputatnal effrt s mnmzed fr ths mplementatn slutn. BER QPSK, K=51 ter=1 ter= ter=3 ter=4 ter=5 A. Perfrmances V. IMPLEMENTATION RESULTS The used hardware prgrammng language s Very Hgh Speed Hardware Descrptn Language (VHDL). Fr the generatn f RAM/ ROM memry blcks Xlnx Cre Generatr 11.1 was used. The smulatns were perfrmed wth MdelSIM 6.5. The synthess prcess was dne usng Xlnx XST frm Xlnx ISE Usng these tls, the btaned system frequency when mplementng the decdng structure n a Xlnx XC5VFX70T-FFG1136 chp s arund 10 MHz. The ccuped area s arund 1000 (8.9%) slces frm a ttal f 1100, whle the used 18Kb memry blcks number s 3 frm a ttal f 96. B. Smulatns The fllwng perfrmance curves were btaned usng a fnte precsn Matlab smulatr. Ths apprach was selected because the Matlab smulatr prduces exactly the same utputs as the MdelSIM smulatr, whle the smulatn tme s smaller. All the smulatn results are usng the Max Lg MAP algrthm, and the results are presented fr dfferent types f decdng parameters varatns. All pctures descrbe the Bt Errr Rate (BER) versus Sgnal-t-Nse Rat (SNR) expressed as the rat between the energy per bt and the nse pwer spectral densty SNR [db] Fgure 7. Decdng perfrmances vs. number f teratns. Fg. 6 depcts the btaned perfrmances when executng the decdng prcess f the same nput data, n nfnte precsn and n fnte precsn. Fr fnte precsn, as mentned befre, a 10 bt frmat was used, ne bt fr the sgn, 6 bts fr the nteger part and 3 bts fr the fractnal part. In these smulatns, K=51 bts, the used mdulatn s QPSK, and the number f turb teratns s set t 3. Fg. 7 depcts the perfrmances mprvement when the number f turb teratns s ncreased. One can bserve that after a certan number f turb teratns the decdng mprvement s nt sgnfcant anymre and thus the added decded latency s nt justfed. In these smulatns, K=51 bts, the used mdulatn s QPSK, and the number f turb teratns s ncreased frm 1 t 5. Fnally, Fg. 8 descrbes the decdng perfrmances mprvement when the data blck sze ncreases. Fr these smulatns the used mdulatn s QPSK, the number f turb teratns s 3, and the data blck lengths are K=40, QPSK, K=51, 3 teratns nfnte precsn fnte precsn QPSK, 3 teratns K=40 K=51 K= BER 10-3 BER SNR [db] Fgure 6. Fnte precsn vs. nfnte precsn SNR [db] Fgure 8. Decdng perfrmances vs. blck dmensn. Cpyrght (c) IARIA, 01. ISBN:

6 ICN 01 : The Eleventh Internatnal Cnference n Netwrks K=51, and K=6144. One can bserve an mprvement f abut 1.8 db at BER = 10 - between the smallest and the bggest blck sze defned by standard (K=40 and K=6144). VI. CONCLUSIONS AND FUTURE WORKS The mst mprtant aspects regardng the FPGA mplementatn f a CTC decder fr LTE systems were presented n ths paper. Area and speed ptmzatn slutns have been prpsed based n the specfc decdng scheme. A very effcent methd f ncreasng the clck frequency was prpsed,.e., the nrmalzatn peratn frm the ALPHA/BETA updatng lp was remved frm that lp and dstrbuted nt the GAMMA blck and als nt the LLR cmputng blck. Smulatn and mplementatn results were gven fr dfferent data blck szes and fr dfferent number f turb teratns. The perspectve fr a future wrk s t mplement a stp crtern n rder t reduce the decdng latency. A pssble slutn s the stp the decdng teratns when sme ndcatrs are nt changng frm ne teratn t anther. ACKNOWLEDGMENTS Ths wrk was supprted under the Grant UEFISCDI PN-II- RU-TE n. 7/ REFERENCES [1] C. Berru, A. Glaveux, and P. Thtmajshma, Near Shannn Lmt Errr-Crrectng Cdng and Decdng: Turb Cdes, IEEE Prceedngs f the Int. Cnf. n Cmmuncatns, Geneva, Swtzerland, pp , May [] C. Berru and A. Glaveux, Near Optmum Errr Crrectng Cdng and Decdng: Turb-Cdes, IEEE Trans. Cmmuncatns, vl. 44, n. 10, pp , Oct [3] C. Berru and M. Jézéquel, Nn bnary cnvlutnal cdes fr turb cdng, Electrncs Letters, vl. 35, n. 1, pp. 9-40, Jan [4] Thrd Generatn Partnershp Prject. 3GPP hme page. last accessed n Nvember 011. [5] 3GPP TS 36.1 V8.7.0 (009-05) Techncal Specfcatn, 3 rd Generatn Partnershp Prject; Techncal Specfcatn Grup Rad Access Netwrk; Evlved Unversal Terrestral Rad Access (E- UTRA); Multplexng and channel cdng (Release 8). [6] F. Khan, LTE fr 4G Mble Bradband, Cambrdge Unversty Press, New Yrk, 009. [7] M. C. Valent and J. Sun, The UMTS Turb Cde and an Effcent Decder Implementatn Sutable fr Sftware-Defned Rads, Internatnal Jurnal f Wreless Infrmatn Netwrks, Vl. 8, N. 4, pp , Octber 001. [8] Xlnx Vrtex 5 famly user gude, retreved frm n January 011. [9] Xlnx ML507 evaluatn platfrm user gude, retreved frm n January 011. [10] P. Rbertsn, E. Vllebrun, and P. Heher, A Cmparsn f Optmal and Sub-Optmal MAP Decdng Algrthms Operatng n the Lg Dman, Prc. IEEE Internatnal Cnference n Cmmuncatns (ICC 95), Seattle, pp , June [11] S. Papaharalabs, P. Sweeney, and B. G. Evans, Cnstant lg-map decdng algrthm fr du-bnary turb cdes, Electrncs Letters Vlume 4, Issue 1, pp , June 006. [1] J. F. Cheng and T. Ottssn, Lnearly apprxmated lg-map algrthms fr turb decdng, Vehcular Technlgy Cnference Prceedngs, 000. VTC 000-Sprng Tky. 000 IEEE 51st Vlume 3, pp. 5 56, May 000. [13] C. Anghel, A. A. Enescu, C. Palelgu, and S. Cchna, CTC Turb Decdng Archtecture fr H-ARQ Capable WMAX Systems Implemented n FPGA, Nnth Internatnal Cnference n Netwrks ICN 010, Menures, France, Aprl 010. Cpyrght (c) IARIA, 01. ISBN: