CONTROL ENGINEERING LABORATORY

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1 Uiverity of Techology Departmet of Electrical Egieerig Cotrol Egieerig Lab. CONTROL ENGINEERING LABORATORY By Dr. Abdul. Rh. Humed M.Sc. Quay Salim Tawfeeq M.Sc. Nihad Mohammed Amee M.Sc. Waleed H. Habeeb September 3

2 Cotet -Eperimet Oe: Mathematical Model repoe. -Eperimet Two: Firt Order Sytem Aalyi. 3-Eperimet Three: Secod Order Sytem Aalyi. 4-Eperimet Four: State Space Repreetatio. 5-Eperimet Five: Steady State Error Aalyi 6-Eperimet Si: Root Locu plot. 7-Eperimet Seve: Bode Plot. 8-Eperimet Eight: Effect of additio of pole ad zero o the Root-Locu plot. 9-Eperimet Nie: Lead Compeatio Techique Baed o the Root-Locu Approach. -Eperimet Te: Lag Compeatio Techique Baed o the Root-Locu Approach.

3 Eperimet Oe Mathematical Model Repoe Object -To lear how to derive the trafer fuctio of a liear electric ytem. - To repreet the ytem repoe o peroal computer by uig Matlab ad Simulik with the trafer fuctio of the ytem. Theory The trafer fuctio of igle iput igle output dyamic ytem i defied a: G( Υ( Χ( ( Where Υ ( laplace traform of the output igal y( t Χ ( laplace traform of the iput igal ( t The block diagram which repreet equatio ( i how i figure (-. X( G( Y( Fig (- Trafer Fuctio block diagram. 3

4 Figure (- how the block diagram for cloed loop cotrol ytem. R( E( C( + G( - B( H( Fig. (- Block diagram of cloed loop cotrol ytem. Where G( i the proce (plat of the ytem. H( i the feedback meaurig uit (traducer. If the cloed loop cotrol ytem output igal C( doe ot follow the chage of iput referece R( the error igal E( i idicated, which may be poitive or egative. Ε ( R( Β( B ( C( H ( ( (3 Subtitutig for B( i ( from (3 the Ε ( R( C( Η( Where... (4 C( Ε( G(... (5 From (4 ad (5 the trafer fuctio become C( G(... R( + G( Η( (6 4

5 Note: if we have poitive feedback the trafer fuctio become C( G(... (7 R( G( Η( We ca fid the trafer fuctio of ay paive electric circuit by applyig kirckoff' law, for eample to fid the trafer fuctio of the (R-L-C circuit how i figure (-3. (t Ac ource R L C y(t The erie coectio equatio i writte a: Fig. (-3: (R-L-C circuit. di( t e i ( t L + i( t dt + R i( t dt C... ( 8 Where i(t i the curret i the loop. By takig Laplace traform ad aumig all iitial coditio are zero we get: Ε i ( L I( + I( + R I(... (9 C Ε ( I( C... ( 5

6 From (9 ad ( we get : E ( E ( ( C I( ( L + / C R i + E ( E ( i I( ( LC + RC ( ( By uig Matlab ad Simulik the trafer fuctio ca performed to repreet the electric circuit ad to obtai the ytem repoe a how i figure (-4. mu cope iput G( Fig. (-4: Matlab ad Simulik repreetatio. 6

7 Electric circuit (t Ac ource R. 68 KΩ C µ f y(t Τ( RC + Fig. (-5: (R-C circuit. (t A.c ource L. 5 Η R. 68 KΩ y(t Τ( ( L R + Fig. (-6: (L-R circuit. 7

8 (t Ac ource R. 68 KΩ L. 5 C Η µ f y(t T ( ( LC + RC + Fig. (-7: (R-L-C circuit. (t A.c ource R. 68 KΩ L. 5 Η R. 68 KΩ y(t T ( ( L R + Fig. (-8: (R-L-R circuit. UProcedure - For the trafer fuctio of figure (-5, (-6, (-7 ad (-8, apply uit tep fuctio (t ad how the output repoe y(t o peroal computer uig Matlab ad Simulik. - Plot the output repoe y (t. 8

9 Dicuio - Derive the trafer fuctio of the electric circuit. - Derive the Laplace traform of a tet igal : f ( t 3i wt 3- For the (R-C circuit how i figure (-5, plot the output repoe y(t for uit tep iput e(t mathematically. 9

10 Eperimet Two Firt Order Sytem Aalyi UObject To tudy the characteritic of time repoe of firt order cotrol ytem. UTheory The implet firt order cotrol ytem ca be repreeted by the paive filter (R-C circuit how i figure (-. (t A.c ource R C y(t Fig. (-: electric (R-C circuit. The trafer fuctio ca be obtaied a follow: Step : e i Where i(t ( t R i ( t + i ( t dt C i the curret i the loop. Step : Applyig Laplace traform aumig that the iitial coditio equal to zero, the equatio become: Ε i ( R I( + I( C E ( C I( Step 3: From ( ad (3 the trafer fuctio become:... ( ( (3

11 E ( E ( i RC + (... (4 The aalog olutio of the firt order ytem ca be obtaied from the op-amp active filter, figure (- C. µ f R KΩ V iput - V output R KΩ + Fig. (-: op-amp repreetatio. The ytem repoe to a uit tep iput for a firt order cotrol ytem ca be repreeted i figure (-3. Fig. (-3: The ytem repoe to a uit tep iput.

12 The block diagram repreetatio for figure (- i a how i figure (-4. R( k /(T+ C( Fig (-4: Block diagram repreetatio. Where T RC time cotat of the ytem, k the gai of op- amp. By uig Matlab ad Simulik the trafer fuctio ca performed to repreet it repoe a how i figure (-5. mu cope iput k /(T+ Fig. (-5: Block Diagram i Matlab.

13 Procedure - Coect the circuit a how i figure (-5, apply uit tep fuctio aumig that the time cotat T ad the value of k.5,, the ketch the ytem repoe y (t. - Repeat tep for a impule ad ramp iput. Dicuio - From equatio (4 fid the traiet repoe uig Laplace traform. - Why the output for 3 time cotat (3T i ot the ame for differet cae. 3- Do you oberve ay relatio betwee the output at oe time cotat (T ad the value of gai (k. 3

14 Eperimet Three Secod Order Sytem Aalyi UObject To tudy the characteritic of time repoe of ecod order cotrol ytem. UTheory The traiet repoe to uit tep for a ecod order cotrol ytem ca be repreeted i figure (3-. Fig. (3-: ecod order traiet repoe. Traiet repoe term are a follow: tr rie time (the time to reach - %, 5-95 % ad -9 % of the iput igal. tp peak time (the time to reach the maimum overhoot. 4

15 Mp maimum overhoot. t ettlig time (the time to reach 5% or % of teady tate error. We ca fid the ytem parameter by the equatio: ξ Π / ξ, Mp e tp / ω 3 t for 5% ξ ω 4 t for % ξω E E d ω d ω ξ, t r - β / ωd, β co - ξ Μp ma imum overhoot ω d dampig of atural frequecy ω atural frequecy ξ dampig ratio Figure (3- how the block diagram of cloed loop ecod order ytem R( E( C( + ω - + ξω Fig. (3-: block diagram of ecod order cotrol ytem. 5

16 6 The equatio become: ( ( ( ( ( H G G R C + G ξω ω ( + ( Η ( ( R C ω ω ξ ω + + By uig Matlab ad Simulik the block diagram repreetatio ca take the form: + - iput m u cope ξω ω + Fig. (3-3: Block diagram i Matlab. The practical circuit of the ecod order cotrol ytem ca repreeted uig two itegrator ad ummig circuit with a feedback with a uity gai coected to the ummig circuit throw a variable reitace a how i figure (3-4.

17 C. µ f Vout - + R KΩ R 5 KΩ R KΩ C. µ f Vi R KΩ R KΩ - + R KΩ - + R 33KΩ R 5 KΩ - + Fig. (3-4: practical circuit of the ecod order cotrol ytem. Procedure - Uig Matlab ad Simulik coect the circuit how i figure (3-3, how the uit tep repoe y (t o peroal computer for the value: ω ad ξ,.3,.7, The ketch the ytem repoe. - Repeat tep for the value: ξ.7 ad ω.5,, 4, Dicuio - For the value ξ.7 ad ω fid the rie time, peak time, ettlig time, ad the maimum peak value. - Do you oberve ay relatio betwee the ytem dampig ratio ad the ytem ettlig time. 3- Accordig to your meauremet ugget the relatiohip betwee the peak overhoot ad the dampig ratio. 7

18 Eperimet Four State Space Repreetatio UObjectU To repreet a moder comple ytem uig firt order differetial equatio of tate pace aalyi. UTheory The moder tred i egieerig cotrol ytem i toward greater compleity due to the requiremet of comple tak ad good accuracy. Moder comple ytem may have may iput ad may output liear or oliear ytem, to aalyze uch ytem it i eetial to reduce the compleity of the mathematical epreio State-pace repreetatio of differetial equatio ued to aalyi ad deig of multi-iput multi-output, liear or o-liear, time-variat or timeivariat ytem. Thi ew approach i baed o the cocept of tate; o we mut defie the tate variable, tate vector ad tate pace. State Variable: the tate variable of a dyamic ytem are the mallet et of variable which determie the tate of the dyamic ytem, if (-variable are eeded to completely decribe the behavior of the dyamic ytem the the variable t ( t... ( are a et of tate variable. (,, t State Vector: if (-tate variable are eeded to completely decribe the behavior of a give ytem, the the (-tate variable ca be coidered to be a compoet of a tate vector X (t. 8

19 State Space: if the (-dimeioal pace whoe coordiate ai coit of the ai ai ai... ai,, i called a tate pace. Sytem deig i moder cotrol theory ca: Eable the egieer to deig a optimal cotrol ytem. Deig multiple-iput ad multiple-output ytem, which may be liear or oliear ytem. Eable the egieer to iclude iitial coditio i the deig. For the ordiary differetial equatio of -order we ca fid the tate pace repreetatio by obtaiig the algebraic equatio ad the output equatio, which i a et of the firt-order differetial equatio. Coider the ytem defied by y + a y a y' + a y u ( We ca fid the tate pace repreetatio by aumig that y y'... y The the equatio ca be writte a. ' '.. 3 ' ' a... a + u 9

20 The the algebraic equatio of the firt-order differetial equatio ca be writte a: Where The output equatio for the firt order differetial equatio ca be writte a: ( 3... C y Where ,,, ' B ad a a a a A ad X [ ]..... C ad (... ' u B A X +

21 Coider the R-L-C circuit v(t Ac ource R L C vc(t Fig. (4-: R-L-C circuit. I vector-matri otatio, we have: dvc C dt i di L + R i + vc dt i v.. v R L L L C i + vc [ v] [ ] y i vc

22 Eample: Coider the ytem defied by u y y y y ' '' ''' Where (y i the output ad (u i the iput of the ytem Solutio: The output equatio ad the tate equatio ca be writte a u obtai ca we y y y let ' 3 3 ' ' '' 3 ' + [ ] ' ' ' y u

23 By uig Matlab ad Simulik the trafer fuctio of the ytem ca perform to repreet the ytem repoe o peroal computer a how i figure (4-. iput 3 ' A + Bu y C m u cope Fig. (4-: Matlab ad Simulik repreetatio. Procedure. Coect the circuit of figure (4- ad apply a uit tep iput igal.. Plot the output ytem repoe y (t. Dicuio. Derive the trafer fuctio of the (R-L-R circuit, ad the fid the tate pace repreetatio of the circuit.. Fid the output y(t for the ytem repreeted by trafer fuctio how i figure (4- aalytically ad compare with the imulated reult. (Aumig all iitial coditio i zero 3

24 Eperimet Five Steady State Error Aalyi Object -To how how to claify the teady tate error accordig to the type of the ytem. -To how the ability of cotrol ytem to follow tep, ramp ad parabolic iput. Theory The Steady-State error i cotrolled ytem idicate the goode of the cotroller Figure (5- how the block diagram for cloed loop cotrol ytem. R( E( C( + G( - B( H( Fig. (5-: Block Diagram for cloed loop cotrol ytem. If the cloed loop cotrol ytem output igal C( doe ot follow the chage of iput referece R( the error igal E( i idicated. Ε ( R( Β(... ( B ( C( H ( Subtitutig for B( i ( from ( the Ε ( R( C( Η( Where C( Ε( G( ( (3 (4 4

25 From (3 ad (4 the trafer fuctio become C( R( G( + G( Η(... (5 The we ca fid that E( R( + G( Η(... (6 Table (5-: how the teady tate error i term of gai K. Step iput R (t Ramp iput R (t t Acceleratio R (t t^ Type ytem / (+k Ifiity Ifiity Type ytem /Kv Ifiity Type ytem /Ka The error coefficiet Kp, Kv, Ka decribe the ability of the ytem to reduce or elimiate the Steady-State error. Therefore they are idicative of teady tate performace. By uig Matlab ad Simulik the trafer fuctio ca performed to repreet the ytem repoe to tep iput i peroal computer a how i figure (5- for type zero, figure (5-3 for type oe ad figure (5-4 for type two. 5

26 iput + - S + m u cope Fig. (5-: Matlab ad Simulik repreetatio. iput S + - S + m u cope Fig. (5-3: Matlab ad Simulik repreetatio. iput + - S S + m u cope Fig. (5-4: Matlab ad Simulik repreetatio. 6

27 Procedure - For the block diagram of figure (5-, (5-3 ad (5-4 how the output repoe y (t for a uit tep iput o peroal computer uig Matlab ad Simulik. - Repeat tep for a ramp iput. Dicuio. Derive the trafer fuctio of figure (5-, (5-3 ad (5-4.. Fid the teady tate error uig Laplace traform for a uit tep, ad ramp iput. 3. Compare the reult obtaied with the imulated reult. 7

28 Eperimet Si Root Locu plot Object -To locate the cloed loop pole i -plae. -To ivetigate the cloed loop ytem tability. Theory A root loci plot i imply a plot of the zero ad the pole value o a graph with real ad imagiary coordiate. The root locu i a curve of the locatio of the pole of a trafer fuctio a ome parameter i varied. Such a plot how clearly the cotributio of each ope loop pole or zero to the locatio of the cloed loop pole. Thi method i very powerful graphical techique for ivetigatig the effect of the variatio of a ytem parameter o the locatio of the cloed loop pole. The cloed loop pole are the root of the characteritic equatio of the ytem while the locu of the root a the gai varie from zero to ifiity. From the deig viewpoit, i ome ytem imple gai adjutmet ca move the cloed loop pole to the deired locatio. Root loci are completed to elect the bet parameter value for tability. A ormal iterpretatio of improvig tability i whe the real part of a pole i further left of the imagiary ai. A cotrol ytem i ofte developed ito a equatio a how below Y ( U ( F( N( D( F( K ( z ( z ( zm ( p ( p ( p ( p 3 ( ( 8

29 9 ( ( ( ( ( ( ( ( ( ( m where p p p p D z z z N m > 4 3 ( 3 m p p p p whe F z z z whe F 3,, (, ( A typical feedback ytem i how i figure ( E( C( Y( H( R( K G( Fig. (6-: block diagram of feedback cotrol ytem. The ope-loop trafer fuctio betwee the iput R( ad the meaured output Y( i: ( 5... ( ( ( H G K T The cloed-loop trafer fuctio i: ( ( ( ( ( 6... ( ( ( ( ( + S H S G K the R C if H G K G K R C

30 It ca be writte a: K G( H (... ( 7 θ KG( H ( odd multiple of 8... (8 The comple umber i polar form have the followig propertie: Z Z ( Z Z Z + Z ad Z Z Z Z ad Z Z Z Z Z Z Eample For a cloed loop ytem G(, H ( ( + The root locu plot ca be obtaied from the cloed loop characteritic equatio: + + K The root of the characteritic equatio: ± K whe K the pole at, whe K the pole at whe K ± j 3

31 The relevat root locu i a how i figure (6-. Fig.(6-: The relevat root locu. The ytem i table for all value of K. Eample For a cloed loop ytem ( G, H ( + The root locu plot ca be obtaied from the cloed loop characteritic equatio: + K + 3

32 The root of the characteritic equatio: K ± K whe K the pole at + j, j whe K the pole at whe K The relevat root locu i a how i figure (6-3 Fig.(6-3: The relevat root locu. The ytem ha the bet tability poit at K, at value below thi root loci move toward the itability boudary. Procedure Uig MATLAB ad SIMULINK to draw the root locu diagram for the followig trafer fuctio: G ( (3 + + ( + 3

33 Ue the itructio: um [ ] ; de cov ( [3 ],[ ] ; rlocu( um, de; Dicuio. What i the type ad order of the ytem?. From the imulated reult obtaied i the ytem table. 3. Draw the theoretical (aymptotic oly polar plot of the ope loop ytem ad compare it with the imulated reult. 4- What are the advatage of root locu method? 33

34 Eperimet Seve Bode Plot Object -To tudy the frequecy repoe aalyi by uig bode plot algorithm. -To ivetigate the cloed loop ytem tability uig ope loop trafer fuctio. Theory The frequecy repoe i the teady tate repoe of a ytem to a iuoidal iput; the category i the plot of the magitude of the output i db veru frequecy uig logarithmic cale, ad the phae hift veru frequecy a i figure (7-. Fiq. (7-: Bode plot 34

35 The frequecy repoe characteritic of the ytem ca be obtaied directly from the iuoidal trafer fuctio i which "" i replaced by "jw", where "w" i the frequecy. Coider the liear time ivariat ytem how i figure (7- where the trafer fuctio i G( ad the iput i a iuoidal ad it i give by (t ad the output i y (t : X( T( Y( Fig. (7-: liear time ivariat ytem. i / p X o / p y i i ( ωt ( ωt + φ Show G (jw i comple quatity ad it ca be writte a: jφ ( jω G( jω e G G ( jw log (Re + (Im φ G( jω y ta ( t X G( jω ( t X G( jω ( ωt + φ y i imagiary part of [ real part of G e j ( wt + φ j( wt + φ e j G( jω ( jω ] 35

36 The amplitude ad phae hift ratio of the output to the iput i give by: G G ( jω ( jω y X ( jω ( jω y( jω X ( jω To completely characterize a liear ytem i the frequecy domai we mut pecify both the amplitude ratio ad the phae agle a fuctio of frequecy. Eample G ( ( + 4 ( ( + ( + 5( + For the ope loop trafer fuctio: Fid the cloed loop frequecy repoe. Solutio: Replace ( by (jw G ( jw ( jw + 4 ( jw( jw + ( jw + 5( jw + Fid the overall gai G ( jw jw jw jw jw 5 ( jw

37 G The plot of the magitude of the output veru frequecy ad the phae hift veru frequecy uig emi-log paper. jw 4 ( jw log.4 + log + log jw log + log + log + G( jw + ta w 9 ta 4 w ta jw w ta 5 w jw 5 jw Figure (7-3 how the cloed loop frequecy repoe. Fig. (7-3: cloed loop frequecy repoe. Eample Fid the teady tate repoe for the ytem where the ope loop trafer fuctio i give by: G ( (

38 38 Figure (7-4 how the cloed loop frequecy repoe. Fig. (7-4 cloed loop frequecy repoe. ( w w j w w j ζ ; ζ ζ + r r w w w w w w M ta ω ω ω ω ξ φ

39 Procedure Uig Mat lab ad Semolia to draw the bode diagram for the followig trafer fuctio: G ( H ( + ( + ( Ue the itructio: um [ ] ; de cov ( [ ],[ 6 8] ; bode( um, de; Dicuio. From the value of G.M. ad the P.M. I the ytem table?. Draw the theoretical (aymptotic oly bode plot of the ope loop ytem ad compare it with the imulated reult. 3. What are the advatage of frequecy repoe method? 39

40 Eperimet Eight Effect of the Additio of Pole ad Zero o the Root-Locu plot Object : To tudy the addig effect of the pole ad zero o the reultat output root-locu hapig.ad to tudy their effect o the time repoe. Theory : The root-locu method i a graphical method for determiig the locatio of all cloed-loop pole from kowledge of the locatio of the ope-loop pole ad zero a ome parameter (uually the gai i varied from zero to ifiity. The method yield a clear idicatio of the effect of parameter adjutmet. I practice, the root-locu plot of a ytem may idicate that the deired performace caot be achieved jut by the adjutmet of gai. I fact, i ome cae, the ytem may ot be table for all value of gai. The it i eceary to rehape the root loci to meet the performace pecificatio. I deigig a cotrol ytem, if other tha a gai adjutmet i required, we mut modify the origial root loci by iertig a uitable compeator. Oce the effect o the root locu of the additio of pole ad/or zero are fully udertood, we ca readily determie the locatio of the pole( ad zero( of the compeator that will rehape the root locu a deired. I eece, i the deig by the root-locu method, the root loci of the ytem are rehaped through the ue of a compeator o that a pair of domiat cloed-loop pole ca be placed at the deired locatio. (Ofte, the dampig ratio ad u - damped atural frequecy of a pair of domiat cloed-loop pole are pecified. Effect of the Additio of Pole: The additio of a pole to the ope-loop trafer fuctio ha the effect of pullig the root locu to the right, tedig to lower the ytem relative tability ad to low dow the ettlig of the repoe Figure (8- how eample of root loci illutratig the effect of the additio of a pole to a igle-pole ytem ad the additio of two pole to a igle-pole ytem. 4

41 Figure (8- Procedure:. For the ope loop trafer fuctio G( 4 / ( +, plot the root locu by uig the followig program: clear um[4]; de[ ]; rlocu(um,de; Root Locu.6.4. Imagiary Ai Real Ai 4

42 . Ad the, we have to ee output repoe (cloed loop ytem with uity feedback for the uit tep with uig the followig program : clear um[4]; de[ 4]; t:.5:; ctep(um,de,t; plot(t,c; grid o; Repeat tep ( ad with addig a igle real pole Repeat tep ( ad with addig a igle real pole Repeat tep ( ad with addig a igle real pole - 6. Compare the reultat hape of the root locu with the actual ytem o the ame graphical paper. Dicuio: Dicu the effect of addig a pole o the root locu hape, through the relative tability. Dicu the effect of addig a pole o time repoe, through the peed Repoe, overhoot.etc. 4

43 Effect of the Additio of Zero: The additio of a zero to the ope-loop trafer fuctio ha the effect of pullig the root locu to the left, tedig to make the ytem more table ad to peed up the ettlig of the repoe. (Phyically, the additio of a zero i the feedforward trafer fuctio mea the additio of derivative cotrol to the ytem. The effect of uch cotrol i to itroduce a degree of aticipatio ito the ytem ad peed up the traiet repoe. Figure (8-(a how the root loci for a ytem that i table for mall gai but utable for large gai. Figure (8-(b, (c, ad (d how root-locu plot for the ytem whe a zero i added to the ope-loop trafer fuctio. Notice that whe a zero i added to the ytem of Figure (8-(a, it become table for all value of gai. Figure (8- (a Root-locu plot of a three-pole ytem; (b, (c, ad (d root-locu plot howig effect of additio of a zero to the three-pole ytem. 43

44 Procedure:. For the ope loop trafer fuctio G( 4 / ( ^ + 5* + 6, plot the root locu by uig the followig program : clear um[4]; de[ 5 6 ]; rlocu(um,de; 6 Root Locu 4 Imagiary Ai Real Ai. Ad the, we have to ee output repoe (cloed loop ytem with uity feedback for the uit tep with uig the followig program clear um[4]; de[ 5 6 4]; t:.5:; ctep(um,de,t; plot(t,c; grid o; 44

45 Repeat tep ( ad with addig a igle real zero Repeat tep ( ad with addig a igle real zero Repeat tep ( ad with addig a igle real zero Compare the reultat hape of the root locu with the actual ytem o the ame graphical paper. Dicuio:. Dicu the effect of addig a zero o the root locu hape, through the relative tability.. Dicu the effect of addig a zero o time repoe, through the peed repoe, overhoot.etc. 45

46 Eperimet Nie Lead Compeatio Techique Baed o the Root-Locu Approach Object: To tudy ad deig the Lead Compeator uig Root-Locu. Theory: The root-locu approach to deig i very powerful whe the pecificatio are give i term of time-domai quatitie, uch a the dampig ratio ad u damped atural frequecy of the deired domiat cloed-loop pole, maimum overhoot, rie time, ad ettlig time. Coider a deig problem i which the origial ytem either i utable for all value of gai or i table but ha udeirable traiet-repoe characteritic. I uch a cae, the rehapig of the root locu i eceary i the broad eighborhood of the jω ai ad the origi i order that the domiat cloed-loop pole be at deired locatio i the comple plae. Thi problem may be olved by iertig a appropriate lead compeator i cacade with the feed forward trafer fuctio how i figure (9-. 9-: Figure (9- Oce, a compeator ha bee deiged, check to ee whether all performace pecificatio have bee met. If the compeated ytem doe ot meet the performace pecificatio, the repeat the deig procedure by adjutig the compeator pole ad zero util all uch pecificatio are met. 46

47 Lead Compeator: There are may way to realize cotiuou-time (or aalog lead compeator, uch a electroic etwork uig operatioal amplifier ad electrical RC etwork; Figure (9- how a electroic circuit uig operatioal amplifier. Figure (9- The trafer fuctio for thi circuit wa obtaied a follow: ( 47

48 Thi etwork ha a gai of Kc α R R4 / ( R R3 From Equatio (-, we ee that thi etwork i a lead etwork if R C > R C or α < i a lag etwork if R C < R C The pole-zero cofiguratio of thi et work whe R C > R C ad R C < R C are how i Figure (9-3(a ad (b, repectively. Lead etwork Lag etwork Figure (9-3 Procedure:. For the origial ytem below, fid the root locu with grid property : 48

49 Root Locu.46 Radial lie ofcotat dampig ratio ( Zeta.3.6 Imagiary Ai Real Ai. Ue the trafer fuctio of the lead compeator uig a value α.. 3. For three elected value ( T 4 / 3, T, T / 3 of zero poitio ( -/T, a three compeator will be made,plot the root locu for each compeated ope loop ytem ( uig grid property of the root locu. 4. Let the required dampig ratio( ζ.45, fid the domiat comple root, atural frequecy, ettlig time ad maimum overhoot by uig direct earchig o root locu plot with uig the followig table: 49

50 Compeator Domiat comple root Ope Loop gai Udamped freq, ω Mp % for % t (ec. K ( rad/ec Ucompeated Zero at T4/ Zero at T + + Zero at T/ Simulate (uig Simulik the time repoe (uit tep iput for the ucompeated ytem ad the three cae of lead compeatio o the oe cree of the ocillocope, uig ope loop gai for each cae. Dicuio:. For which purpoe the lead compeator i ued.. Dicu the effect of zero poitio o the hape of the root locu. 3. Dicu the effect of zero poitio o the time repoe. 5

51 Eperimet Te Lag Compeatio Techique Baed o the Root-Locu Approach Object: To tudy ad deig the Lag Compeator uig Root-Locu. Theory: Coider the problem of fidig a uitable compeatio etwork for the cae where the ytem ehibit atifactory traiet-repoe characteritic but uatifactory teady-tate characteritic. Compeatio i thi cae eetially coit of icreaig the ope- loop gai without appreciably chagig the traiet-repoe characteritic. Thi mea that the root locu i the eighborhood of the domiat cloed-loop pole hould ot be chaged appreciably, but the ope-loop gai hould be icreaed a much a eeded. Thi ca be accomplihed if a lag compeator i put i cacade with the give feedforward trafer fuctio a how i Figure ( -. - Electroic Lag Compeator Uig Operatioal Amplifier. The cofiguratio of the electroic lag compeator uig operatioal amplifier i the ame a that for the lead compeator a how i Figure (-. 5

52 Figure (- ice we talkig about lag compeator, therefore R C < R C i eetial coditio for the deig. 5

53 Lag compeator deig To avoid a appreciable chage i the root loci, the agle cotributio of the lag et work hould be limited to a mall amout, ay 5. To aure thi, we place the pole ad zero of the lag etwork relatively cloe together ad ear the origi of the plae. The the cloed-loop pole of the compeated ytem will be hifted oly lightly from their origial locatio. Hece, the traiet-repoe characteritic will be chaged oly lightly. Procedure of deig:. For the origial ytem below, fid the root locu with grid property: Root Locu.46 Radial lie ofcotat dampig ratio ( Zeta.3.6 Imagiary Ai Ue the trafer fuctio of the lag compeator Gc( : Real Ai 53

54 .. Ue the trafer fuctio of the lag compeator Gc( K β β > uig a value β. 3. For three elected value ( T 4, T 5, T of pole poitio ( - / β T, a three compeator will be made,plot the root locu for each compeated ope loop ytem ( uig grid property of the root locu. 4. Let the required dampig ratio( ζ.45, fid the domiat comple root, atural frequecy, ettlig time ad maimum overhoot by uig direct earchig o root locu plot with uig the followig table: 54

55 Compeator Domiat comple root Ope Loop gai Udamped freq, ω Mp % for % t (ec. K ( rad/ec Ucompeated pole at T pole at T pole at T Simulate (uig Simulik the time repoe (ramp iput for the ucompeated ytem ad the three cae of lag compeatio o the oe cree of the ocillocope, uig ope loop gai for each cae. Dicuio. For which purpoe the lag compeator i ued.. Dicu the effect of pole poitio o the hape of the root locu. 3. Dicu the effect of pole poitio o the time repoe. 55

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