Open Circuit Fault Analysis of Electrical Power System Using MATLAB

Transcription

1 Ope Circuit Fault Aalysis of Electrical Power System Usig MATLAB Daljeet Kaur Departmet of Electrical Egieerig GZSPTU Campus, Bathida, Idia Dr. S. K. Bath Departmet of Electrical Egieerig GZSPTU Campus, Bathida, Idia Darsha Sigh Sidhu Departmet of Electroics ad Commuicatio Egieerig GZSPTU Campus, Bathida, Idia Abstract The preset paper is devoted to study the behavior of power uder abormal coditios of ope circuit of trasmissio lies. Ope circuit faults have bee simulated o stadard IEEE bus ad bus s. State of the before ad after the fault has bee estimated i terms of s ad lie losses by solvig load flow. Newto Raphso method is implemeted usig MATLAB to solve load flow problem. Ope circuit coditios have bee simulated o the lies oe by oe ad their effect o the s has bee observed ad most critical lies are sorted out. To brig the voltages back with-i ormal rage, load sheddig techique has bee suggested. The criterio is to fid the bus which the load is to be shut dow for the repairig time of the faulty lie so as to brig the voltage magitude withi limits at other buses so that whole power is avoided ill-effects of fault. It is observed that lie losses ted to icrease due to fault but after load sheddig these come with-i same rage as before the fault. The aalysis of a power uder ope circuit faulty coditios is therefore importat to determie the values of voltages, so that protective measures are take to miimize the harmful effects of such cotigecies. Keywords voltages, Load flow, Ope circuit, Trasmissio lie, Uder-voltag, Load Sheddig. I. INTRODUCTION Power cotiues to icrease i size ad complexity due to techological developmet. Every year may more power statios, trasmissio lies ad substatios are costructed due to the icrease i demad for electrical eergy. This situatio icreases the fault levels i power s []. A electric power should esure the availability of electrical eergy without iterruptio to every load coected to the. Whe the electric power supply is exteded to remote villages the power would cosist of several thousad Kilometers of distributio lies. The high voltage trasmissio lies carryig bulk power could exted over several hudred Kilometers. Sice all these lies are geerally overhead lies ad are exposed, there are may chaces of their breakdow due to storms, fallig of exteral objects, damage to the isulators, etc. These ca result ot oly i mechaical damage but also i a electrical fault []. Ope Circuit fault occurs if a circuit is iterrupted by some failure. The effects of faults o power are: (i) Due to overheatig ad mechaical forces developed by faults, electrical equipmets such as bus-bars, geerators ad trasformers may be damaged. (ii) The voltage profile of the may be reduced to uacceptable limits as a result of fault. A frequecy drop may lead to istability []. The purpose of a electrical power is to geerate ad supply electrical eergy to cosumers with reliability ad ecoomy. I this paper, ope circuit fault aalysis o power is doe by usig MATLAB programmig. MATLAB is a powerful software package used for high performace scietific umerical computatio, data aalysis ad visualizatio[][]. II. PROBLEM FORMULATION Whe a trasmissio lie is ope circuited, durig such a emergecy situatio, the operatig persoel are ofte burdeed with a large volume of data ad are uder pressure of takig immediate decisios. Decisios uder such critical coditios are ot take util the voltage problems i the etwork are ot diagosed. Therefore, i this paper the voltage magitudes at buses durig opeig of trasmissio lies oe by oe has bee computed ad it has bee studied that voltage o which bus fall below the acceptable level ad the secodly, optimum load sheddig is doe to stabilize the voltage magitude. The mai objective of load sheddig, i case the state of operatio of the power goes dow to its critical level, is to keep the operative after a cotigecy. III. RESEARCH WORK Ope circuit fault aalysis has bee performed o stadard IEEE bus ad IEEE bus : (i) admittace matrix (ii) Newto Raphso method for load flow (iii) Ope circuit fault aalysis The compare the load flow programmig results with the ope circuit fault programmig results. The sigle lie diagram for stadard bus ad IEEE bus is show i Fig. ad Fig.. I bus, there are o. of trasmissio lies, PV buses ad PQ buses. I bus, there are o. of trasmissio lies, PV buses ad PQ buses.

2 Figure: Oe lie diagram for bus The power equipmet is desiged to operate at fixed voltages with allowable variatios of ± % as per rated KV. iii. Certai of δ i (state variable) must satisfy the iequality costrait ǀδi δkǀ ǀδi δkǀ max. This costrait limits the maximum permissible limits of power flow o a trasmissio lie coectig buses i ad k ad is imposed due to cosideratios of stability. Figure: Oe lie diagram for IEEE bus IV. LOAD FLOW ANALYSIS Load Flow Problem : I PQ buses, P ad Q are specified where as the ukows V ad δ are determied by load flow solutio. I PV buses, the kows are P ad V ad ukows are Q ad δ. For Slack bus, it is assumed that the V ad δ are kow, where as P ad Q are obtaied through the load flow solutio. The complex power ijected by the source ito i th bus of a power is, * S i = P i + Q i = V i J i i=,,,. () Where V i is the voltage at i th bus with respect to groud ad J i is the source curret ijected ito the bus. The load flow problem is hadled more coveietly by use of J i rather tha Ji *. Therefore, takig the complex cojugate of eq(), we have P i Q i = V * i J i ; i=,,,. Where is the umber of buses i the power etwork. Substitutig for J i = k= Yik V k, we ca write, P i Q i = V i k= YikV k Real ad Reactive powers ca be expressed as, P i = ǀV i ǀ k= ǀVkǀǀY ik ǀcos(Θ ik +δ k -δ i ) () Q i =- ǀV i ǀ k= ǀVkǀǀY ik ǀsi(Θ ik +δ k -δ i ) () For static load flow solutio to have practical sigificace, all the state ad cotrol variables must lie withi specified practical limits. These limits, dictated by specificatios of power hardware ad operatig costraits, are described below: i. maitude ǀV i ǀ must satisfy the iequality costraits. ii. ǀV i ǀ mi ǀV i ǀ ǀV i ǀ max. Load flow solutio: It is a techique that provides basic calculatio procedure i order to determie the characteristics of power uder steady state coditio [][]. Newto Raphso method is adopted for large etworks due to; Quadratic covergece characteristics. High accuracies obtaied i a few iteratios. No. of iteratios idepedet of the size of the. Newto Raphso Method: This method begis with iitial guesses of all ukow variables(v, δ at PQ buses ad δ at PV buses). Next a Taylor series is writte, with higher order terms igored, for each of the power balace equatios icluded i the of equatios. The result is liear of equatios that ca be expressed as : P δ = J () Q V Where ΔP & ΔQ are called mismatch equatios ad J is a matrix of partial derivatives kow as Jacobia P/ δ P/ V J = Q/ δ Q/ V Pi ad Qi are calculated equatio () ad (). ΔPi = Pi(specified)- Pi (calculated) ΔQi = Qi(specified)- Qi(calculated) The liearized of equatios is solved to determie the ext guess (r+) of voltage magitude ad agles. The process cotiues u till a stoppig coditio is met []. A commo stoppig coditio is to termiate if the mismatch equatios are below a specified tolerace. A solutio of the power flow problem usig Newto Raphso method is depicted i Fig. : Figure : Flow Chart for Newto Raphso Load Flow Method

3 voltage magitude V. ALGORITHM FOR OPEN CIRCUIT FAULT ANALYSIS Algorithm adopted for this type of aalysis cosists followig steps; ) Fid pre-fault coditios of voltage at each bus ad real power losses i the. ) Specify the ope circuited lie ad re-compute the bus admittace matrix. ) Ru the program for ope circuit aalysis. ) Compare the voltage magitudes of pre-fault ad post fault coditios. ) Observe that o which buses voltage magitude falls below the acceptable levels of ±%. ) Note dow those buses & their voltage magitudes. s at these buses is upgraded by removig the load (util the lie is ot repaired) those buses or buses which are earer to them. VI. METHODLOGY Iitially load flow solutio of the power is obtaied uder ormal coditios by usig Newto-Raphso method. Numerical computatios are doe by usig MATLAB. voltages ad Powers are calculated uder ormal coditios by solvig equatios (), () ad () The fault coditios have bee simulated by opeig the lies oe by oe. Each time whe a lie is opeed, load flow program is re-ru. Opeig of a lie affects the admittace of the etwork, which i tur affects the power flow o trasmissio lies ad s. It also affects the power loss of the. To brig the back to ormal operatig coditios durig fault, effect of load sheddig o s ad power losses has bee studied ad discussed below. VII. RESULTS AND DISCUSSION It is observed that some lies of the are most critical. I case of IEEE bus trasmissio lie oly lie o. is most critical i.e. by ope circuitig this lie, voltages o the buses are goig out of limits. The to make the voltage magitude as ormal, load sheddig criterio is implemeted o each bus. This criterio is used to fid out the bus which the load is to be shut dow to stabilize the voltage magitude at other buses. Same methodology has bee implemeted o IEEE bus trasmissio lies, there are three lies that are most critical i.e. lie o., ad. The results for these affected lies are discussed below. the results for IEEE bus ad it is see that durig the outage of lie o. (that is coected betwee bus o. ad ) the voltage magitudes at each bus fall below the acceptable levels of ±% except buses,, ad ad it is observed that by reducig the load demad bus o. for repairig time of that faulted lie, effected voltage magitudes becomes as ormal oe. This effect is show graphically i Fig.. Table : Effect o magitude o bus durig oe lie ope circuited ad sheddig. o. obtaied Effect o magitude after opeig lie o Effect o magitude sheddig Table : Effect o real power losses of bus load flow aalysis o ormal whe lie o. is ope circuited. sheddig. p.u.. p.u.. p.u.... Effect o voltage magitude prefault voltage magitude After lie o. ope circuited After load sheddig Firstly, discuss the results for bus, whe lie o. (coected betwee bus o. ad ) is ope circuited as show i table. It is see that voltage magitudes at bus o., ad fall below the acceptable levels of ±% ad it is observed that by reducig the load demad bus o. ad bus o. for some time (repairig time of that faulty lie), voltage magitudes o bus o., ad becomes as ormal oe as show i table. This effect is show graphically i Fig.. As see table, while comparig with pre-fault losses, real power loss o the icreases as lie o. is ope circuited ad after the load sheddig losses are reduced.... No. of buses Figure : Graph betwee voltage magitudes ad o. of buses of bus durig lie o. is ope circuited ad durig load sheddig Table, shows the effect o real power losses of bus after opeig a lie ad after reducig the load. Table, shows

4 Table: Effect o real power losses of bus durig outage of lie o. ad sheddig. load flow aalysis o ormal whe lie o. is ope circuited. sheddig. p.u.. p.u.. p.u. voltage magitude.... Effect o voltage magitude prefault voltage magitude After lie o. ope circuited After load sheddig Table : Effect o magitude of bus durig lie o. ope circuited ad sheddig. No. obtaied Effect o magitude after opeig lie o Effect o magitude sheddig No. of buses Figure : Graph betwee voltage magitudes ad o. of buses of bus durig lie o. is ope circuited ad durig load sheddig Table : Effect o real power losses of bus durig outage of lie o. ad sheddig. load flow aalysis o ormal whe lie o. is ope circuited. sheddig. p.u.. p.u.. p.u. Table & shows the effect o real power losses of bus after opeig lie o. & ad after reducig the load. From table, it is see that durig the outage of lie o. (that is coected betwee bus o. ad ) the voltage magitudes at bus o. fall below the acceptable level ad it is observed that by reducig the load demad bus o. ad for repairig time of that faulted lie, affected voltage magitudes becomes as ormal.

5 Table : Effect o magitude of bus durig lie o. ope circuited ad sheddig. No. obtaied Effect o magitude after opeig lie o Effect o magitude sheddig Table : Effect o real power losses of bus durig outage of lie o. ad sheddig. load flow aalysis o ormal whe lie o. is ope circuited. sheddig. p.u.. p.u.. p.u. From table, it is see that durig the outage of lie o. (that is coected betwee bus o. ad ) the voltage magitudes at bus o.,,, ad fall below the acceptable levels of ±% ad it is observed that by reducig the load demad bus o. ad for repairig time of that faulted lie, affected voltage magitudes becomes as ormal oe. Table : Effect o magitude of bus durig lie o. ope circuited ad sheddig. No. obtaied VIII. Effect o magitude after opeig lie o CONCLUSION Effect o magitude sheddig Above results shows that voltage magitude at buses decreases durig the outage of trasmissio lies. After the appropriate load sheddig, voltages are agai withi the rage of acceptable limits. Iformatio gaied above results ca be utilized to determie the effect o voltage at each bus of the durig ope circuit faults ad to take effective immediate decisios to make the voltages at all buses as ormal oe. Study ca help to take quick decisios to avoid or miimize ill effects of power faults. APPENDIX TEST SYSTEM DATA Ope circuit fault aalysis has bee doe o two stadard IEEE test s of bus lie ad bus lie. Lie data ad load data for these test s is give below:

6 Table : Lie data for stadard IEEE bus. TABLE : LINE DATA FOR STANDARD IEEE BUS SYSTEM. Lie o. Brach(p-q) Lie chargig Y pq Impedace j. j. j. j. j. j. j. j. j. j. j. j. j. j. j. j. j. Z pq.+j..+j..+j..+j..+j..+j..+j..+j..+j..+j..+j..+j..+j..+j..+j..+j..+j. Table : Load data for stadard IEEE bus. o. Geeratio Load P g Q g P d Q d V δ (rad) Lie o. From To Lie Impedace R X Half Lie Chargig Susceptace

7 Table : Load data for stadard IEEE bus. o. BUS VOLTAGE Geeratio (P.U.) Load (P.U.) MAG. ANG PG QG PD QD ACKNOWLEDGMENT The authors ackowledge the support of Giai Zail Sigh Pujab Techical Uiversity Campus, Bathida. REFERENCES [] Ada Kakilli, System aalysis with the MVA method for Symmetrical Three-Phase Faults, TEM Joural, volume, umber,pp--,. [] B.Ravidrath.M.Chader, Power protectio ad switchgear,new age iteratioal publishers,new Delhi,. [] V.K.Mehta ad R.Mehta, Priciples of Power Systems, S.Chad ad Compay Limited, New Delhi, Idia,. [] Raj Kumar Basal, Ashok Kumar Goel ad Maoj Kumar Sharma, MATLAB ad its Applicatios i Egieerig, Dorlig Kidersley (Idia) Pvt. Ltd., liceses of Pearso Educatio i South Asia, New Delhi,. [] Ahmed Waleed K., Advatages ad Disadvatages of usig MATLAB/ode for solvig Differetial Equatios i Egieerig Applicatios, Iteratioal Joural of Egieerig, Vol., Issue, Page -,. [] Srikath P., Rajedra O., Yesuraj A. Ad Tilak M., Load Flow Aalysis of Ieee usig MATLAB, Iteratioal Joural of Egieerig Research ad Techology, Vol., Issue, May. [] I.J. Nagrath, ad D.P.Kothari, Moder Power System Aalysis, Tata McGraw-Hill Publishig Compay Limited, New Delhi,Idia,. [] D.P.Kothari ad J.S.Dhillo, Secod editio Power System Optimizatio, PHI Learig Private Limited, New Delhi, Idia,. [] Bakare, G.A. ad Veayagamoorthy, G.K. (Jue ), Reactive Power ad Cotrol of Nigeria Grid System Usig Micro-Geetic Algorithm, Power Egieerig Society Geeral Meetig (), IEEE - Jue,, Vol., Page -. [] Stefa Arborg ad Gora Adersso, David J Hill, Ia A hiskes, O udervoltage load sheddig i power s, ELSEVIER Sciece limited, vol., o., pp. -,