TSCCLOCK: A LOW COST, ROBUST, ACCURATE SOFTWARE CLOCK FOR NETWORKED COMPUTERS
|
|
- Victor Ellis
- 5 years ago
- Views:
Transcription
1 TSCCLOCK: A LOW COST, ROBUST, ACCURATE SOFTWARE CLOCK FOR NETWORKED COMPUTERS Darryl Veitch d.veitch@ee.unimelb.edu.au darryl Collaboration with Julien Ridoux CUBIN, Department of Electrical & Electronic Engineering The University of Melbourne Google Tech Talk, Googleplex CA, July 23, / 52
2 WE NEED CLOCKS THE OBVIOUS Clocks used everywhere in networking and computing Network measurement (active and passive) Real-time services THE FUTURE Tighter server integration Coordination of simultaneous multiple connections Latency a fundamental constraint in distributed services/computing Example: Virtual world realism in distributed games 2 / 52
3 WE NEED CLOCKS THE OBVIOUS Clocks used everywhere in networking and computing Network measurement (active and passive) Real-time services THE FUTURE Tighter server integration Coordination of simultaneous multiple connections Latency a fundamental constraint in distributed services/computing Example: Virtual world realism in distributed games 3 / 52
4 AND WANT GOOD CLOCKS RELIABILITY/ROBUSTNESS Can t build tight systems unless have bounds Status quo (ntpd) can be good (1ms), bad (20ms), outrageous (100 s ms) Measurement community pushed to GPS synchronized capture cards ACCURACY Greater accuracy wider range of applications Status quo (ntpd) limited to 1ms, if all is well.. Constant error versus jitter, absolute time versus time differences AFFORDABILITY Use existing hardware (oscillator(s) in PCs) Network based synchronization cheap and convenient But GPS also cheap, right? 4 / 52
5 AND WANT GOOD CLOCKS RELIABILITY/ROBUSTNESS Can t build tight systems unless have bounds Status quo (ntpd) can be good (1ms), bad (20ms), outrageous (100 s ms) Measurement community pushed to GPS synchronized capture cards ACCURACY Greater accuracy wider range of applications Status quo (ntpd) limited to 1ms, if all is well.. Constant error versus jitter, absolute time versus time differences AFFORDABILITY Use existing hardware (oscillator(s) in PCs) Network based synchronization cheap and convenient But GPS also cheap, right? 5 / 52
6 AND WANT GOOD CLOCKS RELIABILITY/ROBUSTNESS Can t build tight systems unless have bounds Status quo (ntpd) can be good (1ms), bad (20ms), outrageous (100 s ms) Measurement community pushed to GPS synchronized capture cards ACCURACY Greater accuracy wider range of applications Status quo (ntpd) limited to 1ms, if all is well.. Constant error versus jitter, absolute time versus time differences AFFORDABILITY Use existing hardware (oscillator(s) in PCs) Network based synchronization cheap and convenient But GPS also cheap, right? 6 / 52
7 AND WANT GOOD CLOCKS RELIABILITY/ROBUSTNESS Can t build tight systems unless have bounds Status quo (ntpd) can be good (1ms), bad (20ms), outrageous (100 s ms) Measurement community pushed to GPS synchronized capture cards ACCURACY Greater accuracy wider range of applications Status quo (ntpd) limited to 1ms, if all is well.. Constant error versus jitter, absolute time versus time differences AFFORDABILITY Use existing hardware (oscillator(s) in PCs) Network based synchronization cheap and convenient But GPS also cheap, WRONG! Can cost 12 months and $10,000 to instrument a machine room 7 / 52
8 DESIGN Re-engineered from scratch Built on THE TSCCLOCK time-scale aware abstraction of oscillator performance separate and decoupled treatment of rate and absolute time RTT based delay filtering feedforward not feedback Use oscillator driving CPU, accessible via TSC register (commonly available, high resolution, hardware updating, fast read) PROVIDES Very high robustness Accuracy an order of magnitude higher than ntpd (or more) Separate Absolute and Difference clocks 8 / 52
9 DESIGN Re-engineered from scratch Built on THE TSCCLOCK time-scale aware abstraction of oscillator performance separate and decoupled treatment of rate and absolute time RTT based delay filtering feedforward not feedback Use oscillator driving CPU, accessible via TSC register (commonly available, high resolution, hardware updating, fast read) PROVIDES Very high robustness Accuracy an order of magnitude higher than ntpd (or more) Separate Absolute and Difference clocks 9 / 52
10 DESIGN THE TSCCLOCK Re-engineered from scratch NOT just the fact that TSC is used! Built on time-scale aware abstraction of oscillator performance separate and decoupled treatment of rate and absolute time RTT based delay filtering feedforward not feedback Use oscillator driving CPU, accessible via TSC register (commonly available, high resolution, hardware updating, fast read) PROVIDES Very high robustness Accuracy an order of magnitude higher than ntpd (or more) Separate Absolute and Difference clocks 10 / 52
11 DESIGN THE TSCCLOCK Re-engineered from scratch NOT just the fact that TSC is used! Built on time-scale aware abstraction of oscillator performance separate and decoupled treatment of rate and absolute time RTT based delay filtering feedforward not feedback Use oscillator driving CPU, accessible via TSC register (commonly available, high resolution, hardware updating, fast read) PROVIDES Very high robustness Accuracy an order of magnitude higher than ntpd (or more) Separate Absolute and Difference clocks 11 / 52
12 OFFSET, SKEW AND DRIFT Clock Time C s (t k ) Constant Skew Clock Drifting Clock C d (t k ) C p (t k ) Constant Offset Clock C o (t k ) t k True Time Offset: error θ(t) = C(t) t of clock C(t) at time t Skew: error in rate. E.g.: θ(t) = C + γt (Simple Skew Model (SKM)) Drift: non-linear evolution of θ(t) 12 / 52
13 OFFSET, SKEW AND DRIFT Clock Time C s (t k ) Constant Skew Clock Drifting Clock C d (t k ) C p (t k ) Constant Offset Clock C o (t k ) t k True Time Offset: error θ(t) = C(t) t of clock C(t) at time t Skew: error in rate. E.g.: θ(t) = C + γt (Simple Skew Model (SKM)) Drift: non-linear evolution of θ(t) 13 / 52
14 THE ROLE OF TIME SCALE Laboratory: p = ( Mhz) Machine Room: p = ( Mhz) Offset error [ms] laboratory 0.02 machine room 0.1 PPM time [sec] Offset error [ms] time [day] Short timescales: Large timescales: Simple Skew Model applies unpredictable drift must be tracked 14 / 52
15 THE ROLE OF TIME SCALE Laboratory: p = ( Mhz) Machine Room: p = ( Mhz) Offset error [ms] laboratory 0.02 machine room 0.1 PPM time [sec] Offset error [ms] time [day] Short timescales: Large timescales: Simple Skew Model applies unpredictable drift must be tracked 15 / 52
16 OSCILLATOR STABILITY θ(t + τ) θ(t) Allan deviation: scale dependent rate errors: y τ (t) = τ Laboratory ServerInt Machine room ServerExt 0.1 PPM 10 7 Allan deviation of y τ τ [sec] SKM holds for τ = 1000 [sec], (here TSC period p meaningful) Average rate error upper bounded by 0.1 PPM no matter the scale 16 / 52
17 OSCILLATOR STABILITY θ(t + τ) θ(t) Allan deviation: scale dependent rate errors: y τ (t) = τ Laboratory ServerInt Machine room ServerExt 0.1 PPM 10 7 Allan deviation of y τ τ [sec] SKM holds for τ = 1000 [sec], (here TSC period p meaningful) Average rate error upper bounded by 0.1 PPM no matter the scale 17 / 52
18 THE NEED FOR DIFFERENCE CLOCKS Stable rate ( p good to 10 7 ) implies accurate (t) measurement: Example: error in RTT of 100ms just 10ns However an absolute clock C a (t) requires constant correction to negate drift: To synchronize C a (t), could continuously modulate rate (ntpd uses ±500 PPM band) regularly add corrective jumps Either way, rate is disturbed Effect large! since drift estimation inherently difficult Result: high native stability degraded by unbounded amount! 18 / 52
19 THE NEED FOR DIFFERENCE CLOCKS Stable rate ( p good to 10 7 ) implies accurate (t) measurement: Example: error in RTT of 100ms just 10ns However an absolute clock C a (t) requires constant correction to negate drift: To synchronize C a (t), could continuously modulate rate (ntpd uses ±500 PPM band) regularly add corrective jumps Either way, rate is disturbed Effect large! since drift estimation inherently difficult Result: high native stability degraded by unbounded amount! 19 / 52
20 THE NEED FOR DIFFERENCE CLOCKS Stable rate ( p good to 10 7 ) implies accurate (t) measurement: Example: error in RTT of 100ms just 10ns However an absolute clock C a (t) requires constant correction to negate drift: To synchronize C a (t), could continuously modulate rate (ntpd uses ±500 PPM band) regularly add corrective jumps Either way, rate is disturbed Effect large! since drift estimation inherently difficult Result: high native stability degraded by unbounded amount! 20 / 52
21 A DUAL CLOCK ARCHITECTURE Foundation is the uncorrected clock: C u (t) = p TSC(t) + K DIFFERENCE CLOCK Used for time differences below τ 1000 sec C d (t) = C u (t) Example: C d (t 2 ) C d (t 1 ) = p (TSC(t 2 ) TSC(t 1 )) Immune from errors in drift correction Use: RTTs, delay jitter, execution time, local event ordering.. ABSOLUTE CLOCK Absolute timestamps (and time differences above τ ) C a (t) = C u (t) ˆθ(t) Drift correction estimate ˆθ(t) only applied when clock read Use: latency, global event ordering and scheduling.. Require robust, accurate algorithms for p and ˆθ 21 / 52
22 A DUAL CLOCK ARCHITECTURE Foundation is the uncorrected clock: C u (t) = p TSC(t) + K DIFFERENCE CLOCK Used for time differences below τ 1000 sec C d (t) = C u (t) Example: C d (t 2 ) C d (t 1 ) = p (TSC(t 2 ) TSC(t 1 )) Immune from errors in drift correction Use: RTTs, delay jitter, execution time, local event ordering.. ABSOLUTE CLOCK Absolute timestamps (and time differences above τ ) C a (t) = C u (t) ˆθ(t) Drift correction estimate ˆθ(t) only applied when clock read Use: latency, global event ordering and scheduling.. Require robust, accurate algorithms for p and ˆθ 22 / 52
23 A DUAL CLOCK ARCHITECTURE Foundation is the uncorrected clock: C u (t) = p TSC(t) + K DIFFERENCE CLOCK Used for time differences below τ 1000 sec C d (t) = C u (t) Example: C d (t 2 ) C d (t 1 ) = p (TSC(t 2 ) TSC(t 1 )) Immune from errors in drift correction Use: RTTs, delay jitter, execution time, local event ordering.. ABSOLUTE CLOCK Absolute timestamps (and time differences above τ ) C a (t) = C u (t) ˆθ(t) Drift correction estimate ˆθ(t) only applied when clock read Use: latency, global event ordering and scheduling.. Require robust, accurate algorithms for p and ˆθ 23 / 52
24 A DUAL CLOCK ARCHITECTURE Foundation is the uncorrected clock: C u (t) = p TSC(t) + K DIFFERENCE CLOCK Used for time differences below τ 1000 sec C d (t) = C u (t) Example: C d (t 2 ) C d (t 1 ) = p (TSC(t 2 ) TSC(t 1 )) Immune from errors in drift correction Use: RTTs, delay jitter, execution time, local event ordering.. ABSOLUTE CLOCK Absolute timestamps (and time differences above τ ) C a (t) = C u (t) ˆθ(t) Drift correction estimate ˆθ(t) only applied when clock read Use: latency, global event ordering and scheduling.. Require robust, accurate algorithms for p and ˆθ 24 / 52
25 A CLIENT-SERVER PARADIGM Time Server d i d i d i DAG d h i d h i Host time t a,i t b,i t e,i t f,i t g a,i r g i r i t g f,i Obtain timestamps {T a,i, T b,i, T e,i, T f,i } from i-th exchange {T a,i, T f,i }: host timestamps in TSC counter units {T b,i, T e,i }: server timestamps in seconds 25 / 52
26 FILTERING NETWORK DELAYS Choose RTT based filtering, not one-way (using same clock good!) 3 Round Trip Times r i of packet i delay [ms] T e [sec] Model for RTT: Filter using point error: r i = r + positive random noise excess over minimum RTT 26 / 52
27 NAIVE RATE SYNCHRONIZATION Wish to exploit the relation (t) = (TSC) p Naive estimate based on widely separated packets jand i: ˆp i,j T b,i T b,j T a,i T a,j 0.1 backward p estimate reference 0.05 [PPM] T e [day] Network delay and timestamping noise 1 (TSC), but errors not bounded. 27 / 52
28 RATE SYNCHRONIZATION ALGORITHM Use selected naive estimates based on point error threshold 10 5 rel error E * = 0.3ms err bound E * = 0.075ms err bound 0.1 PPM T e [day] PROPERTIES Error quickly < 0.1 PPM, In 10mins, better than GPS! Error reduction (in timestamping, latency) guaranteed by (t) Inherently robust to packet loss, congestion, loss of server.. Based on p, no local rate estimates 28 / 52
29 RATE SYNCHRONIZATION ALGORITHM Use selected naive estimates based on point error threshold 10 5 rel error E * = 0.3ms err bound E * = 0.075ms err bound 0.1 PPM T e [day] PROPERTIES Error quickly < 0.1 PPM, In 10mins, better than GPS! Error reduction (in timestamping, latency) guaranteed by (t) Inherently robust to packet loss, congestion, loss of server.. Based on p, no local rate estimates 29 / 52
30 NAIVE ABSOLUTE SYNCHRONIZATION Wish to exploit SKM over small scales to measure θ(t) Naive estimate again ignores network congestion, exploits steady rate over RTT ˆθ i = 1 2 (C(t a,i) + C(t f,i )) 1 2 (T b,i + T e,i ) 0 Offset estimates [ms] naive reference Te [day] 30 / 52
31 ABSOLUTE SYNCHRONIZATION ALGORITHM Must track, so use all naive estimates, but carefully ALGORITHM FOR ˆθ(t) Weighted estimate of naive θ i s over SKM window Weights very strict, based on RTT quality (if quality very bad, freeze) Meaningful sanity check: ignore if hardware rate bound exceeded Offset estimates [ms] naive reference algorithm Tb [day] 31 / 52
32 THE PATH ASYMMETRY FUNDAMENTAL AMBIGUITY Asymmetry A d d and 2θ(t) non-unique up to a constant. IMPACT ON ABSOLUTE CLOCK A unknown: generally forced to assume A = 0 However, bounded by minimum RTT: A ( r, r) Create constant errors from 5µs to 100 s ms Causes jumps when server changed Important to use a single, close, server. IMPACT ON DIFFERENCE CLOCK None Difference clock can be used to measure r 32 / 52
33 TESTBED Internal Monitor Host SW-GPS SW-NTP External Monitor DAG-GPS DAG Card Unix PC UDP Sender & Receiver GPS Receiver NTP Server Stratum 1 SW-GPS TSCclock Hub PPS Synchronization Bi-directional NTP flow Bi-directional UDP flow Time Request GPS synchronized DAG card for external validation GPS synchronized SW and modified kernels for internal validation 33 / 52
34 TESTBED Internal Monitor Host SW-GPS SW-NTP External Monitor DAG-GPS DAG Card Unix PC UDP Sender & Receiver GPS Receiver NTP Server Stratum 1 SW-GPS TSCclock Hub PPS Synchronization Bi-directional NTP flow Bi-directional UDP flow Time Request GPS synchronized DAG card for external validation timestamps accurate to 100ns, but comparison polluted by system noise splits asymmetry: A = A n + A h allows network component A n to be measured host component A h can only be bounded, can be >200µs! GPS synchronized SW and modified kernels for internal validation 34 / 52
35 TESTBED Internal Monitor Host SW-GPS SW-NTP External Monitor DAG-GPS DAG Card Unix PC UDP Sender & Receiver GPS Receiver NTP Server Stratum 1 SW-GPS TSCclock Hub PPS Synchronization Bi-directional NTP flow Bi-directional UDP flow Time Request GPS synchronized DAG card for external validation GPS synchronized SW and modified kernels for internal validation side by side timestamps cancels noise, but only relative performance measurable, not absolute 35 / 52
36 A QUICK COMPARISON WITH ntpd 1 TSCclock SW NTP 0.5 [ms] Days ntpd: TSCclock: sync d to stratum-1 NTP server on LAN (broadcast mode) sync d to stratum-1 NTP server outside LAN 36 / 52
37 EXTERNAL VALIDATION: TSCCLOCK VS DAG 45 TSC err [mus] Hours Server: Stratum-1 NTP on LAN Polling Period: 256 sec System Noise: 20µs Asymmetry: Measured at 36µs and removed TSC err Median 16.7 IQR [mus] 37 / 52
38 INTERNAL VALIDATION: TSCCLOCK VS SW-GPS 40 Cdiff [mus] Hours Server: Stratum-1 outside LAN Polling Period: 16 sec System Noise: 1µs Asymmetry: As before for TSCclock, but SW-GPS component? x 10 3 Cdiff Median 1.4 IQR [mus] 38 / 52
39 PARAMETER DEPENDENCE window width polling period 200 (a) 200 (b) Offset Error [µs] no local rate 50 with local rate τ /τ* Duration: 32 days Server: Stratum-1 NTP, 5 hops away, r = 0.61 ms Poll Period: 16 sec Asymmetry: A n = 70 µs Median IQR: 12µs (corrected for A) IQR: 15µs (including external validation noise) 0 no local rate 50 with local rate Polling Period [s] 39 / 52
40 COMPARISON WITH nptd Server on LAN Server outside LAN [ms] ServerNear Polling Period [sec] [ms] ServerLoc Polling Period [sec] Asymmetry: Same for each clock 40 / 52
41 DIFFERENCE CLOCK VERSUS GPS Live C x 10 3 d (t): med = 0.03 iqr = 0.71 [mus] 10mus Live C d (t) 1.5 5mus 1mus 0 1mus 5mus mus Days [mus] 41 / 52
42 DIFFERENCE CLOCK VERSUS GPS Live C x 10 3 d (t): med = 0.03 iqr = 0.71 [mus] 10mus Live C d (t) 1.5 5mus 1mus 0 1mus 5mus mus Days [mus] Now compare if no connectivity with server 42 / 52
43 DIFFERENCE CLOCK VERSUS GPS Live C x 10 3 d (t): med = 0.03 iqr = 0.71 [mus] 10mus Live C d (t) 1.5 5mus 1mus 0 1mus 5mus mus Days [mus] Frozen C (t): med = 0.19 iqr = [mus] x 10 3 d 10mus Frozen C d (t) 1.5 5mus 1mus 0 1mus 5mus mus Days [mus] 43 / 52
44 THE SYSTEM API absolute and difference clock reading mode setting/reading diagnostics Timestamping solution better with kernel support Synchronization algorithm: runs as daemon or on command line can store and replay log files Server no server side solution, yet client compatible with existing NTP servers designed (and recommended) for use with a single server 44 / 52
45 TIMESTAMPING KERNEL USER 45 / 52
46 TIMESTAMPING KERNEL Packet timestamping: Normal mode: TSCclock mode: Other timestamping: TSCclock works in parallel with SW TSCclock works in parallel with SW SW also returns C a(t) transparently USER 46 / 52
47 TIMESTAMPING KERNEL Packet timestamping: Normal mode: TSCclock mode: Other timestamping: TSCclock works in parallel with SW TSCclock works in parallel with SW SW also returns C a(t) transparently USER Packet timestamping: Kernel packet timestamps inferred from userland TSCclock works in parallel with SW 47 / 52
48 PACKAGING Ubuntu 6.10 (Edgy) Ubuntu 7.04 (Feisty) Debian 4.0 (Etch) Fedora Core 6 and soon Fedora Core / 52
49 CONCLUSIONS TSCclock: for synchronization over networks Currently based on CPU oscillator accessible via TSC register Absolute Clock: far more robust than ntpd order of magnitude more accurate Difference Clock: exceptionally robust not available under ntpd more accurate than standard GPS solution for small time intervals Kernel and userland packet timestamping solutions Low computational requirements Runs as daemon in parallel with ntpd Works with existing NTP server network Packages written for BSD and popular Linux distributions 49 / 52
50 CONCLUSIONS TSCclock: for synchronization over networks Currently based on CPU oscillator accessible via TSC register Absolute Clock: far more robust than ntpd order of magnitude more accurate Difference Clock: exceptionally robust not available under ntpd more accurate than standard GPS solution for small time intervals Kernel and userland packet timestamping solutions Low computational requirements Runs as daemon in parallel with ntpd Works with existing NTP server network Packages written for BSD and popular Linux distributions 50 / 52
51 CONCLUSIONS TSCclock: for synchronization over networks Currently based on CPU oscillator accessible via TSC register Absolute Clock: far more robust than ntpd order of magnitude more accurate Difference Clock: exceptionally robust not available under ntpd more accurate than standard GPS solution for small time intervals Kernel and userland packet timestamping solutions Low computational requirements Runs as daemon in parallel with ntpd Works with existing NTP server network Packages written for BSD and popular Linux distributions 51 / 52
52 LINKS Publications: TSCclock page: 52 / 52
A Methodology for Clock Benchmarking
A Methodology for Clock Benchmarking Julien Ridoux j.ridoux@ee.unimelb.edu.au Darryl Veitch d.veitch@ee.unimelb.edu.au ARC Special Research Centre for Ultra-Broadband Information Networks THE UNIVERSITY
More informationRobust Synchronization of Absolute and Difference Clocks over Networks
1 Robust Synchronization of Absolute and Difference Clocks over Networks Darryl Veitch, Senior Member, IEEE, Julien Ridoux, Member, IEEE, and Satish Babu Korada Abstract We present a detailed re-examination
More informationPC Based Precision Timing Without GPS
PC Based Precision Timing Without GPS Attila Pásztor EMULab at the Department of Electrical & Electronic Engineering The University of Melbourne, Victoria 31, Australia and Ericsson Hungary R&D a.pasztor@ee.mu.oz.au
More informationDistributed systems Lecture 4: Clock synchronisation; logical clocks. Dr Robert N. M. Watson
Distributed systems Lecture 4: Clock synchronisation; logical clocks Dr Robert N. M. Watson 1 Last time Started to look at time in distributed systems Coordinating actions between processes Physical clocks
More informationTime in Distributed Systems: Clocks and Ordering of Events
Time in Distributed Systems: Clocks and Ordering of Events Clocks in Distributed Systems Needed to Order two or more events happening at same or different nodes (Ex: Consistent ordering of updates at different
More informationDISTRIBUTED COMPUTER SYSTEMS
DISTRIBUTED COMPUTER SYSTEMS SYNCHRONIZATION Dr. Jack Lange Computer Science Department University of Pittsburgh Fall 2015 Topics Clock Synchronization Physical Clocks Clock Synchronization Algorithms
More informationDistributed Computing. Synchronization. Dr. Yingwu Zhu
Distributed Computing Synchronization Dr. Yingwu Zhu Topics to Discuss Physical Clocks Logical Clocks: Lamport Clocks Classic paper: Time, Clocks, and the Ordering of Events in a Distributed System Lamport
More informationDistributed Systems. Time, Clocks, and Ordering of Events
Distributed Systems Time, Clocks, and Ordering of Events Björn Franke University of Edinburgh 2016/2017 Today Last lecture: Basic Algorithms Today: Time, clocks, NTP Ref: CDK Causality, ordering, logical
More informationChapter 11 Time and Global States
CSD511 Distributed Systems 分散式系統 Chapter 11 Time and Global States 吳俊興 國立高雄大學資訊工程學系 Chapter 11 Time and Global States 11.1 Introduction 11.2 Clocks, events and process states 11.3 Synchronizing physical
More informationTime. To do. q Physical clocks q Logical clocks
Time To do q Physical clocks q Logical clocks Events, process states and clocks A distributed system A collection P of N single-threaded processes (p i, i = 1,, N) without shared memory The processes in
More informationClock Synchronization
Today: Canonical Problems in Distributed Systems Time ordering and clock synchronization Leader election Mutual exclusion Distributed transactions Deadlock detection Lecture 11, page 7 Clock Synchronization
More informationCS 425 / ECE 428 Distributed Systems Fall Indranil Gupta (Indy) Oct. 5, 2017 Lecture 12: Time and Ordering All slides IG
CS 425 / ECE 428 Distributed Systems Fall 2017 Indranil Gupta (Indy) Oct. 5, 2017 Lecture 12: Time and Ordering All slides IG Why Synchronization? You want to catch a bus at 6.05 pm, but your watch is
More informationClocks in Asynchronous Systems
Clocks in Asynchronous Systems The Internet Network Time Protocol (NTP) 8 Goals provide the ability to externally synchronize clients across internet to UTC provide reliable service tolerating lengthy
More informationRecap. CS514: Intermediate Course in Operating Systems. What time is it? This week. Reminder: Lamport s approach. But what does time mean?
CS514: Intermediate Course in Operating Systems Professor Ken Birman Vivek Vishnumurthy: TA Recap We ve started a process of isolating questions that arise in big systems Tease out an abstract issue Treat
More informationDistributed Systems 8L for Part IB
Distributed Systems 8L for Part IB Handout 2 Dr. Steven Hand 1 Clocks Distributed systems need to be able to: order events produced by concurrent processes; synchronize senders and receivers of messages;
More informationAdministrivia. Course Objectives. Overview. Lecture Notes Week markem/cs333/ 2. Staff. 3. Prerequisites. 4. Grading. 1. Theory and application
Administrivia 1. markem/cs333/ 2. Staff 3. Prerequisites 4. Grading Course Objectives 1. Theory and application 2. Benefits 3. Labs TAs Overview 1. What is a computer system? CPU PC ALU System bus Memory
More informationEstimation of clock offset from one-way delay measurement on asymmetric paths
Estimation of clock offset from one-way delay measurement on asymmetric paths Masato TSURU 1, Tetsuya TAKINE 2 and Yuji OIE 3 1 Telecommunications Advancement Organization of Japan. 2 Graduate School of
More informationTime is an important issue in DS
Chapter 0: Time and Global States Introduction Clocks,events and process states Synchronizing physical clocks Logical time and logical clocks Global states Distributed debugging Summary Time is an important
More informationSlides for Chapter 14: Time and Global States
Slides for Chapter 14: Time and Global States From Coulouris, Dollimore, Kindberg and Blair Distributed Systems: Concepts and Design Edition 5, Addison-Wesley 2012 Overview of Chapter Introduction Clocks,
More informationAbsence of Global Clock
Absence of Global Clock Problem: synchronizing the activities of different part of the system (e.g. process scheduling) What about using a single shared clock? two different processes can see the clock
More informationAgreement. Today. l Coordination and agreement in group communication. l Consensus
Agreement Today l Coordination and agreement in group communication l Consensus Events and process states " A distributed system a collection P of N singlethreaded processes w/o shared memory Each process
More informationTime. Today. l Physical clocks l Logical clocks
Time Today l Physical clocks l Logical clocks Events, process states and clocks " A distributed system a collection P of N singlethreaded processes without shared memory Each process p i has a state s
More informationCS 347 Parallel and Distributed Data Processing
CS 347 Parallel and Distributed Data Processing Spring 2016 & Clocks, Clocks, and the Ordering of Events in a Distributed System. L. Lamport, Communications of the ACM, 1978 Notes 15: & Clocks CS 347 Notes
More informationMeasuring Software Based IEEE 1588/PTP Slave Accuracy WHITE PAPER
Measuring Software Based IEEE 1588/PTP Slave Accuracy WHITE PAPER Measuring Software Based IEEE 1588/PTP Slave Accuracy Abstract This paper describes how to enable a computer to accurately measure the
More informationSimulation of the IEEE 1588 Precision Time Protocol in OMNeT++
Simulation of the IEEE 1588 Precision Time Protocol in OMNeT++ Wolfgang Wallner wolfgang-wallner@gmx.at September 15, 2016 Presentation Outline Introduction Motivation Problem statement Presentation Outline
More informationCS505: Distributed Systems
Department of Computer Science CS505: Distributed Systems Lecture 5: Time in Distributed Systems Overview Time and Synchronization Logical Clocks Vector Clocks Distributed Systems Asynchronous systems:
More informationDistributed Systems. Time, clocks, and Ordering of events. Rik Sarkar. University of Edinburgh Spring 2018
Distributed Systems Time, clocks, and Ordering of events Rik Sarkar University of Edinburgh Spring 2018 Notes Today: Time, clocks, NTP Ref: CDK Causality, ordering, logical clocks: Ref: VG, CDK Time Ordering
More informationCS505: Distributed Systems
Cristina Nita-Rotaru CS505: Distributed Systems Ordering events. Lamport and vector clocks. Global states. Detecting failures. Required reading for this topic } Leslie Lamport,"Time, Clocks, and the Ordering
More informationA NEW SYSTEM FOR THE GENERATION OF UTC(CH)
A NEW SYSTEM FOR THE GENERATION OF UTC(CH) L.G. Bernier and G. Schaller METAS Swiss Federal Office of Metrology Lindenweg 50, Bern-Wabern, CH-3003, Switzerland laurent-guy.bernier@metas.ch Abstract A new
More informationSocket Programming. Daniel Zappala. CS 360 Internet Programming Brigham Young University
Socket Programming Daniel Zappala CS 360 Internet Programming Brigham Young University Sockets, Addresses, Ports Clients and Servers 3/33 clients request a service from a server using a protocol need an
More informationDistributed Systems Principles and Paradigms. Chapter 06: Synchronization
Distributed Systems Principles and Paradigms Maarten van Steen VU Amsterdam, Dept. Computer Science Room R4.20, steen@cs.vu.nl Chapter 06: Synchronization Version: November 16, 2009 2 / 39 Contents Chapter
More informationDistributed Systems Principles and Paradigms
Distributed Systems Principles and Paradigms Chapter 6 (version April 7, 28) Maarten van Steen Vrije Universiteit Amsterdam, Faculty of Science Dept. Mathematics and Computer Science Room R4.2. Tel: (2)
More informationAccurate Event Composition
Chapter 6 Accurate Event Composition What, then, is time? If no one asks me, I know what it is. If I wish to explain it to him who asks me, I do not know Augustine, Confessions For the integration of events,
More informationNCU EE -- DSP VLSI Design. Tsung-Han Tsai 1
NCU EE -- DSP VLSI Design. Tsung-Han Tsai 1 Multi-processor vs. Multi-computer architecture µp vs. DSP RISC vs. DSP RISC Reduced-instruction-set Register-to-register operation Higher throughput by using
More informationTime. Lakshmi Ganesh. (slides borrowed from Maya Haridasan, Michael George)
Time Lakshmi Ganesh (slides borrowed from Maya Haridasan, Michael George) The Problem Given a collection of processes that can... only communicate with significant latency only measure time intervals approximately
More informationCPU Scheduling. CPU Scheduler
CPU Scheduling These slides are created by Dr. Huang of George Mason University. Students registered in Dr. Huang s courses at GMU can make a single machine readable copy and print a single copy of each
More informationIntegrating External and Internal Clock Synchronization. Christof Fetzer and Flaviu Cristian. Department of Computer Science & Engineering
Integrating External and Internal Clock Synchronization Christof Fetzer and Flaviu Cristian Department of Computer Science & Engineering University of California, San Diego La Jolla, CA 9093?0114 e-mail:
More informationMTIE AND TDEV ANALYSIS OF UNEVENLY SPACED TIME SERIES DATA AND ITS APPLICATION TO TELECOMMUNICATIONS SYNCHRONIZATION MEASUREMENTS
MTIE AND TDEV ANALYSIS OF UNEVENLY SPACED TIME SERIES DATA AND ITS APPLICATION TO TELECOMMUNICATIONS SYNCHRONIZATION MEASUREMENTS Mingfu Li, Hsin-Min Peng, and Chia-Shu Liao Telecommunication Labs., Chunghwa
More information7680: Distributed Systems
Cristina Nita-Rotaru 7680: Distributed Systems Physical and logical clocks. Global states. Failure detection. Ordering events in distributed systems } Time is essential for ordering events in a distributed
More informationArcGIS GeoAnalytics Server: An Introduction. Sarah Ambrose and Ravi Narayanan
ArcGIS GeoAnalytics Server: An Introduction Sarah Ambrose and Ravi Narayanan Overview Introduction Demos Analysis Concepts using GeoAnalytics Server GeoAnalytics Data Sources GeoAnalytics Server Administration
More informationMegaMIMO: Scaling Wireless Throughput with the Number of Users. Hariharan Rahul, Swarun Kumar and Dina Katabi
MegaMIMO: Scaling Wireless Throughput with the Number of Users Hariharan Rahul, Swarun Kumar and Dina Katabi There is a Looming Wireless Capacity Crunch Given the trends in the growth of wireless demand,
More informationClock Models, Metrics, and Testing. Reid McGaughey Hardware Engineer Cisco
Clock Models, Metrics, and Testing Reid McGaughey Hardware Engineer Cisco Presented at the ODVA 2014 Industry Conference & 16 th Annual Meeting March 11-13, 2014 Phoenix, Arizona, USA Abstract: An introduction
More informationIntroduction to centralized control
ROBOTICS 01PEEQW Basilio Bona DAUIN Politecnico di Torino Control Part 2 Introduction to centralized control Independent joint decentralized control may prove inadequate when the user requires high task
More informationPortal for ArcGIS: An Introduction
Portal for ArcGIS: An Introduction Derek Law Esri Product Management Esri UC 2014 Technical Workshop Agenda Web GIS pattern Product overview Installation and deployment Security and groups Configuration
More informationNPL Time and Frequency Section: NPL S CONTRIBUTION TO TUGGS
NPL Time & Frequency NPL Time and Frequency Section: NPL S CONTRIBUTION TO TUGGS J A Davis, P W Stacey, R Hlavac, and P B Whibberley. Date: 21st April 2004 THALES UK-BASED GNSS GROUND SEGMENT (TUGGS) Aim
More informationBias Estimation in Asymmetric Packet-based Networks
Bias Estimation in Asymmetric Packet-based Networks by MohammadJavad Hajikhani A Thesis submitted to the Faculty of Graduate Studies and Research in partial fulfilment of the requirements for the degree
More informationA study of entropy transfers
A study of entropy transfers in the Linux Random Number Generator Th. Vuillemin, F. Goichon, G. Salagnac, C. Lauradoux The need for random numbers Computers are built to be fully deterministic......but
More informationIntroduction to centralized control
Industrial Robots Control Part 2 Introduction to centralized control Independent joint decentralized control may prove inadequate when the user requires high task velocities structured disturbance torques
More informationIMPLEMENTATION AND EXPERIENCE WITH LUMINOSITY LEVELLING WITH OFFSET BEAM
IMPLEMENTATION AND EXPERIENCE WITH LUMINOSITY LEVELLING WITH OFFSET BEAM F. Follin, D. Jacquet, CERN, Geneva, Switzerland Abstract The practice of luminosity levelling with an offset beam has been used
More informationIntroduction to Portal for ArcGIS
Introduction to Portal for ArcGIS Derek Law Product Management March 10 th, 2015 Esri Developer Summit 2015 Agenda Web GIS pattern Product overview Installation and deployment Security and groups Configuration
More informationProcess Scheduling. Process Scheduling. CPU and I/O Bursts. CPU - I/O Burst Cycle. Variations in Bursts. Histogram of CPU Burst Times
Scheduling The objective of multiprogramming is to have some process running all the time The objective of timesharing is to have the switch between processes so frequently that users can interact with
More informationChe-Wei Chang Department of Computer Science and Information Engineering, Chang Gung University
Che-Wei Chang chewei@mail.cgu.edu.tw Department of Computer Science and Information Engineering, Chang Gung University } 2017/11/15 Midterm } 2017/11/22 Final Project Announcement 2 1. Introduction 2.
More informationEnd-to-end Estimation of the Available Bandwidth Variation Range
1 End-to-end Estimation of the Available Bandwidth Variation Range Manish Jain Georgia Tech jain@cc.gatech.edu Constantinos Dovrolis Georgia Tech dovrolis@cc.gatech.edu Abstract The available bandwidth
More informationCOVER SHEET: Problem#: Points
EEL 4712 Midterm 3 Spring 2017 VERSION 1 Name: UFID: Sign here to give permission for your test to be returned in class, where others might see your score: IMPORTANT: Please be neat and write (or draw)
More informationChapter 3. Digital Design and Computer Architecture, 2 nd Edition. David Money Harris and Sarah L. Harris. Chapter 3 <1>
Chapter 3 Digital Design and Computer Architecture, 2 nd Edition David Money Harris and Sarah L. Harris Chapter 3 Chapter 3 :: Topics Introduction Latches and Flip-Flops Synchronous Logic Design Finite
More informationIntroduction to Portal for ArcGIS. Hao LEE November 12, 2015
Introduction to Portal for ArcGIS Hao LEE November 12, 2015 Agenda Web GIS pattern Product overview Installation and deployment Security and groups Configuration options Portal for ArcGIS + ArcGIS for
More informationTracking of Spread Spectrum Signals
Chapter 7 Tracking of Spread Spectrum Signals 7. Introduction As discussed in the last chapter, there are two parts to the synchronization process. The first stage is often termed acquisition and typically
More informationWindow-aware Load Shedding for Aggregation Queries over Data Streams
Window-aware Load Shedding for Aggregation Queries over Data Streams Nesime Tatbul Stan Zdonik Talk Outline Background Load shedding in Aurora Windowed aggregation queries Window-aware load shedding Experimental
More informationExpected Performance From WIYN Tip-Tilt Imaging
Expected Performance From WIYN Tip-Tilt Imaging C. F. Claver 3 September 1997 Overview Image motion studies done at WIYN show that a significant improvement to delivered image quality can be obtained from
More informationStop Watch (System Controller Approach)
Stop Watch (System Controller Approach) Problem Design a stop watch that can measure times taken for two events Inputs CLK = 6 Hz RESET: Asynchronously reset everything X: comes from push button First
More informationLIGO Grid Applications Development Within GriPhyN
LIGO Grid Applications Development Within GriPhyN Albert Lazzarini LIGO Laboratory, Caltech lazz@ligo.caltech.edu GriPhyN All Hands Meeting 15-17 October 2003 ANL LIGO Applications Development Team (GriPhyN)
More informationProportional Share Resource Allocation Outline. Proportional Share Resource Allocation Concept
Proportional Share Resource Allocation Outline Fluid-flow resource allocation models» Packet scheduling in a network Proportional share resource allocation models» CPU scheduling in an operating system
More informationA Different Kind of Flow Analysis. David M Nicol University of Illinois at Urbana-Champaign
A Different Kind of Flow Analysis David M Nicol University of Illinois at Urbana-Champaign 2 What Am I Doing Here??? Invite for ICASE Reunion Did research on Peformance Analysis Supporting Supercomputing
More informationTime, Clocks, and the Ordering of Events in a Distributed System
Time, Clocks, and the Ordering of Events in a Distributed System Motivating example: a distributed compilation service FTP server storing source files, object files, executable file stored files have timestamps,
More informationNext Genera*on Compu*ng: Needs and Opportuni*es for Weather, Climate, and Atmospheric Sciences. David Randall
Next Genera*on Compu*ng: Needs and Opportuni*es for Weather, Climate, and Atmospheric Sciences David Randall Way back I first modified, ran, and analyzed results from an atmospheric GCM in 1972. The model
More informationSYMMETRICOM TIME-SCALE SYSTEM
SYMMETRICOM TIME-SCALE SYSTEM Timothy Erickson, Venkatesan Ramakrishnan, Samuel R. Stein 3 Symmetricom, Inc., Boulder, CO, USA, tierickson@symmetricom.com Symmetricom, Inc., Santa Rosa, CA, USA, vramakrishnan@symmetricom.com
More informationInternet Congestion Control: Equilibrium and Dynamics
Internet Congestion Control: Equilibrium and Dynamics A. Kevin Tang Cornell University ISS Seminar, Princeton University, February 21, 2008 Networks and Corresponding Theories Power networks (Maxwell Theory)
More informationDCS: Distributed Asynchronous Clock Synchronization in Delay Tolerant Networks
IEEE TRANSACTIONS ON PARALLEL AND DISTRIBUTED SYSTEMS 1 DCS: Distributed Asynchronous Clock Synchronization in Delay Tolerant Networks Bong Jun Choi, Student Member, IEEE, Hao Liang, Student Member, IEEE,
More informationBinocular Observing 101: A guide to binocular observing at LBT
Binocular Observing 101: A guide to binocular observing at LBT 481s625f 23-March-2014 Presented by: John M. Hill LBT Technical Director Outline of the presentation Introduction to Telescope Control Concepts
More informationInterferometer Circuits. Professor David H. Staelin
Interferometer Circuits Professor David H. Staelin Massachusetts Institute of Technology Lec18.5-1 Basic Aperture Synthesis Equation Recall: E( ) E r,t,t E E λ = λ { } Ι ( Ψ ) E R E τ φ τ Ψ,t,T E A Ψ 2
More informationHigh Performance Computing
Master Degree Program in Computer Science and Networking, 2014-15 High Performance Computing 2 nd appello February 11, 2015 Write your name, surname, student identification number (numero di matricola),
More informationDistributed Implicit Timing Synchronization for Multihop Mesh Networks
Distributed Implicit Timing Synchronization for Multihop Mesh Networks Sriram Venkateswaran and Upamanyu Madhow Department of ECE, University of California Santa Barbara, CA 9316 Email: {sriram, madhow}@ece.ucsb.edu
More informationControlo Switched Systems: Mixing Logic with Differential Equations. João P. Hespanha. University of California at Santa Barbara.
Controlo 00 5 th Portuguese Conference on Automatic Control University of Aveiro,, September 5-7, 5 00 Switched Systems: Mixing Logic with Differential Equations João P. Hespanha University of California
More informationEnvironment-Aware Clock Skew Estimation and Synchronization for Wireless Sensor Networks
Environment-Aware Clock Skew Estimation and Synchronization for Wireless Sensor Networks Zhe Yang, Lin Cai, Yu Liu +, and Jianping Pan University of Victoria, BC, Canada, + University of New Orleans, LA,
More informationChapter 3. Chapter 3 :: Topics. Introduction. Sequential Circuits
Chapter 3 Chapter 3 :: Topics igital esign and Computer Architecture, 2 nd Edition avid Money Harris and Sarah L. Harris Introduction Latches and Flip Flops Synchronous Logic esign Finite State Machines
More informationECEN 651: Microprogrammed Control of Digital Systems Department of Electrical and Computer Engineering Texas A&M University
ECEN 651: Microprogrammed Control of Digital Systems Department of Electrical and Computer Engineering Texas A&M University Prof. Mi Lu TA: Ehsan Rohani Laboratory Exercise #4 MIPS Assembly and Simulation
More informationTRB Developments. Michael Traxler for the TRB Collaboration. TRB Platform. Experiences and Limits. Next Step: DiRICH. Summary
2015-11-13 Outline 1 2 3 4 : Features I Versatile and meanwhile technically mature platform for TDC measurements and digital readout consists of FPGA-firmware, DAQ- and calibration-software and hardware
More informationTICSync: Knowing When Things Happened
TICSync: Knowing When Things Happened Alastair Harrison and Paul Newman Abstract Modern robotic systems are composed of many distributed processes sharing a common communications infrastructure. High bandwidth
More informationCongestion estimation technique in the optical network unit registration process
Letter Optics Letters 1 Congestion estimation technique in the optical network unit registration process GEUNYONG KIM 1,2, HARK YOO 1, DONGSOO LEE 1, YOUNGSUN KIM 1, AND HYUK LIM 2,* 1 Electronics and
More informationTrial for upgrading of Japan Standard Time
2015. 10. 31 ATF2015 Trial for upgrading of Japan Standard Time Y. Hanado, F. Nakagawa and K. Imamura National Institute of Information and Communications Technology (NICT), Japan Contents Introduction
More informationChapter 7 Control. Part Classical Control. Mobile Robotics - Prof Alonzo Kelly, CMU RI
Chapter 7 Control 7.1 Classical Control Part 1 1 7.1 Classical Control Outline 7.1.1 Introduction 7.1.2 Virtual Spring Damper 7.1.3 Feedback Control 7.1.4 Model Referenced and Feedforward Control Summary
More informationArcGIS is Advancing. Both Contributing and Integrating many new Innovations. IoT. Smart Mapping. Smart Devices Advanced Analytics
ArcGIS is Advancing IoT Smart Devices Advanced Analytics Smart Mapping Real-Time Faster Computing Web Services Crowdsourcing Sensor Networks Both Contributing and Integrating many new Innovations ArcGIS
More informationSwitched Systems: Mixing Logic with Differential Equations
research supported by NSF Switched Systems: Mixing Logic with Differential Equations João P. Hespanha Center for Control Dynamical Systems and Computation Outline Logic-based switched systems framework
More informationImplementation of the IEEE 1588 Precision Time Protocol for Clock Synchronization in the Radio Detection of Ultra-High Energy Neutrinos
i Implementation of the IEEE 1588 Precision Time Protocol for Clock Synchronization in the Radio Detection of Ultra-High Energy Neutrinos Undergraduate Research Thesis Presented in partial fulfillment
More information416 Distributed Systems. Time Synchronization (Part 2: Lamport and vector clocks) Jan 27, 2017
416 Distributed Systems Time Synchronization (Part 2: Lamport and vector clocks) Jan 27, 2017 1 Important Lessons (last lecture) Clocks on different systems will always behave differently Skew and drift
More informationA Mathematical Model of the Skype VoIP Congestion Control Algorithm
A Mathematical Model of the Skype VoIP Congestion Control Algorithm Luca De Cicco, S. Mascolo, V. Palmisano Dipartimento di Elettrotecnica ed Elettronica, Politecnico di Bari 47th IEEE Conference on Decision
More informationArcGIS Enterprise: What s New. Philip Heede Shannon Kalisky Melanie Summers Sam Williamson
ArcGIS Enterprise: What s New Philip Heede Shannon Kalisky Melanie Summers Sam Williamson ArcGIS Enterprise is the new name for ArcGIS for Server What is ArcGIS Enterprise ArcGIS Enterprise is powerful
More informationTime Synchronization between SOKUIKI Sensor and Host Computer using Timestamps
Time Synchronization between SOKUIKI Sensor and Host Computer using Timestamps Alexander Carballo, Yoshitaka Hara, Hirohiko Kawata, Tomoaki Yoshida, Akihisa Ohya and Shin ichi Yuta Abstract Time is crucial
More informationCMPEN 411 VLSI Digital Circuits Spring 2012 Lecture 17: Dynamic Sequential Circuits And Timing Issues
CMPEN 411 VLSI Digital Circuits Spring 2012 Lecture 17: Dynamic Sequential Circuits And Timing Issues [Adapted from Rabaey s Digital Integrated Circuits, Second Edition, 2003 J. Rabaey, A. Chandrakasan,
More informationCapturing Network Traffic Dynamics Small Scales. Rolf Riedi
Capturing Network Traffic Dynamics Small Scales Rolf Riedi Dept of Statistics Stochastic Systems and Modelling in Networking and Finance Part II Dependable Adaptive Systems and Mathematical Modeling Kaiserslautern,
More informationab initio Electronic Structure Calculations
ab initio Electronic Structure Calculations New scalability frontiers using the BG/L Supercomputer C. Bekas, A. Curioni and W. Andreoni IBM, Zurich Research Laboratory Rueschlikon 8803, Switzerland ab
More informationTHE LONG-TERM STABILITY OF THE U.S. NAVAL OBSERVATORY S MASERS
THE LONG-TERM STABILITY OF THE U.S. NAVAL OBSERVATORY S MASERS Demetrios Matsakis, Paul Koppang Time Service Department U.S. Naval Observatory Washington, DC, USA and R. Michael Garvey Symmetricom, Inc.
More informationPIQI-RCP: Design and Analysis of Rate-Based Explicit Congestion Control
PIQI-RCP: Design and Analysis of Rate-Based Explicit Congestion Control Saurabh Jain Joint work with Dr. Dmitri Loguinov June 21, 2007 1 Agenda Introduction Analysis of RCP QI-RCP PIQI-RCP Comparison Wrap
More informationModelling an Isolated Compound TCP Connection
Modelling an Isolated Compound TCP Connection Alberto Blanc and Denis Collange Orange Labs 905 rue Albert Einstein Sophia Antipolis, France {Email: alberto.blanc,denis.collange}@orange-ftgroup.com Konstantin
More informationOn Two Class-Constrained Versions of the Multiple Knapsack Problem
On Two Class-Constrained Versions of the Multiple Knapsack Problem Hadas Shachnai Tami Tamir Department of Computer Science The Technion, Haifa 32000, Israel Abstract We study two variants of the classic
More informationStochastic Hybrid Systems: Applications to Communication Networks
research supported by NSF Stochastic Hybrid Systems: Applications to Communication Networks João P. Hespanha Center for Control Engineering and Computation University of California at Santa Barbara Deterministic
More informationA Man With One Watch Knows What Time It Is. George Zampetti, Microsemi Fellow FTD
Power Matters. A Man With One Watch Knows What Time It Is George Zampetti, Microsemi Fellow FTD 1 Problem Statement Too Many Clocks (or not enough good ones) Power Matters 2 Does anyone really know what
More informationContinuous-time hidden Markov models for network performance evaluation
Performance Evaluation 49 (2002) 129 146 Continuous-time hidden Markov models for network performance evaluation Wei Wei, Bing Wang, Don Towsley Department of Computer Science, University of Massachusetts,
More informationFigure 10.1 Skew between computer clocks in a distributed system
Figure 10.1 Skew between computer clocks in a distributed system Network Instructor s Guide for Coulouris, Dollimore and Kindberg Distributed Systems: Concepts and Design Edn. 3 Pearson Education 2001
More informationGeographical Information Processing for Cultural Resources
Geographical Information Processing for Cultural Resources Assoc. Prof. Hirohisa Mori, Department of Geography, Graduate School of Literature and Human Sciences, Osaka City University 1. What are the Problems?
More information