Fault Current Limiter Based on Coated Conductor

Transcription

1 superior performance. powerful technology. Fault Current Limiter Based on Coated Conductor Juan-Carlos H. Llambes, Ph.D. SFCL Program Manager / Senior High Voltage Engineer University of Houston: V. Selvamanickam, I. Kesgin, G. Majkic CAPS, Florida State University: J. Langston, M. Steurer, F. Bogdan, J. Hauer, D. Crook, S. Ranner, T. Williams, M. Coleman SuperPower: D. Hazelton, J. Duval, M. Albertini, S. Repnoy CCA2010 October 28-30, 2010 Fukuoka, Japan SuperPower, Inc. is a subsidiary of Royal Philips Electronics N.V.

2 2G Wire Development for SFCL SuperPower s 2G SFCL Modular Design SFCL Sub-cooled Performance Recovery Under Load Performance SFCL Summary 2

3 2G Development for SFCL In order to achieve RUL, a number of challenges must be overcome by the SFCL design and wire used In resistive SFCLs, the superconducting material quenches after the occurrence of a fault If RUL is required, the quenched superconducting material must be able to cool while still carrying a fraction of load current until the 2G wire again becomes superconducting The time taken by the superconducting components to recover to their initial temperature defines the recovery time This time is very important, since SFCL devices used in distribution or transmission lines may be subjected to several faults in short periods of time When RUL is used, the design and characteristics of the SFCL system are critical to determining the overall time taken to recover under load (RUL) or no load (Non-RUL) modes We focused our efforts to improve several key components of the design that affects the recovery time and therefore the overall performance of the system. A key element driving the performance of a SFCL is the 2G wire Some features of 2G HTS conductors may provide solutions to those challenging issues: High n-values (20-40) that limit the fault current faster 2G HTS conductors in m length Superior electro-mechanical properties Higher critical currents, recently achieved 1000A/cm, seem to help during RUL 3

4 2G Development for SFCL What drives the 2G conductor design operating in an SFCL environment? System Considerations Operating current - number of tapes Operating voltage length of tape Fault levels energy deposition Parallel shunt current sharing and energy deposition 2G Wire Performance Energy to failure (statistics) Temperature rise and tolerance during fault transient Recovery Under Load (RUL) Heat transfer Cryogenics (pressure, subcooling) 4

5 2G HTS Wire Optimization Main Areas for Optimization Substrate & Stabilizer thickness and composition Critical current Enhanced heat transfer to cryogen bath Tape layout, side stabilizer coverage and end termination Each of these areas has tradeoffs More mass (constant current) is better for minimizing temperature rise Lower resistance leads to higher current sharing with fixed shunt impedance Shunt impedance variation limited by system requirements Recovery Under Load (RUL) performance optimization is a key Total Buffer stack 157 nm ~ 80nm alumina Superconductor ~ 30nm STO ~ 30 nm Homo-epi MgO ~ 10nm IBAD MgO ~ 7nm yttria Stabilizer a,b axis Substrate 5

6 The RUL recovery current per tape defines the number of tapes required Adding additional parallel tapes to fixed shunt coil pulls more of the total system current into the tapes For a meter long element, Shunt impedance is 1.5 to 10 mω / m Minimum X/R ratio at 77K is 30 X/R ratio at RT is ~ 3.75 Tape resistance at RT is ~ 336 mω / m Stabilizer Layer Silver is extremely conductive, making recovery under load difficult Modify the stabilizer layer to a material with higher resistance, to assist RUL Substrate Layer Hastelloy is a good choice of material for the substrate (high resistance) A thicker substrate limits the temperature at the end of the fault current so as not to burn the tapes A thicker substrate lowers the resistance of the tape making RUL more difficult 6

7 SFCL Fault Current Dynamics 0.5ms 90 ka Fault 30 ka 20 ka 90kA Prospective is limited to 30 ka at 1 st peak and 20kA at 5 th cycle 7

8 Weibull Plot of 2G Failures (SF12100) Probability of failure [%] Target design point 2G FCL - Probability of failure for 2G tapes as function of energy input Energy [J/cm/tape] Probability of Failure - Test data Probability of Failure Calculated using Weibull Distributuon Our target design for zero probability of failure is 25 J/cm per tape 8

9 Dynamics of the SFCL vs. Cycles of Fault Superconductor current versus number of fault cycles RMS Superconductor current vs number of fault cycles 3 x Base-Line Voltage RMS Power versus number of fault cycles. Resistance versus number of fault cycles. 9

10 2G Wire Development for SFCL SuperPower s 2G SFCL Modular Design SFCL Sub-cooled Performance Recovery Under Load Performance SFCL Summary 10

11 Baseline Modular SFCL system design Modular SFCL device design specifications Shunt Coils Zsh = Rsh + jxsh, X/R ratio, EM force withstand, thermal and electrical properties, connectors, size, weight, over-banding, ease of assembly and manufacturablity Sub-cooled Pressurized SFCL Device HTS assembly Tape per element, RUL per element, element energy capability, connectors, size, cooling orientation, failure mechanisms and mitigation, losses and their effects on cryogenics design HV design LN2 and GN2 design stress criteria, spacing between tapes, elements and modules, stress shield dimensions, using solid barriers or not, bushings and assembly integration, assembly supporting structure (post insulators), overall assembly to cryostat spacing and integration Cryogenics - LN2 flow control, LN2 and GN2 interface, pressurizing, safety issues, thermal handling of fault and steady state losses Sub-cooled Pressurized Improves the Recovery Under Load performance and enhances current carry capabilties. Improvement of LN2 dielectric performance Pressurized LN2 helps to increase dielectric properties, avoiding bubbles and lowering breakdown voltage probability. 11

12 SFCL module manufacturing and assembly 2 nd Assembly of Supports 1 st SFCL Module Manufacturing 4 th Module Installation 5 th Internal Installation 3 rd Assembly of Connections 12

13 High voltage bushing and sensors installation 8 th Assembly of HV Bushings 6 th Assembly of Connectors 7 th Assembly of Sensor Probes 13

14 QF40 Port Vacuum Line 1 Thermocouples Digital Pressure Gage LN2 Main Filling Port High Voltage Bushings Vacuum Line 2 Pressure Valve Vacuum Lines Pressure Burst Disk Pressure Valve Pressure Gage Main Vacuum Valve Vacuum Line 1 14

15 2G Wire Development for SFCL SuperPower s 2G SFCL Modular Design SFCL Sub-cooled Performance Recovery Under Load Performance SFCL Summary 15

16 Limited current with a single 2 tape circuit in a module Prospective, Limited, Shunt and Tape Current % Reduction at 1 st peak 75% Reduction at 5 th peak 10 Current (ka) I Shunt I Limited I Superconductor I Prospective Time (s) 65% Fault reduction at 1 st peak, 75% at 5 th peak for a prospective of 26kA 16

17 First peak limited current for a 2 tape circuit vs. voltage Current (ka) ~ 65% Fault Reduction A single circuit of 2 tapes in a SFCL module will limit 65% of 1 st peak fault in the entire voltage range (up to 25kA prospective tested at CAPS) 17

18 First peak current for 2 tapes vs. voltage and frequency 65% Reduction Current (ka) 48% Reduction 45% Reduction Current at different frequencies play a critical role in percentage limitation, showing how important is to select the adequate reactance. 18

19 First peak current for 2 tapes vs. voltage and frequency Current (ka) 40% Reduction 31% Reduction 20% Red. Different tape architecture also plays an important role in the overall system percentage fault limitation at different frequencies. 19

20 Peak load current per tape and voltage for 74K and 77K Sub-cooled conditions at 74K improves voltage to 192% and current to 132%, a total CCA of 2010 ~253% Fukuoka, Japan, power October 28-30, 2010 improvement. 20

21 2G Wire Development for SFCL SuperPower s 2G SFCL Modular Design SFCL Sub-cooled Performance Recovery Under Load Performance SFCL Summary 21

22 Electrical Schematic Schematic diagram of single-phase power system representation. 22

23 Recovery Under Load with AEP American Electric Power re-closure sequence for the first (3) faults 23

24 Recovery Under Load Single tape tested with 26 cycles of fault, recovering 230A peak in 1.75 sec 24

25 SFCL Fault Current Dynamics SFCL Voltage versus different X/R ratios (baseline, 200%, 300%). RUL versus different X/R ratios (baseline, 200%, 300%). 25

26 Achieving RUL is a difficult task 26

27 Electrical stress on the tapes limits RUL RUL time can affected by increasing the V/cm on the tape Limits of the design optimization are understood. Recovery under load for base-line voltage, 150% and 300% 27

28 Ability to predict RUL over wide design space Recovered current per group of tapes, impedance, voltage and impedance Test data shows Shunt Impedance drives RUL current / tape 28

29 Factors impacting RUL defined by test results RUL following the AEP sequence for TIDD substation. RUL power in 4 Parallel tapes versus voltage and impedance 29

30 2G Wire Development for SFCL SuperPower s 2G SFCL Modular Design SFCL Sub-cooled Performance Recovery Under Load Performance SFCL Summary 30

31 SuperPower s 2G HTS SFCL Project: SuperPower s 2G SFCL Device and Modules Organization and Partners: SuperPower Inc. University of Houston Florida State University Oak Ridge National Laboratory Rensselaer Polytechnic Institute 31

32 SuperPower s 2G HTS SFCL Milestones demonstrated: Fault Current Testing with MCP 2212 (2004) Fault Current Testing with 2G YBCO (2006) Completed design and testing of HV bushings (ORNL, SEI, 2006) Weibull 2G failure study of standard HTS superconductor architectures (2006) Investigated several engineered 2G architectures for improved RUL (2008) Improve connector design (2008) Modify 2G conductor to improve performance for FCL application (2008) Designed / tested compact 55kA shunt coils to withstand high fault transient loads (2008) Thermal simulation of RUL process (2008) Demonstrated Recovery Under Load (RUL) proof of concept and requirements (2008) Investigated LN 2 dielectric properties (with ORNL, ) Beta device testing specifications established (2008) Study of the Impact of bubbles on breakdown mechanism and LN2 dielectric strength (with ORNL 2008) Improved understanding of the impacts of recovery under load (RUL) for module design (2009) Optimized performance of the 2G HTS wire (2009) Investigated the performance of more compact alternate module concepts (2009) Tested FCL module components at rated voltage in a cryogenic environment (2009) Sub-cooled pressurized LN 2 environment testing (2010) Sub-cooled configuration of engineered 2G conductor (2010) Sub-cooled LN 2 dielectric performance improvement (2010) 32

33 Generalized SFCL specification development 2009 Modular baseline design for transmission and distribution lines: Module current scalable in multiples of 500 A peak Module voltage scalable from 400 V - 1 kv peak Prospective fault currents scalable from 5-10 ka peak 2010 Modular baseline design for transmission and distribution lines: Module load current capable of carrying 4kA peak tested with sub-cooled LN 2 at 74K Module voltage tested with capability of driving 4kV peak at 77K. Prospective modular fault current testing of 25 ka peak at CAPS, Previously tested up to 90kA peak at 77K at KEMA In our SFCL design, any improvement in 2G architecture performance directly translates into a proportional reduction on the overall cryogenics and system cost An additional 200% improvement of just in modular current can be achieved at 65K, which together with the 253% power improvement at 74K yields a combined improvement in power of at least 506% Great interest received from different customers to integrate our SFCL technology to develop SFCL devices and other kinds of superconducting devices built with SFCL capabilities 33

34 Generalized SFCL specification development A Distribution SCFL 11-15kV phase, 800-2KA rms load current will limit ~65-75% when assembled with 3 SFCL modules 1.25m 2.5m Distribution SCFL 15kV phase illustration A Transmission SCFL 138kV phase, 1700A rms load, 40kA prospective will limit ~65-75% if assembled with 14 SFCL modules 1.25m 2.5m Transmission SCFL 138kV phase illustration 34

35 SuperPower s SFCL Performance Line Voltage Load Current (rms) Power Prospective Fault Limited Fault Limiting Capability Limiting Type Type of Superconductor Basic Technology Working Temperature Recovery Under Load Repetitive Fault Freq. Fault Duration Controls Required System Dependence Ground footprint 3phases MVA / Footprint (m 2 ) Transmission SFCL 138kV 1,200A 165.6MVA 40kA 10kA 65-75% Resistive 2G HTS -2G HTS Wire -Cold Shunt Reactor 68K-77K RUL Capable Any Any -No Controls are necessary. 100% Passive 6 m (MVA / m 2 ) Distribution SFCL 15kV 1,800A 27MVA 40kA 10kA 65-75% Resistive 2G HTS -2G HTS Wire -Cold Shunt Reactor 68K-77K RUL Capable Any Any -No Controls are necessary. 100% Passive 2 m (MVA / m 2 ) 35

36 Questions? Please contact: 36