BUL45D2G. High Speed, High Gain Bipolar NPN Power Transistor. with Integrated Collector Emitter Diode and Built in Efficient Antisaturation Network
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1 BULDG High Speed, High Gain Bipolar NPN Power Traistor with Integrated CollectorEmitter Diode and Builtin Efficient Antisaturation Network The BULDG is stateofart High Speed High gain BiPolar traistor (HBIP). High dynamic characteristics and lottolot minimum spread (± on storage time) make it ideally suitable for light ballast applicatio. Therefore, there is no need to guarantee an h FE window. It s characteristics make it also suitable for PFC application. Features Low Base Drive Requirement High Peak DC Current Gain Extremely Low Storage Time Min/Max Guarantees Due to the HBIP Structure which Minimizes the Spread Integrated CollectorEmitter Free Wheeling Diode Fully Characterized and Guaranteed Dynamic CE(sat) 6 Sigma Process Providing Tight and Reproductible Parameter Spreads These Devices are PbFree and are RoHS Compliant* MAXIMUM RATINGS Rating Symbol alue Unit CollectorEmitter Sustaining oltage CEO dc CollectorBase Breakdown oltage CBO 7 dc CollectorEmitter Breakdown oltage CES 7 dc EmitterBase oltage EBO dc Collector Current Continuous I C Adc Collector Current Peak (Note ) I CM Adc Base Current Continuous I B Adc Base Current Peak (Note ) I BM Adc Total Device T C = C Derate above C P D 7.6 W W/ C POWER TRANSISTOR. AMPERES, 7 OLTS, 7 WATTS BASE COLLECTOR, EMITTER TO CASE A STYLE MARKING DIAGRAM BULDG AY WW Operating and Storage Temperature T J, T stg 6 to + C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.. Pulse Test: Pulse Width = ms, Duty Cycle %. A Y WW G = Assembly Location = Year = Work Week = PbFree Package ORDERING INFORMATION *For additional information on our PbFree strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. Device Package Shipping BULDG TO (PbFree) Units / Rail Semiconductor Components Industries, LLC, November, Rev. 8 Publication Order Number: BULD/D
2 BULDG THERMAL CHARACTERISTICS Characteristics Symbol Max Unit Thermal Resistance, JunctiontoCase R JC.6 C/W Thermal Resistance, JunctiontoAmbient R JA 6. C/W Maximum Lead Temperature for Soldering Purposes /8 from Case for Seconds T L 6 C ELECTRICAL CHARACTERISTICS (T C = C unless otherwise noted) Characteristic Symbol Min Typ Max Unit OFF CHARACTERISTICS CollectorEmitter Sustaining oltage (I C = ma, L = mh) CollectorBase Breakdown oltage (I CBO = ma) EmitterBase Breakdown oltage (I EBO = ma) Collector Cutoff Current ( CE = Rated CEO, I B = ) CEO(sus) CBO 7 9 EBO. I CEO dc dc dc Adc Collector Cutoff Current ( CE = Rated CES, EB = ) ( CE =, EB = ) I CES Adc EmitterCutoff Current ( EB = dc, I C = ) I EBO Adc ON CHARACTERISTICS BaseEmitter Saturation oltage (I C =.8 Adc, I B = 8 madc) (I C = Adc, I B =. Adc) BE(sat) dc CollectorEmitter Saturation oltage (I C =.8 Adc, I B = 8 madc) (I C = Adc, I B =. Adc) (I C =.8 Adc, I B = madc) CE(sat) dc DC Current Gain (I C =.8 Adc, CE = dc) (I C = Adc, CE = dc) h FE DIODE CHARACTERISTICS Forward Diode oltage (I EC = Adc) (I EC = Adc) (I EC =. Adc) EC
3 BULDG ELECTRICAL CHARACTERISTICS (continued) (T C = C unless otherwise noted) Characteristic Symbol Min Typ Max Unit DIODE CHARACTERISTICS Forward Recovery Time (see Figure 7) (I F = Adc, di/dt = A/ s) (I F = Adc, di/dt = A/ s) (I F =. Adc, di/dt = A/ s) T fr 6 DYNAMIC CHARACTERISTICS Current Gain Bandwidth (I C =. Adc, CE = dc, f = MHz) Output Capacitance ( CB = dc, I E =, f = MHz) Input Capacitance ( EB = 8 dc) f T C ob 7 C ib MHz pf pf DYNAMIC SATURATION OLTAGE Dynamic Saturation oltage: Determined s and s respectively after rising I B reaches 9% of final I B I C = A I B = ma CC = I C = A I B =.8 A CC s CE(dsat) SWITCHING CHARACTERISTICS: Resistive Load (D.C. %, Pulse Width = s) Turnon Time I C = Adc, I B =. Adc I B = Adc CC = dc Turnoff Time t on t off 9... s Turnon Time I C = Adc, I B =. Adc I B =. Adc CC = dc Turnoff Time t on t off. 9.. s SWITCHING CHARACTERISTICS: Inductive Load ( clamp =, CC =, L = H) Fall Time I C = Adc I B = madc I B = madc Storage Time t f t s s Crossover Time t c 9 9 Fall Time I C = Adc I B =. Adc I B =. Adc Storage Time t f t s s Crossover Time Product parametric performance is indicated in the Electrical Characteristics for the listed test conditio, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditio. t c
4 BULDG TYPICAL STATIC CHARACTERISTICS 8 CE = 8 CE = hfe, DC CURRENT GAIN 6 T J = - C hfe, DC CURRENT GAIN 6 T J = - C Figure. DC Current olt Figure. DC Current olt CE, OLTAGE (OLTS). A A A A I C = ma.. I B, BASE CURRENT (AMPS) A CE, OLTAGE (OLTS).. I C /I B = T J = - C.. Figure. Collector Saturation Region Figure. CollectorEmitter Saturation oltage I C /I B = I C /I B = CE, OLTAGE (OLTS) T J = - C CE, OLTAGE (OLTS) T J = - C Figure. CollectorEmitter Saturation oltage Figure 6. CollectorEmitter Saturation oltage
5 BULDG TYPICAL STATIC CHARACTERISTICS I C /I B = I C /I B = BE, OLTAGE (OLTS) T J = - C BE, OLTAGE (OLTS) T J = - C Figure 7. BaseEmitter Saturation Region Figure 8. BaseEmitter Saturation Region BE, OLTAGE (OLTS) I C /I B = T J = - C FORWARD DIODE OLTAGE (OLTS) C C REERSE EMITTER-COLLECTOR CURRENT (AMPS) Figure 9. BaseEmitter Saturation Region Figure. Forward Diode oltage C ib (pf) f (test) = MHz 9 ma C ob (pf) BCER (OLTS) ma R, REERSE OLTAGE (OLTS) R BE ( ) Figure. Capacitance Figure. BCER = f(icer)
6 BULDG TYPICAL SWITCHING CHARACTERISTICS 8 CC = PW = s I C /I B = CC = PW = s t, TIME () 6 I C /I B = t, TIME ( s) μ I C /I B = I C /I B = Figure. Resistive Switch Time, t on Figure. Resistive Switch Time, t off I C /I B = CC = Z = L C = H CC = Z = L C = H t, TIME ( s) μ t, TIME ( s) μ Figure. Inductive Storage Time, t I C /I B = Figure 6. Inductive Storage Time, t I C /I B = 6 CC = Z = L C = H t c I Boff = I Bon CC = Z = L C = H t, TIME () t, TIME () t fi Figure 7. Inductive Switching, t c & t I C /I B = Figure 8. Inductive Switching, t I C /I B = 6
7 BULDG TYPICAL SWITCHING CHARACTERISTICS t, TIME () I Boff = I Bon CC = Z = L C = H tsi, STORAGE TIME ( μs) I C = A CC = Z = L C = H I C = A h FE, FORCED GAIN Figure 9. Inductive Switching, t I C /I B = Figure. Inductive Storage Time t fi, FALL TIME () I Boff = I Bon CC = Z = L C = H I C = A tc, CROSSOER TIME () 8 6 CC = Z = L C = H I C = A I C = A h FE, FORCED GAIN I C = A h FE, FORCED GAIN Figure. Inductive Fall Time Figure. Inductive Crossover Time 6 t, TIME (). I B = ma I B = ma I B = ma I B = ma I B = A I B = I B.. CC = Z = L C = H. t fr, FORWARD RECOERY TIME () di/dt = A/ s T C = C.. I F, FORWARD CURRENT (AMP) Figure. Inductive Storage Time, t si Figure. Forward Recovery Time t fr 7
8 BULDG TYPICAL SWITCHING CHARACTERISTICS CE dyn s dyn s 9% I B s I B s TIME Figure. Dynamic Saturation oltage Measurements I C 9% I C t fi t si % I C clamp % clamp t c I B 9% I B 6 7 TIME Figure 6. Inductive Switching Measurements 8 FRM FR (. F unless otherwise specified) F t fr F. F I F % I F 6 8 Figure 7. t fr Measurements 8
9 BULDG TYPICAL SWITCHING CHARACTERISTICS Table. Inductive Load Switching Drive Circuit + F W W MTP8P F CE PEAK I C PEAK + MPF9 MPF9 MUR MTP8P R B I out CE I B I B A COMMON - off F W MJE MTPN R B F (BR)CEO(sus) L = mh R B = CC = olts I C(pk) = ma I B Inductive Switching L = H R B = CC = olts R B selected for desired I B RBSOA L = H R B = CC = olts R B selected for desired I B TYPICAL CHARACTERISTICS 6 IC, COLLECTOR CURRENT (AMPS). DC s ms ms s EXTENDED SOA IC, COLLECTOR CURRENT (AMPS) -. T C C GAIN L C = mh CE, COLLECTOR-EMITTER OLTAGE (OLTS) CE, COLLECTOR-EMITTER OLTAGE (OLTS) Figure 8. Forward Bias Safe Operating Area Figure 9. Reverse Bias Safe Operating Area 9
10 BULDG TYPICAL CHARACTERISTICS POWER DERATING FACTOR THERMAL DERATING SECOND BREAKDOWN DERATING 6 8 T C, CASE TEMPERATURE ( C) Figure. Forward Bias Power Derating 6 There are two limitatio on the power handling ability of a traistor: average junction temperature and second breakdown. Safe operating area curves indicate I C CE limits of the traistor that must be observed for reliable operation; i.e., the traistor must not be subjected to greater dissipation than the curves indicate. The data of Figure 8 is based on T C = C; T J(pk) is variable depending on power level. Second breakdown pulse limits are valid for duty cycles to % but must be derated when T C > C. Second breakdown limitatio do not derate the same as thermal limitatio. Allowable current at the voltages shown on Figure 8 may be found at any case temperature by using the appropriate curve on Figure. T J(pk) may be calculated from the data in Figure. At any case temperatures, thermal limitatio will reduce the power that can be handled to values less than the limitatio imposed by second breakdown. For inductive loads, high voltage and current must be sustained simultaneously during turnoff with the base to emitter junction reverse biased. The safe level is specified as a reverse biased safe operating area (Figure 9). This rating is verified under clamped conditio so that the device is never subjected to an avalanche mode. TYPICAL THERMAL RESPONSE r(t), TRANSIENT THERMAL RESISTANCE (NORMALIZED) SINGLE PULSE P (pk) t t DUTY CYCLE, D = t /t R JC (t) = r(t) R JC R JC =. C/W MAX D CURES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t T J(pk) - T C = P (pk) R JC (t)... t, TIME (ms) Figure. Typical Thermal Respoe (Z JC (t)) for BULD
11 BULDG PACKAGE DIMENSIONS TO CASE A9 ISSUE AH H Q Z L G B N D A K F T U S R J C T SEATING PLANE NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y.M, 98.. CONTROLLING DIMENSION: INCH.. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. INCHES MILLIMETERS DIM MIN MAX MIN MAX A B C D F G H J K L..6.. N Q.... R S....9 T U Z STYLE : PIN. BASE. COLLECTOR. EMITTER. COLLECTOR ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. SCILLC ow the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC s product/patent coverage may be accessed at /site/pdf/patentmarking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, coequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or specificatio can and do vary in different applicatio and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. SCILLC does not convey any licee under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applicatio intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless agait all claims, costs, damages, and expees, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 6, Denver, Colorado 87 USA Phone: 677 or 886 Toll Free USA/Canada Fax: 6776 or 8867 Toll Free USA/Canada orderlit@oemi.com N. American Technical Support: 8898 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 79 9 Japan Customer Focus Center Phone: 887 ON Semiconductor Website: Order Literature: For additional information, please contact your local Sales Representative BULD/D
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