Temporal Logic Replication for Dynamically Reconfigurable FPGA Partitioning
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- Letitia Williamson
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1 Temporal Logic Replicaion for Dynamically Reconfigurable FPGA Pariioning Wai-Kei Mak Dep. of Compuer Science and Engineering Unieriy of Souh Florida Tampa, Florida Eangeline F.Y. Young Dep. of Compuer Science and Engineering The Chinee Unieriy of Hong Kong Shain, N.T., Hong Kong ABSTRACT In hi paper, we propoe he idea of emporal logic replicaion in dynamically reconfigurable field-programmable gae array pariioning o reduce communicaion co. Temporal logic replicaion ha neer been explored before. We define he min-area min-cu replicaion problem gien a k-age emporal pariion aifying all emporal conrain and deie an opimal algorihm o ole hi problem. We hae alo deied a flow-baed replicaion heuriic in cae here i a igh area bound ha limi he amoun of replicaion. In addiion, we will preen a correc nework flow model for pariioning equenial circui emporally. Caegorie and Subjec Decripor B.7.2 [Inegraed Circui]: Deign Aid Layou; J.6 [Compuer Applicaion]: Compuer-Aided Engineering Compuer-aided deign General Term Algorihm, Deign, Performance. INTRODUCTION A ery large circui can be pariioned ino a number of ubcircui implemened by a e of inerconneced fieldprogrammable gae array (FPGA). Thi ype of pariioning i known a paial pariioning. Howeer, new dynamically reconfigurable FPGA (DRFPGA) offer a new poibiliy. In hi paper, we addre he pariioning problem for DRFPGA wih emporal logic replicaion for communicaion co reducion. Dynamically reconfigurable FPGA allow dynamic reue of logic block and wire egmen by employing more han one on-chip SRAM bi o conrol hem. Thi enable he execuion of a big compuaional ak ha oherwie canno be fied ino a FPGA by emporally pariioning he ak on a DRFPGA[5]. Permiion o make digial or hard copie of all or par of hi work for peronal or claroom ue i graned wihou fee proided ha copie are no made or diribued for profi or commercial adanage and ha copie bear hi noice and he full ciaion on he fir page. To copy oherwie, o republih, o po on erer or o rediribue o li, require prior pecific permiion and/or a fee. ISPD 02, April 7-0, 2002, San Diego, California, USA. Copyrigh 2002 ACM /02/ $5.00. To implemen a large circui on a DRFPGA, i ha o be pariioned ino muliple age. The configuraion of he DRFPGA will be wiched coninuouly o implemen each age one by one in order o perform he funcion of he original circui. Fig. how a circui pariioned ino age o 4, he execuion equence will be ; 2; ; 4; ; 2; ; 4;:::. In order o enure ha all compuaion will be performed correcly when he circui i diided ino age, cerain emporal conrain mu be aified. For example, o pariion a combinaional circui for implemenaion on a DRF- PGA, each logic node mu be aigned o a age no laer han any of he node ha receie inpu from i o enure he correcne of he compuaion of hoe node. A large circui PI emporally hare he ame hardware 2 4 PO a uer cycle Figure : Temporal Pariioning of a circui. In emporal pariioning, each ignal generaed in a age mu be buffered unil he age i i la needed. We define he communicaion co a a age a he number of ignal ha need o be buffered a he end of ha age. An example i hown in Fig. 2. The oupu of node a ha o be buffered a he end of age 2 and hould remain buffered unil age 4. I i known ha he orage needed for buffering up ignal creae a coniderable oerhead[2]. Hence an objecie in emporal pariioning i o minimize he communicaion co. In paial pariioning, i i known ha logic replicaion can be performed o reduce he number of inerconnecion beween componen [7, 8, 6, 4]. Howeer, replicaing logic emporally ha neer been uggeed or ineigaed before. In hi paper, we conider uing emporal logic replicaion o effeciely exploi he lack logic capaciy of a age o reduce he communicaion co. We define he min-area min-cu replicaion problem o opimally reduce he communicaion co gien a k-age emporal pariion aifying all emporal conrain. We preen an opimal algorihm o ole hi problem. We will alo preen a flow-baed replicaion 90
2 Sage communicaion co 2 4 a 4 Figure 2: Communicaion co. heuriic in cae here i a igh area bound ha limi he amoun of replicaion.. Relaed Work A number of heuriic algorihm hae been propoed for emporal pariioning. They include a li-cheduling baed algorihm in [2], a force-direced cheduling algorihm in [2, ], a nework-flow baed algorihm in [9], and a probabiliybaed ieraie-improemen algorihm in [4]. Recenly, an exac ineger linear programming formulaion of he problem wa gien in []. We noe ha he ineger linear programming approach can achiee beer reul a he expene of much larger runime, and i feaible only for mall circui ize. Bu none of hee work conider emporal logic replicaion. Here we propoe o apply emporal logic replicaion afer a pre-pariion i found, hence, i i compaible wih all preiouly propoed emporal pariioning algorihm. Neerhele, we alo deigned a new efficien hierarchical flow-baed algorihm for compuing pre-pariion wihou replicaion in hi paper. I i found ha our hierarchical flow-baed algorihm compare faorably wih he preiouly propoed algorihm..2 Paper Organizaion The re of he paper i organized a follow. In Secion 2, we will formulae he emporal pariioning problem for DRFPGA. In Secion, we will preen ahierarchical flow-baed mehod o compue a emporal pre-pariion. In Secion 4, we define he min-area min-cu replicaion problem gien a k-age emporal pariion aifying all emporal conrain and we will preen an opimal algorihm o ole hi problem. We will alo preen a flow-baed replicaion heuriic in cae here i a igh area bound ha limi he amoun of replicaion. Experimenal reul will be repored in Secion 5 and we will conclude he paper in Secion PROBLEM FORMULATION Differen archiecure [5, ] hae been propoed for DRF- PGA. In hi paper, we arge our problem formulaion on he Xilinx model []. Howeer, we emphaize ha one can eaily modify he formulaion and our algorihm for oher archiecure. We follow he formulaion and noaion ued in [9, 4] for emporal pariioning under he Xilinx model. A uer cycle i a cycle ha pae hrough all age (ee Fig. ). Gien a circui, we diinguih beween wo ype of node in he circui: combinaional node (C-node) and flip-flop node (FF-node). Noe ha a combinaional circui ha combinaional node only bu a equenial circui ha boh combinaional node and flip-flop node. The following rule mu be followed when a circui i pariioned for implemenaion on a DRFPGA o enure he correcne of he compuaion:. Each combinaional node mu be cheduled in a age no laer han any of i fanou node. 2. Each flip-flop node mu be cheduled in a age no earlier han any of i fanin node.. Each flip-flop node mu be cheduled in a age no earlier han any of i fanou node. (Thi guaranee ha all node uing he alue of he flip-flop will ue he alue compued in he preiou uer cycle.) The aboe rule can be ummarized ino wo conrain a follow. Le u μ denoe he emporal conrain ha node u mu be cheduled no laer han node. For all ne n =(; f;::: ; pg) where i he ource erminal of he ne, we hae ffl if i a C-node, hen μ j for 2 μ j μ p () ffl if i a FF-node, hen j μ for 2 μ j μ q (2) If he ource erminal of a ne i a C-node, we call he ne a C-ype ne. If he ource erminal of a ne i a FFnode, we call he ne a FF-ype ne. For a C-ype ne, i daum will be ued in ame uer cycle ha i i generaed. I ha o be buffered from he age where i ource erminal i aigned o he la age where any of i oher erminal i aigned o. See Fig. (a) for an example. For a FF-ype ne, i daum will be ued in he nex uer cycle afer i generaion. Hence i mu be buffered in he curren uer cycle from he age where i ource erminal i aigned o all he way o he end of he curren uer cycle, and mu remain buffered from he fir age of he nex uer cycle ill he la age where any of i oher erminal i aigned o. See Fig. (b) for an example. (a) age 2 4 (b) age 2 4 cu(,2) cu(2,) cu(,4) cu(4,) Figure : (a) Sorage required by a C-ype ne. Sorage required by aff-ype ne. (b) The oal communicaion co a he end of a age i couned a follow. For a C-ype ne (; f;::: ; pg), i incur a communicaion co of a he end of each age i uch ha ()» i < max 2»j»p ( j)where () denoe he age ha node i aigned o. For a FF-ype ne (; f;::: ; pg), i incur a communicaion co of a he end of each age i uch ha ()» i» k or i < 9
3 max 2»j»p ( j) where k i he oal number of age. We noe ha he oal communicaion co a he end of age k i alway equal o he oal number of FF-node in he circui.. HIERARCHICAL FLOW-BASED TEMPO- RAL PARTITIONING A k-age emporal pariion can be obained by bipariioning a circui recuriely. An approach uing nework flow compuaion wa fir propoed by Liu and Wong [9]. Howeer, here i a pifall in he modelling of a FF-ype ne in [9] ha hough i correcly enforce he emporal conrain, i will undereimae he communicaion co when he circui i bipariioned recuriely. We will explain hi problem in ubecion. and will gie a correc modelling which enure ha he communicaion co a each age will be couned correcly when he circui i recuriely bipariioned. In addiion, we will alo how ha performing he bipariioning in a hierarchical manner will gie a beer performance guaranee han performing he bipariioning in a equenial manner a in [9].. Ne Modelling A nework flow baed approach i a imple aracie approach o ole he emporal pariioning problem becaue i can eaily handle emporal conrain by uiable nework modelling. If here exi a emporal conrain u μ meaning ha node u haobecheduled o a age no laer han ha of node, we can model hi conrain by inroducing a direced arc (; u) from o u wih infinie co in he flow nework. Recall ha for a weighed direced graph, he co of a (unidirecional) cu (X; X)(X μ X μ = ffi and X [ X μ = he erex e of he graph) i he um of he weigh of all he edge going from X o X[]. μ Therefore for any finie cu (X; X) μ compued in he nework, eiher we hae (i)u; X, or (ii) u; X, μ or (iii) u 2 X and X, μ bu we will neer hae X and u 2 X μ (oherwie he cu would hae infinie co due o arc (; u)). The ne modelling ued in [9] for compuing a bipariion of a ubcircui i hown in Fig. 4. Though he modelling in Fig. 4 correcly enforce he emporal conrain (() and (2) in Secion 2) for boh C-ype ne and FF-ype ne, i doe no coun he communicaion co due o FF-ype ne correcly. Conider a FF-ype ne n = (; f;::: ; pg). There are wo poible condiion in which he ne will incur a communicaion co in cu(i; i +) (i =; 2;::: ;k). Fir, if he ource erminal i on he lef hand ide of cu(i; i + ), ne n will incur a co of one in cu(i; i +) ince i ignal mu be buffered a he end of age i. For example, he FF-ne in Fig. (b) incur a co of one in boh cu(,4) and cu(4,). Second, if ome erminal j(2» j» p) ion he righ hand ide of cu(i; i +), ne n will incur a co of oneincu(i; i + ) ince i ignal mu be buffered a he end of age i. For example, he FF-ne in Fig. (b) incur a co of one in cu(,2). Howeer, i can be checked ha he communicaion co i no correcly accouned for byuing he FF-ype ne modelling hown in Fig. 4(b). Here we preen a new and correc modelling for FFype ne in Fig. 5. Our modelling enure ha he ize of cu(i; i + ) i correcly increaed by when he ource erminal i aigned o he lef of cu(i; i+) (ee Fig. 6(a)), or when ome j (2» j» p) i aigned o he righ of (a) (b) a C-ype ne wih wo erminal 2 a FF-ype ne wih wo erminal 2 p.. p a C-ype ne wih muliple erminal a FF-ype ne wih muliple erminal Figure 4: Ne modelling in [9]. cu(i; i + ) (ee Fig. 6(b)), bu i no affeced by he ne oherwie (ee Fig. 6(c)).. a FF-ype ne wih wo erminal p a FF-ype ne wih muliple erminal Figure 5: Correc modelling of a FF-ype ne. Node and are he ource and ink node of he conruced nework. (a) (c). p. p cu(i,i+) cu(i,i+) (b). p cu(i,i+) Figure 6: Cuing of a FF-ype ne ( ; f ;::: ; pg). (a) If i on he lef of cu(i; i +), i increae he ize of cu(i; i +) by. (b) If ome j (j =2;::: ;p) i on he righ of cu(i; i +), i increae he ize of cu(i; i +) by. (c) If i on he righ ofcu(i; i +) and j i on he lef of cu(i; i +) for all j =2;::: ;p, he ize of cu(i; i +) i no affeced by he ne..2 Area-balanced Pariion Wih he correc ne modelling, we can bipariion a circui by bipariioning i correponding flow nework uing he bipariioning heuriic FBB propoed by Yang and Wong[4]. I i an efficien max-flow min-cu heuriic ha repeaedly cu he oerized ide wih gradually increaing cu ize unil he raio of he area of he wo ide i wihin a deired range. I wa hown in [4] ha he repeaed max-flow min-cu proce can be implemened efficienly uing incremenal flow compuaion o ha i ha he ame aympoic ime complexiy a ju one max-flow compuaion, i.e., O(jV jjej). 92
4 . Hierarchical Sequenial Bipariioning There are wo poible way o obain a k-way pariion by recurie bipariioning. One poibiliy i o fir bipariion he circui ino wo par of roughly equal ize, hen he wo ubcircui are recuriely bipariioned in he ame manner unil each ubcircui can be fied ino a age. Anoher poibiliy i o ue he fir bipariioning o deermine he fir age, hen he re of he circui i repeaedly bipariioned o obain he econd age, he hird age, ec. in equenial order. We refer o he former a hierarchical bipariioning and he laer a equenial bipariioning. We adop he hierarchical bipariioning approach een hough he equenial bipariioning approach wa adoped in [9]. The hierarchical bipariioning approach can yield uperior k-age pariion oluion in comparion wih he equenial bipariioning approach. In paricular, i can be proed ha if we apply a ρ-approximaion bipariioning algorihm in a hierarchical manner, he maximum communicaion co of he reulan k-age pariion i upper bounded by O(ρ log k) r Λ where r Λ i he maximum communicaion co in an opimal k-age pariion. Howeer if we apply he ame bipariioning algorihm in a equenial manner, he maximum communicaion co of he reulan k-age pariion i upper bounded by O(ρk) r Λ. The ame reul i known for a imilar problem, he minimum cu linear arrangemen problem (ee [0]), and can be proed imilarly..4 Timing Opimizaion In order o minimize he execuion ime of a age, we hould balance he widh of all age. Therefore when we fir bipariion a circui, he lengh of he longe pah on boh ide hould be upper bounded by dd=2e where D i he lengh of he longe pah in he circui. Le ffi O() denoe he lengh of he longe pah from node o ome primary oupu and ffi I() denoe he lengh of he longe pah from ome primary inpu o node. When we fir bipariion he circui ino (X; μ X), anynode wih ffi I() > dd=2e mu be aigned o μ X, oherwie here would be a pah of lengh greaer han dd=2e in X. Similarly, any node wih ffi O() > dd=2e mu be aigned o X, oherwie here would be a pah of lengh greaer han dd=2e in μ X. In general, a ube of node can be preaigned o heir proper age before pariioning. So when we perform bipariioning o compue cu(i; i + ), all node ha are pre-aigned o age o i are collaped o he ource node of he nework, and all node ha are preaigned o age i + o k are collaped o he ink node of he nework. We noe ha hi doe no only guaranee he iming performance of he compued oluion, i alo reduce he running ime of he pariioning proce. 4. TEMPORAL REPLICATION Temporal logic replicaion exploi he lack logic capaciy of a age o reduce he communicaion co. The degree of he communicaion co reducion by emporal replicaion depend on he amoun of replicaion allowed, which in urn depend on he gae uilizaion per age of he pre-pariion on he DRFPGA. We aume ha a k-age emporal pariion wihou replicaion ha been compued. The commu- Thi upper bound can be relaxed minimally if here doe no exi an area-balanced bipariion under he original bound. nicaion co a he end of age i i equal o he ize of cu (i; i +). We can reduce he cu ize by carefully replicaing ome node in age i o age i +. For example, Fig. 7(a) how a 4-age emporal pariion wihou replicaion, he communicaion co a he end of age 2 can be reduced from 4 o by replicaing node j o age a hown in Fig. 7(b). Noe ha ince we ar wih an original pariion ha already aifie eery emporal conrain, we do no hae o worry abou he emporal conrain when we perform replicaion. For example, in Fig. 7(b), he replica of node j in age doe no need o precede node l becaue node l can ge i correc inpu from he original copy of node j in age 2. (a) age a 2 4 g h i d b (b) age 2 4 a b c d e f j j k g h i l m e m Figure 7: Replicaion for communicaion co reducion. (a) Before replicaing node j. (b) Afer replicaing node j. (C-ype ne: (a; fb; hg), (b; fe; cg), (d; feg), (e; ff; jg), (g; fhg), (h; fig), (i; fe; mg), (j; fl; kg) FF-ype ne: (m; fhg)) Below we define he min-cu replicaion problem and he min-area min-cu replicaion problem. Since here i an upper bound on he area of each age in pracice, i i deirable o minimize he amoun of replicaion. We howha he min-area min-cu replicaion problem can be oled opimally byaflow-baed algorihm. In cae he age area bound i ufficienly large, i uffice o apply hi algorihm ha ole he min-area min-cu replicaion problem opimally. In cae i i no, we hae alo deied a heuriic algorihm o compue replicaion e o effeciely reduce he communicaion co wihou exceeding he age area bound. Min-cu replicaion problem Compue a ube of node in age i for replicaion ino age i + uch ha afer replicaion he communicaion co a age i i maximally reduced (i =;::: ;k 2 ). Min-area min-cu replicaion problem Compue a minimum ube of node in age i for replicaion ino age i+ uch ha afer replicaion he communicaion co a age i i maximally reduced (i =;::: ;k ). We conider he min-area min-cu replicaion problem. Le V i denoe he e of node in age i in he original pariion before replicaion. Le R i be he e of node replicaed from age i o age i +. Obere haby replicaing R i 2 Noe ha he number of buffer required a he end of age k i alway equal o he number of flip-flop node in he circui and canno be reduced by replicaion. j l c k f 9
5 ino age i +, he original buffer required for buffering up he oupu ignal of R i for age i + can be remoed (becaue R i will alo be in age i + afer replicaion), bu new buffer are required o buffer any oupu ignal of V i R i ha i ued by R i in age i+. Hence he min-area min-cu replicaion problem i equialen o he problem of compuing a minimum cu (V i R i;r i) uch ha jr ij i minimized. We can ole hi problem by uing a flow baed mehod in a nework G 0 i =(Vi 0 ;Ei). 0 Vi 0 = V i [ B i [f; g where B i i he e of original buffer required a he end of age i, and and are he ource and ink node added for flow compuaion. Each ne (; f;::: ; pg) inagei i modelled by a e of arc in he form of a ar a hown in Fig. 8 o ha he cu ize i increaed by wheneer he ource erminal i in V i R i bu ome oher erminal of he ne are in R i. There i an infinie capaciy arc (b; ) for each nodeb 2 B i. Finally, here i an infinie capaciy arc (; ) for each node V i ha i a primary inpu (e.g. node d in Fig. 7(a)) or a node ha receie any buffered inpu from he preiou age (e.g. node b and i in Fig. 7(a)). Thi i o aoid geing he riial minimum cu oluion (V i R i;r i) where R i = V i. Fig. 9 how he flow nework for compuing a replicaion e for age 2 of he pariion in Fig. 7(a). A maximum flow from o can be compued for he conruced nework G 0 i. Taking R i = f V i : 9 an augmening pah from o in G 0 ig, wegeaminimum cu (V i R i;r i)uch ha jr ij i minimized[5]. In oher word, we ge a minimum replicaion e R i uch ha he communicaion co a age i i maximally reduced. 2 Two-erminal ne... Muli-erminal ne Figure 8: Ne modelling for replicaion e compuaion. V 2 R 2 b d i e m R 2 j a minimum cu Figure 9: Nework for compuing a replicaion e for age 2 of he pariion in Fig. 7(a). If he age area bound i ufficienly large, i uffice o ole he min-area min-cu replicaion problem a decribed aboe. If no, we can ue he oluion of he min-area mincu replicaion problem a he aring poin. Suppoe R i i he replicaion e compued for he min-area min-cu replicaion problem bu jv i+j + jr ij exceed he age area bound. We can adap he repeaed max-flow min-cu proce decribed in Secion.2 o repeaedly cu he oerized replicaion e R i o obain maller replicaion e wih gradually increaing cu ize unil jv i+j + jr ij i wihin he required ize. The replicaion algorihm i gien below. Noe ha emporal conrain can be afely ignored in replicaion. l p Min-cu Replicaion under Sage Area Bound Inpu: Sage index i (» i» k ). Sage area bound A. Oupu: Replicaion e R i for replicaion from age i o age i +.. Conruc replicaion nework G 0 i. 2. Compue a maximum flow from o. Le R i = f V i : 9 an augmening pah from o g and X = V i R i.. If jv i+ j + jr i j»a hen op and reurn R i Collape all node in X o ; 4.2 Collape o anode R i ; 4. Goo 2. Gien a pre-pariion, we apply he following procedure o reduce he maximum communicaion co. Temporal Replicaion for Communicaion Co Reducion. Idenify he age i (i =;::: ;k ).. he number of buffer required a he end of age i i maximum. 2. If replicaion ha been performed from age i o age i+, op; oherwie, perform replicaion from age i o age i + and goo ep. 5. EXPERIMENTAL RESULTS We implemened our flow-baed replicaion algorihm for communicaion co reducion and he hierarchical flow-baed emporal pariioning algorihm for compuing pre-pariion wihou replicaion. We performed a number of experimen. Fir, we performed a e of experimen o compare he performance of our hierarchical flow-baed approach wih wo of he be heuriic repored in lieraure [9, 4]. The fir heuriic i FBP-m[9] which ue a equenial flow-baed approach, and he econd i PAT[4] which ue a probabiliybaed ieraie-improemen approach. A in [9] and [4], we applied our hierarchical flow-baed emporal pariioning algorihm for balanced pariioning ino eigh age uch ha he ize of each agei beween b0:95n=8c and d:05n=8e where n i he oal number of node in he circui. The ame e of MCNC Pariioning9 benchmark circui were ued a in [9] and [4]. The characeriic of he circui are hown in Table. The reul are hown in Table 2. Our hierarchical flow-baed pariioner ouperformed FBPm, a imilar flow-baed pariioner bu performing bipariioning in a equenial manner, for all bu one benchmark circui. I alo obained beer reul han PAT for en ou of he hireen benchmark circui. Table : Benchmark circui characeriic. Circui # Node # Ne Circui # Node # Ne c c c c A poined ou a he beginning of Secion 4, he degree of communicaion co reducion by emporal logic replicaion depend on he gae uilizaion per age of he pre-pariion on he DRFPGA. For experimenal purpoe, we imply aume ha he area of each age afer replicaion can be increaed o dffn=8e for ff = : and ff = :2. The re- 94
6 Table 2: Reul of 8-age pariioning wihou replicaion. Circui Max communicaion co Our Impr (%) FBP-m PAT Our FBP-m PAT c c c c aerage ul are hown in Table. All he pre-pariion were compued byourhierarchical flow-baed pariioner uch ha each age conain beween b0:95n=8c and d:05n=8e of he node. The fifh column and he eighh column how he percenage of node ha are acually replicaed for ff =: and ff = :2, repeciely. For ff = :, he communicaion co wa reduced by 7.8% on aerage wih only 2.8% of node replicaed. For ff = :2, he communicaion co wa reduced by 0.94% on aerage wih only 4.46% of node replicaed. Table : Communicaion co reducion by replicaion. (C = maximum communicaion co, Imp = improemen, Rep = node replicaed) Rep. Wih replicaion Circui No. ff =: ff =:2 C C Imp Rep C Imp Rep (%) (%) (%) (%) c c c c aerage CONCLUSIONS In hi paper, we inroduced he concep of emporal logic replicaion for DRFPGA pariioning. We conidered uing emporal logic replicaion o effeciely exploi he lack logic capaciy of a age o reduce he communicaion co. We formulaed he min-area min-cu replicaion problem and preened an opimal algorihm o ole i. For he cae ha here i a igh area bound ha limi he amoun of replicaion, we preened a flow-baed replicaion heuriic. In addiion, we alo preened a correc nework flow model for pariioning equenial circui emporally and deied a new hierarchical flow-baed pariioner for compuing prepariion aifying all emporal conrain. Acknowledgemen We would like o hank Prof. Yao-Wen Chang for helpful dicuion on [4]. 7. REFERENCES [] R.K. Ahuja, T.L. Magnani, and J.B. Orlin, Nework Flow: Theory, Algorihm, and Applicaion, Prenice Hall, 99. [2] D. Chang and M. Marek-Sadowka, Buffer Minimizaion and Time-muliplexed I/O on Dynamically Reconfigurable FPGA", in Proc. of he ACM Inernaional Sympoium on Field Programmable Gae Array, pp , 997. [] D. Chang and M. Marek-Sadowka, Pariioning Sequenial Circui on Dynamically Reconfigurable FPGA", in Proc. of he ACM Inernaional Sympoium on Field Programmable Gae Array, pp. 6-67, 998. [4] M.C.T. Chao, G.M. Wu, I.H.R. Jiang, and Y.W. Chang, A Cluering and Probabiliy-baed Approach for Time-muliplexed FPGA Pariioning", in Proc. of he IEEE/ACM Inernaional Conference on Compuer-Aided Deign, pp , 999. [5] A. DeHon, DPGA-coupled Microproceor: Commodiy IC for he Early 2 Cenury", in Proc. of IEEE Workhop on FPGA for Cuom Compuing Machine, pp. -9, 994. [6] J. Hwang and A. El Gamal, Min-Cu Replicaion in Pariioned Nework", IEEE Tran. on CAD, ol. 4(), pp , Jan [7] C. Kring and A.R. Newon, A Cell-replicaing Approach o Mincu-Baed Circui Pariioning", in Proc. of he IEEE Inernaional Conference on Compuer-Aided Deign, pp. 2-5, 99. [8] R. Ku»znar, F. Brglez, and B. Zajc, A Unified Co Model for Min-Cu Pariioning wih Replicaion Applied o Opimizaion of Large Heerogeneou FPGA Pariion", in Proc. of he ACM European Deign Auomaion Conf., pp , 994. [9] H. Liu and D.F. Wong, Nework Flow Baed Circui Pariioning for Time-Muliplexed FPGA", in Proc. of he IEEE Inernaional Conference on Compuer-Aided Deign, pp , 998. [0] D.B. Shmoy, Cu Problem and Their Applicaion o Diide-and-Conquer", Approximaion Algorihm for NP-hard Problem, (D.S. Hochbaum, ed.) PWS, pp , 997. [] S. Trimberger, A Time-Muliplexed FPGA", in Proc. of IEEE Sympoium on Field-Programmable Cuom Compuing Machine, pp , 997. [2] S. Trimberger, Scheduling Deign ino a Time-Muliplexed FPGA", in Proc. of he ACM Inernaional Sympoium on Field Programmable Gae Array, pp. 5-60, 998. [] G.M. Wu, J.M. Lin, and Y.W. Chang, Generic ILP-Baed Approache for Time-Muliplexed FPGA Pariioning", IEEE Tran. on CAD, ol. 20(0), pp , Oc [4] H. Yang and D.F. Wong, Efficien Nework Flow baed Min-Cu Balanced Pariioning", in Proc. of he IEEE/ACM Inernaional Conference on Compuer-Aided Deign, pp , 994. [5] H. Yang and D.F. Wong, New Algorihm for Min-Cu Replicaion in Pariioned Circui", in Proc. of he IEEE In'l Conf. on Compuer-Aided Deign, pp ,
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