HIgh Voltage chip Analysis Circuit (HIVAC)

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1 ate: esigner: RWING NO: SLE: SHEET: OF TOP MK HIgh Voltage chip nalysis ircuit (HIV) March H_I_RSEL H_I_RSEL H_I_SEL H_I_ H_I_ H_I_ H_I_SEL H_I_SW H_I_S H_I_S H_I_S H_I_P H_I_P H_I_P H_I_P H_I_PSH H_I_PSL H_I_RG T_PHSE T_PHSE T_TIN T_PHSE T_XP T_PHSE T_I_P T_PP T_I_PULSE T_PHSE T_PHSE T_PHSE T_PHSE H_TVI H_TP H_TP H_TP H_TP H_OMZ H_OMZ H_OMZ H_O_RG H_O_PSL H_O_PSH H_O_P H_O_P H_O_P H_O_P H_O_S H_O_S H_O_S H_O_SW H_O_SEL H_O_ H_O_ H_O_ H_O_SEL H_O_RSEL H_O_RSEL T_SH T_OMP T_OMP T_OUTPUT T_OUTPUT T_OUTPUT T_OUTPUT T_OUTPUT T_OMP T_SH HVMOS SHEET T_PHSE T_PHSE T_PHSE T_I_PULSE T_PP T_I_P T_PHSE T_XP T_PHSE T_TIN T_PHSE T_PHSE H_I_PSL H_I_PSH H_I_P H_I_P H_I_RG H_I_P H_I_P H_I_S H_I_S H_I_S H_I_SW H_I_SEL H_I_ H_I_ H_I_ H_I_SEL H_I_RSEL H_I_RSEL US_IFLK US_TL US_TL US_TL US_WKEUP US_LKOUT US_RY US_RY _SLK _SLK _LK _OE _ST _SLK _SLO T_PHSE RFLK OFF_IN OFF_SLK OFF_SYN _L _L ONTROL SHEET _SLK _SLK _LK _SLK _SLO _ST _OE _RET _OS _RET _OS OFF_IN OFF_SLK OFF_SYN _L _L SIGNL_UFF/ SHEET US_IFLK US_WKEUP US_TL US_TL US_TL US_RY US_RY US_LKOUT US SHEET H_O_S H_O_SW H_O_RG H_O_SEL H_O_ H_O_ H_O_ H_O_RSEL H_O_SEL H_O_RSEL H_O_P H_O_P H_O_PSL H_O_S H_O_S H_O_P H_O_P H_O_PSH H_TVI H_TP H_TP H_TP H_TP H_OMZ H_OMZ H_OMZ T_SH T_SH T_OMP T_OMP T_OUTPUT T_OUTPUT T_OUTPUT T_OUTPUT T_OUTPUT T_OMP _RET _OS _RET _OS ONNET/LO_PS SHEET POWER_IGITL SHEET POWER_NLOG SHEET POW_PS SHEET POWER_IGITL SHEET9 RFLK LK/TEST_HR SHEET

2 R k R.k R R 9.9k.k R U W V W R 9 VREF VREF N HIgh Voltage chip nalysis ircuit (HIV) esign: RWING NO: MK March HVMOS SLE: SHEET: OF V UF VI_IN LEMO IU OMP PP 9 VSU VSS PHSE SH PHSE PHSE PP VSU 9 VSS 9 PHSE PP 9 PP OMP OMP I_P _V SUS_S V. PHSE 9 XP VREF _V SUS_S V. PHSE VREF TIN PHSE _V 9 SUS_S V. PHSE SH _V SUS_S PP VSS VSU VSS VSU PP IRMP OUTPUT VSS VSU OUTPUT V. I_PULSE OUTPUT _V SUS_S V. OUTPUT OUTPUT 9 U HVHIP_TEST_PINS_ VSU 9 VSS VSS_HV O_S O_S O_S O_SW V_HV PP VSU VSS 9 VSS_HV 9 O_SEL 9 O_ 9 O_ 9 O_ 9 O_SEL 9 O_RESL 9 O_RSEL 9 V_HV 9 PP 9 I_PSL I_PSH I_P I_P I_P I_P _V SUS_S V. I_S 9 I_S I_S ISW _V SUS_S V. I_SEL I_ I_ I_ 9 I_SEL I_RSEL I_RSEL VSU VSS VIEOIN TVUT 9 TESTP TESTP TESTP TESTP PP SUS_S _V O_MZ 9 O_MZ O_MZ V. SUS_S _V PP V_HV O_P O_P O_P O_P O_PSH O_PSL VSS_HV VSS VSU PP V_HV O_RG VSS_HV VSS VSU V. I_PULSE I_RG _V SUS_S V. 9 9 R R UF_ UF_ U HVHIP_PINS_TO_ H_TVI H_TP H_TP H_TP H_TP H_OMZ H_OMZ H_OMZ.V.V HV.V H_I_PSL H_I_PSH H_I_P H_I_P H_I_P H_I_P H_I_S H_I_S H_I_S H_I_SW H_I_SEL H_I_ H_I_ H_I_ H_I_SEL H_I_RSEL H_I_RSEL V_HV H_O_P H_O_P H_O_P H_O_P H_O_PSH H_O_PSL VSS_HV V_HV H_O_RG VSS_HV H_I_RG.V.V HV.V HV.V T_PP T_OMP T_OMP T_I_P T_PHSE T_XP T_PHSE VSS_HV H_O_S H_O_S H_O_S H_O_SW V_HV VSS_HV H_O_SEL H_O_ H_O_ H_O_ H_O_SEL H_O_RSEL H_O_RSEL V_HV T_SH T_PHSE T_PHSE T_TIN T_OUTPUT T_OUTPUT T_I_PULSE T_OUTPUT T_OUTPUT T_OUTPUT T_OMP T_PHSE T_SH T_PHSE T_PHSE T_PHSE HV.V HV.V HV.V.V VREF VREF VREF VREF

3 _LP _LN _LP _LN VO L9P 9 _L9N _LP _LN _LP _LN _LP _LN VUX _LP 9 _LN _LP _LN _L9P VO L9N _LP _LN _LP_ 9 _LN L9P_ VO L9N LP LN LP LN_ VUX 9 _LP LN LP LN LP LN L9P L9N_ 9 VO_ /VREF LP LN LN _LP /VREF_ VO L9N L9P_ 9 _LN LP LN LP LN LP_ VUX _LN LP_ 9 _LN LP L9N_ VO L9P LN LP LN LP_ 9 _L9N_ VO L9P LN LP LN LP_ VUX _LN_ 9 _LP LN LP LN LP L9 L9P_ VO_ 9 _LN LP LN _LP HIgh Voltage chip nalysis ircuit (HIV) OE: esign: RWING NO: SLE: March MK ONTROL SHEET: OF LK ONE /VREF LN LP_ 99 9 VO_ 9 9 /VREF_ 9 _LN_ 9 _LP_ 9 9 IN 9 9 _LP_ 9 VUX T _LN LP_ /VREF VO_ INIT LP_/OUT _GLK 9 _GLK /VREF GLK _GLK _LN_ VO LP_ T 9 VUX _LN LP LN LP LN LP_ VO_ 9 _LN_/RWR _LP_/S_ M M M TI PRG_ HSWP /VREF _LN _LP VO_ /VREF LN LP LN LP_ VUX T _LN LP_ VO LN LP LN_/GK _LP_/GK _LN_/GK _LP_/GK _LN_ VO LP_ T VUX _LN LP LN LP LN LP_ VO LN LP_ TMS TK TO J V N TK TO TI TMS JTG_PROG R k R k G R RGLE U XS TI TMS TK TO U O LK E VJ VO T 9 OE/RESET F EO N.. XFS 9 U RST V WI MR R.k R.k R.k.V FTMS ETI FTO FTK PROG_ ETO.V.V.V LEG _SLK _SLO FTMS FTK FTO LER US_IFLK US_F US_F US_F US_F US_F US_F US_F US_F US_TL US_TL US_TL US_P US_P US_P US_P US_P US_P US_P US_P US_WKEUP US_F US_F9 US_F US_F US_F US_F US_F US_F US_LKOUT US_RY US_RY US_F[:] US_P[:] US_F[:].V ETI FTMS FTK ETO.V.V FIN ONE LK INT_ PROG_ TPS.V INT_ FIN MON MON MON9 MON MON LK ONE MON MON MON RFLK US_IFLK MON MON MON MON MON MON MON MON OFF_IN OFF_SLK OFF_SYN _SLK _SLK _LK _OE _ST H_I_RG H_I_PSL H_I_PSH H_I_P H_I_P H_I_P H_I_P H_I_S H_I_S H_I_S H_I_SW H_I_SEL H_I_ H_I_ H_I_ H_I_SEL H_I_RSEL H_I_RSEL LEG LER T_I_PULSE T_PP T_PHSE T_I_P T_PHSE T_XP _L _L T_TIN T_PHSE T_PHSE T_PHSE T_PHSE T_PHSE T_PHSE

4 .V 9 Y RFLK V OUT E/ SMT_OS J MON MON MON MON MON9 MON MON MON PIN PIN PIN PIN 9 PIN9 PIN PIN PIN PIN 9 PIN9 PIN PIN PIN PIN PIN PIN PIN PIN PIN PIN MON MON MON MON MON MON MON MON MONPIN HIgh Voltage chip nalysis ircuit (HIV) OE: esign: RWING NO: March MK LK/TEST_HR SLE: SHEET: OF

5 9 pf R _RET _OS R R R k OFF_IN OFF_SLK OFF_SYN R R k V pf IN 9 SLK SYN R9.V.V REF VO VO VO VO U V LMP OFFSET IN IN VS VOFF VOFF R U 9R 9 OFFSET VS OUT OMP OFF_VO OFF_VO R pf VOFF V pf 9 OFF_VO OFF_VO VOFF R 9 R 9 pf R.k 9.uF.k 9 pf V U OFFSET OFFSET IN VS IN OUT VS OMP RES: ohms pf 9R 9 V.nF R.k RES: ohms.nf _R _SLK _SLK _LK _SLK _OE _SLO _ST LMP G R SLK SLK LK SLK OE SLO ST U 9.V V RV RVSS V 9 VSS V VSS ML OFFSET 9 P PT uf V uf _RET R9 R R R k 9 pf U OFFSET OFFSET IN VS IN OUT V R R9 99 pf U OFFSET OFFSET IN VS V _L R9 k U R9 k R9 k VS OMP.k IN OUT _OS R k R9 V LMP 9R VOFF pf 9 pf V VS OMP 9R pf LMP OFF_VO VOFF R 9.uF _L U HIgh Voltage chip nalysis ircuit (HIV) OE: esign: RWING NO: R9 k March MK SIGNL_UFF/ OFF_VO SLE: SHEET: OF

6 TE: pf Keep Short Y XTL pf US_.V U9 US_.V U XTLOUT XTLIN V V 9 V V V V V RST V WI MR TPS VUS VUS US_P[:] US_P US_P US_P US_P US_P US_P US_P US_P US_F[:] US_F US_F US_F US_F US_F US_F US_F US_F P P P P P P P P F F F F 9 F F F F V RESET IFLK LKOUT WKEUP 9 TL/FLG TL/FLG TL/FLG R k US_IFLK R k R US_LKOUT k US_WKEUP US_TL US_TL US_TL J V SHL SHL US US_F[:] US_F US_F9 US_F US_F US_F US_F US_F US_F F F9 F F F F F F YPV RY/SLR 9 RY/SLWR SL S US_RY US_RY US_.V RESERVE 9 R k V N SL S U VSS LI/SM JP HIgh Voltage chip nalysis ircuit (HIV) R k R k JUMPER OE: esign: RWING NO: March MK US SLE: SHEET: OF

7 9 9 TP TP H_O_S H_O_S pf pf S 9 S SU J S 9 SW RG pf pf H_O_S H_O_SW H_O_RG H_TVI H_TP TVI TP TP R9 SU SO OS RET R SO RET OS R 9 SO T T VSS SEL SEL 9 SEL ON SREF _VSS R9 H_TP H_TP H_TP SO _RET _OS R R _OS _RET SO R99 R H_O_P H_O_P H_O_PSH OG OG PSH P P S S RET OS R SO RET OS R OG OG 9 R OS RET SO R OS RET SO R OS 9 RET SO R RET OS SO P P PSH SEL VL VH SP SREF 9 R RSEL RSEL RSEL RSEL SEL SEL SEL 9 SEL RSEL RSEL RSEL RSEL I P P PSL 9 9 FLEX_ONN S SW RG _ RSEL SEL ON ON RSEL P P PSL SEL H_O_SEL H_O_ H_O_ H_O_ VL VH SP R H_O_RSEL H_O_SEL H_O_RSEL H_O_P H_O_P H_O_PSL H_OMZ H_OMZ H_OMZ T_SH T_SH T_OMP T_OMP T_OUTPUT T_OUTPUT OMZ OMZ OMP OMP SH OMZ SH O O O 9 O X X X X T_OUTPUT T_OUTPUT O OMP X X X X T_OUTPUT HIgh Voltage chip nalysis ircuit (HIV) T_OMP J FLEX PS OE: esign: RWING NO: J FLEX PS March MK ONNET/LO_PS SLE: SHEET: OF

8 V VSS_HV V VSS_HV V.V U VSS_HV U VSS_HV U PV V_ J LMIMP R J LMIMP R J LMIMP R 9 R uf.v R9 uf R9 9 uf V VSS_HV V VSS_HV U VSS_HV U VSS_HV J LMIMP R R uf J LMIMP R R uf VOLTGE VLUE VSS_HV V VSS_HV V VSS_HV V VSS_HV V HIgh Voltage chip nalysis ircuit (HIV) OE: esign: RWING NO: March MK POWER_IGITL SLE: SHEET: OF

9 V_ R PV N J V LML R V_HV N J V LML R V V J LMEMP.V V V_HV V V_HV V_HV V V_HV N J V LML R V_HV R 9 uf R uf R uf R uf V.V.V.V V V_HV N J V LML R PV 9 U IN OUT N/F EN TPS9 PV N J V LML R V_HV R.9k 9 uf uf R9 9 uf V.V R N J V LML R uf PV V HV.V V J LMEMP R HVP VOLTGE V_HV V_HV VLUE V V VUS US_.V R 9 uf V_HV V_HV V V 9 N J V LML R US_P HIgh Voltage chip nalysis ircuit (HIV) OE: esign: RWING NO: R 9 uf March MK POWER_IGITL SLE: SHEET: 9 OF

10 N J V R N J V V N J V VL N J V SO V R V V V VL V SO LML R LML R 9 LML R LML R R uf R9 uf R uf.v R uf V SP V VH R N J V LML R uf VH V V 9 R N J.k V9 LML R9 uf V R N J.k V LML R uf SP.V V 9 R N J V LML R uf SO SO V V V R R9 N J.k V LML R uf R V R R N J.k V9 LML R uf R U9 J R9 LMIMP R9 V uf VOLTGE R VH VL SP R R SO SO VLUE V V V.V.V.V V V HIgh Voltage chip nalysis ircuit (HIV) OE: esign: RWING NO: March MK POWER_NLOG SLE: SHEET: OF

11 SLE: OE: RWING NO: POWER_PS SHEET: OF esign: MK HIgh Voltage chip nalysis ircuit (HIV) March L uh R 9 POWER POWER POWER POWER 9.V.V.V.V.V.V.V.V.V V V.V US_.V US_.V HV.V HV.V V V.V.V.V.V V V.V.V

#1 10P/DIL NORTH #3 #3 #3 #3 #3 #3 #3 #3 R198 RES0603 RES0603 DNP DNP DNP RES0603 RES0603 RES SDI_N 3-SDO_N 3-ALERT_N 3-CS_N 3-SCLK_N 3-CONV_N

#1 10P/DIL NORTH #3 #3 #3 #3 #3 #3 #3 #3 R198 RES0603 RES0603 DNP DNP DNP RES0603 RES0603 RES SDI_N 3-SDO_N 3-ALERT_N 3-CS_N 3-SCLK_N 3-CONV_N P REVISION REOR J SP88 0 - RE N_JK P 90-00_-POS TP # - Remove these components to stack north # - Populate these components to stack north Use k Resistors or adjust as needed Header - Molex 90-0 PITORS,

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