Design Optimization of Soft-Switched Insulated DC/DC Converters With Active Voltage Clamp

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1 Desgn Optmzaton of Soft-Swtched Insulated DC/DC Converters Wth Actve Voltage Clamp G. Spazz*, L. ossetto**,. attavell** * Dept. of Electroncs and Informatcs ** Dept. of Electrcal Engneerng Unversty of adova Va Gradengo 6/a 5 adova - ITALY Tel: (+9) Fax: Abstract - The use of an actve voltage clamp n nsulated DC/DC converters allows a lmtaton of the voltage stress due to transformer leakage nductance, a reducton of the commutaton losses, and an ncrease of the swtchng frequency. It s therefore mportant to ensure soft swtchng n the whole operatng range, penalty a consderable worsenng of converter effcency and electromagnetc nose generaton. In ths paper a desgn approach of nsulated converters wth actve voltage clamp s presented, whch allows soft swtchng from no load to full load. The approach s descrbed for the case of a flyback converter but s vald also for Sepc and Cuk topologes. Expermental results of a 00 W-00 khz converter demonstrate the excellent performances obtaned accordng to the proposed desgn procedure: swtch overvoltage less than 0% of the nomnal value n any operatng condton and overall converter effcency above 8% from 50% to 00% of rated load. I. INTODUCTION swtchng of the man swtch, soft turn off of the freewheelng dode and elmnaton of hgh frequency parastc oscllatons. revous works on ths topc have demonstrated that soft swtchng s feasble for both dscontnuous [] and contnuous [- ] conducton mode. The purpose of ths work s twofold: frst, to derve desgn crtera of a flyback converter wth actve clamp soft swtched n the whole load range; second, to show that the results obtaned for the flyback converter can be drectly extended also to Sepc and Cuk topologes. The theoretcal forecasts are expermentally tested on a 00 W flyback converter swtchng at 00 khz, whch n fact demonstrates hgh effcency, small voltage stresses and no-load to full-load regulaton under soft-swtched condtons. When electrc nsulaton s a prme concern n dc-dc converson, flyback, Sepc and Cuk topologes are good canddates for ther relatve smplcty as compared to other solutons. The man problem of these converters s represented by the transformer leakage nductance, whch may cause severe voltage stress on the man devces and contrbutes sgnfcantly to conducted and radated EI. assve clamps, lke the usual -C-D snubber crcut, help to lmt the swtch overvoltage at the expense of hgher losses, whle dampng of the hgh frequency parastc oscllatons calls for addtonal -C snubbers, further decreasng the overall effcency. Actve clamps, consstng of an auxlary swtch n seres to a clamp capactor, provde a vable soluton to reduce the voltage stress wthout ncreasng apprecably the converter losses. oreover, the auxlary swtch of the actve clamp allows a soft commutaton of the man devces [-]. For ths purpose, the energy stored n the transformer s exploted to dscharge the swtch parastc capactance before turnng on, thus achevng zero-voltage Fg. - Flyback converter wth actve clamp II. ANALYSIS OF FLYBACK CONVETE WITH ACTIVE CLA - A EVIEW In ths secton, the behavor of flyback converter wth actve clamp s revewed both for Contnuous (CC) and Dscontnuous (DC) Conducton odes, whle n the next secton t wll be shown that the same analyss s also vald for Sepc and Cuk converters. Fg. shows the basc scheme of a flyback converter wth actve clamp. Inductance L ncludes the transformer leakage nductance

2 whle C accounts for the swtch output capactances. In the followng analyss, deal swtchng components are assumed. Fg. - an converter waveforms n CC operaton.a. Contnuous Conducton ode (CC) As t can be seen n Fg., whch shows the man converter waveforms n CC, each swtchng perod s subdvded nto sx ntervals, each of them correspondent to a dfferent topology (see Fg.). In order to smplfy the analyss, the relatve tme of each nterval s set to zero at the begnnng of the nterval. ) Interval t 0 -t (Fg.a): At nstant t 0 the freewheelng dode D stops conducton and swtch S s on whle swtch S s off. The currents n leakage nductance L and magnetzng nductance L are equal and ncrease lnearly wth a slope dependent on the nput voltage: V () t ( t0) + L ( ) t () +β where β L. L ) Interval t -t (Fg.b): S s turned off at nstant t and C s then charged almost lnearly by the magnetzng nductance current: ( t) vc p () t t () At nstant t, ths voltage equals V +V C 0 and dode D starts conductng. a) b) c) d) e) f) Fg. - Subtopologes correspondng to dfferent swtch states ) Interval t -t (Fg.c): After conducton of D, nductors L and L resonate wth capactors C and C untl the transformer secondary voltage becomes greater than the output voltage and the freewheelng dode starts conductng (nstant t ). esonant current and voltage are gven by the followng equatons: () t () t A sn( ωt +ϕ) (.a) v C () t AZ cos( ωt+ϕ) where v C 0 A ( ) t + Z Z ( t) tg( ϕ) vc0 (.b) ω (.c) Z ( C + ) L( +β) L ( +β) (.d) C + C and V C 0 s the ntal value of the voltage across C. Ths nterval ends when vc ( t ) Vop ( +β) () where V op V o /n s the output voltage reported to the prmary sde. ) Interval t -t (Fg.d): Durng ths nterval the magnetzng current decreases lnearly, transferrng energy to the output, whle

3 L resonates wth C. Thus from the analyss of Fg.d we can wrte: Vop () t ( t ) t (5) L v A tg ω () t A sn( ωt +ϕ ) () t V A Z cos( ω t +ϕ ) C ( ϕ ) op Z V op Vopβ + Z β ( C + ) L, (6.a) (6.b) (6.c) L Z C + (6.d) Note that the auxlary swtch S s turned on n lossless manner before the clamp capactor current reverses. B. Dscontnuous Conducton ode (DC) Fg. reports the man waveforms of the same converter taken at 5% of rated power. The only dfference n the operaton sequence s that nterval t -t s termnated by the turn off of the freewheelng dode D whle S s stll on. After that, L and L resonate wth C untl S s turned off (nstant t 5 ). Then, L and L together resonate wth C, brngng ts voltage to zero (nstant t 6 ) and ntatng another swtchng cycle. 5) Interval t -t 5 (Fg.e): At nstant t S s turned off and L resonates wth C brngng ts voltage to zero (assumng that t has enough energy) and forcng the conducton of D (nstant t 5 ). Current and voltage behavor s descrbed by the equatons: () t A sn( ωt +ϕ ) (7.a) v C () t V A Z cos( ωt +ϕ) A tg v ( ϕ ) ( t ) v ( V + V ) ( t ) v C + V 0 V v + Z Z op (7.b) ω L (7.c) L Z (7.d) At the same tme the magnetzng current contnues to decrease lnearly followng the relaton (5) gven n the prevous nterval. 6) Interval t 5 -t 6 (Fg.f): After conducton of dode D, the current n L ncreases lnearly wth a slope proportonal to V +V op : V () t ( t5 ) + t (8) L Note that S must be turned on when s stll negatve n order to obtan a zero voltage turn on. At t 6 current becomes equal to the magnetzng current (whch was stll lnearly decreasng), and the freewheelng dode D stops conducton, ntatng another swtchng cycle. Fg. - an converter waveforms n DC operaton III. EXTENSION TO ISOLATED CUK AND SEIC TOOLOGIES The analyss done for the flyback converter can be easly extended also to Sepc and Cuk topologes. A. Sepc Converter Consder the Sepc converter wth actve clamp shown n Fg.5a. As for the flyback converter, L represents the transformer leakage nductance and C the man swtch output capactance. Assumng that energy transfer capactor C has a neglgble voltage rpple, t can be substtuted by a voltage generator V C havng the same value of the nput voltage (whch s the average voltage across C n steady state). ovng t across node A and rearrangng we obtan the scheme drawn n Fg.5b. If the approxmaton shown n Fg. 5c holds.e. L, L >> L, the scheme of Fg.5b concdes wth that of Fg..

4 a) a) b) b) c) Fg.5 - a) Sepc converter wth actve clamp; b) the same converter consderng C as a voltage generator; c) approxmaton whch holds f L, L >> L A. Cuk Converter Let's consder now the Cuk converter wth actve clamp shown n Fg.6a n whch the output flter capactor and the load are substtuted by a voltage generator V o. Assumng that energy transfer capactors C and C have a neglgble voltage rpple, they can be substtuted by voltage generators V C and V C havng the same value of the nput and output voltages respectvely (whch are the average voltages across C and C n steady state). ovng V C across node A and V C across node B and rearrangng we obtan the scheme drawn n Fg.6b. If the approxmaton shown n Fg.6c holds.e. L, L, L /n >> L, the scheme of Fg. 6b concdes wth that of Fg.. It s worthy to note that also for the Cuk converter, the freewheelng dode average current s equal to the load current because the average current n C s zero n steady state. IV. SILIFIED CONVETE ANALYSIS As we can see from the waveforms of Fgs. and, the behavor of the flyback converter wth actve clamp s qute dfferent respect to ts hard-swtched counterpart. However, usng sutable approxmatons, t s possble to derve useful relatons whch can greatly smplfy the desgn procedure. c) Fg.6 - a) Cuk converter wth actve clamp; b) the same converter consderng C and C as voltage generators; c) approxmaton whch holds f L, L, L /n >> L Frst of all, as far as the converson rato s concerned, we can observe that the voltage across the magnetzng nductance L s equal to V /(+β) durng the swtch on-tme, whle durng the swtch off-tme t changes from V op (nterval t -t ) to v C /(+β) durng nterval t -t (and also t -t 5 n DC). Snce v C value n these ntervals s close to V op and consderng that the duraton of ths nterval s small compared to that of nterval t -t, we have from the voltage balance on L : V TS Vop ( ) TS + β δ δ V op δ V δ ( + β ) (9) whch s almost the same of the usual flyback converter. Note that the same expresson holds for both CC and DC operatng modes. The average current I n the magnetzng nductance, assumng unty effcency, s gven by: I I + ni o ni o ( + ) (0) whle ts current rpple ampltude s: V δ V op () LfS ( +β) LfS + ( +β)

5 where f S /T S s the swtchng frequency. From (0) and () the peak current n the magnetzng nductance results: ( ) [ ( )] î t I + ni o + + k+ +β () where LfS LfSn k op o () s the usual admensonal parameter used n the flyback analyss. In order to derve the value of load current at whch the operatng mode changes between CC and DC we must ntroduce some approxmatons. In partcular, f n nterval t -t we consder β 0 (whch means L << L ) and f we consder (t ) (t ), then from (6) current and voltage v C smplfy to: () t ( t) cos( ωt) () v C () t Vop + Z ( t) sn( ωt) Thus, ( t) ( t) cos( ωt) ( t) cos() ε (5.a) where ε ω T and T t t ( δ ) T S. (5.b) The dscontnuous mode of operaton s reached when at nstant t resonant nductor current and magnetzng current are equal. Thus: ( t) I (6) whch gves the value of parameter Kcrt at the boundary between CC and DC: () kcrt cos ε + cos() ε ( + ) (7) Ths means that the converter enters n DC at a fracton α of the nomnal output power, gven by: kcrt α op LfS (8) V. ZEO VOLTAGE SWITCHING CONDITIONS The analyss reported n secton III shows that n CC operaton only the energy stored n the leakage nductance at nstant t plays a role n dschargng the mosfet parastc capactance C, whle n DC operaton also the magnetzng nductance L s nvolved n ths process (nstant t 5 ). Thus, the condton to obtan zero voltage commutaton depends on the operatng mode. A. ZVS Condton n CC From the prevous analyss, lookng at the nterval t -t 5, we can see that the voltage v reaches zero f the followng nequalty holds: AZ V (9) Usng the same approxmaton for whch () was derved, and assumng v C0 V op, (9) can be wrtten as: ( ) () Z t cos ε V (0) whch, rearranged, gves the followng constrant on L : L C LfS + + ( + ) k( ) () cos ε () The mnmum value of L s obtaned for ε π. Note that f nductance L s desgned so as to meet the above nequalty for k 0, then the ZVS condton should be mantaned n the entre load range. B. ZVS Condton n DC In order to derve the ZVS condton for ths operatng mode, the nterval t 5 -t 6 of Fg. must be analyzed. The subcrcut correspondng to ths nterval s equal to that of Fg.b. From ths latter, the behavor of nductor currents and swtch voltage s: () t () t A sn( ωt +ϕ) (.a) v C () t V A Z cos( ωt+ϕ) v C 0 A ( ) t 5 + Z (.b) Z ( t5) tg( ϕ) vc0 ω (.c) C L L( +β) ( +β) Z (.d) In order for v to reach zero the followng condton must be satsfed: A Z C V v 0 V Z () 5 Consderng that (t 5 ) I - I /, consderng β 0 and usng the approxmaton v C0 V op, the above constrant yelds; L C ( ) k( ) LfS + + VI. DESIGN GUIDELINES () From the above analyss we are now able to derve a sutable desgn procedure whch allows zero voltage commutaton n all operatng condtons. A. agnetzng Inductance The choce of the magnetzng nductance, besdes the ZVS condton, nfluences both current and voltage stresses on the man swtch. In fact, the swtch current stress s equal to the peak nductor current reported n () whle the swtch voltage stress also depends on the peak magnetzng current due to the resonance between C

6 and L durng nterval t -t. In fact, from the second of () t results: v V + v V + V + Z (5) S C, AX op Both Z and depend on the magnetzng nductance value (Z ndrectly through ()), but ther product decreases for lower nductance values. Once the desred current rpple r on L s chosen, the nductance s calculated by: op L (6) f S( + ) r where r I. (7) We must remember that a low current rpple mples a hgh resonant nductor value n order to mantan the soft swtchng condton. Note that (6) s the same as eq. (6) n ref. []. B. esonant Inductance L The value of nductance L s chosen so as to guarantee the zero voltage commutaton n all operatng condton. Thus, the followng procedure should be adopted: - a sutable value of angle ε defned by (5.b) s chosen; - the value of crtcal parameter k crt s found from (7); - L value s calculated from () for k k crt whch represents the worst condton; - the ZVS condton n DC must be verfed from () for k k crt. As far as the choce of angle ε s concerned, we can see from () that a value dfferent from π causes an ncreases of resonant nductor value needed to mantan the soft swtchng condton because t reduces the current, and thus the energy, avalable at nstant t (see Fg. ). Thus t s convenent to set ε π n the worst condton,.e. at maxmum nput voltage for whch the magnetzng current s mnmum. As suggested n [], the value of L can be chosen also to lmt the rate of change of freewheelng dode current durng nterval t 5 - t 6 (see Fg.). C. esonant Capactor C The value of resonant capactor C s determned by the resonant perod n the nterval t -t, thus from the value of angle ε chosen n the prevous subsecton. From (6.c), (5.b) and (9) and usng the approxmatons β 0 and C << C we can wrte: C L[ ε fs( + ) ] (8) D. an Swtch S Swtch S s chosen on the bass of ts current and voltage stresses. These latter can be found by usng () and (5) respectvely. E. Auxlary Swtch S Also swtch S s chosen on the bass of ts maxmum ratngs. As far as ts voltage stress s concerned, t s easly verfed that t s gven by the followng equaton: vs V + VC 0 (9) whle ts current stress s the same of the man swtch because the current flowng n t concdes practcally wth resonant current durng nterval t -t. F. Swtch Drve Sgnals In order to obtan the correct converter behavor, sutable swtch drve sgnal must be generated; n partcular, dead tmes between turn off of S and turn on of S, and vce versa, are needed n order to provde a complete charge and dscharge of parastc capactance C. From (7), the dead tme t d between turn off of S and turn on of S n CC can be approxmated by π π td L ω (0) whle n DC L n (0) should be replaced by L +L. In practce, n DC the dscharge of C occurs n an nterval of tme much shorter than one half of resonant perod, thus the sutable delay tme lays between the two values. The dead tme t d between turn off of S and turn on of S can be derved consderng nterval t -t and () n the worst case whch occurs when the peak magnetzng nductor current s mnmum,.e., wth gven by (): t d ( + ) V Vop () G. Capactor C Ths capactance usually represents the sum of the parastc output capactances of S and S and of the freewheelng dode (reported to the prmary sde of the transformer). In some applcatons, t could be convenent to ncrease ths capactance by addng an external capactor n order to lmt the maxmum voltage rate of change across the actve devces. Ths provson reduces both conducted and radated dsturbances and can be necessary when IGBT are used nstead of mosfets n order to reduce ther turn off losses due the tal current phenomenon. When an external capactor s added, t s nterestng to see the varaton of the normalzed swtch voltage stress vˆ S vˆ S ( V ) as a functon of the maxmum dv/dt N allowed as shown n Fg.7. whch reports ths behavor for three dfferent values of magnetzng current rpple r. As we can see, the voltage stress ncreases rapdly as the maxmum dv/dt s reduced. Ths s due to the ncrease of characterstc mpedance Z caused by the contemporary ncrease of L, needed to mantan the soft swtchng condton, and decrease of C.

7 .5 VSN Table I - Converter specfcatons and parameters V 00V V o 8V f s 00kHz o Ω.5 r 0.6 r 0. r 0.75 ε 7π/6 L 5µH L.8µH C o 00µF C 00nF C 0.6nF n r [V/ns] dv/dt Fg.7 - Normalzed swtch voltage stress versus maxmum dv/dt for three dfferent values of magnetzng current rpple It s worthy to note that the behavor reported n Fg.7 s only ndcatve of the phenomenon because, as C ncreases, the dead tmes t d and t d ncrease becomng non neglgble respect to the swtchng perod and thus affectng the valdty of the above relatons. VII. EXEIENTAL ESULTS A prototype, based on flyback topology, was bult and tested. Specfcatons and parameter values are lsted n Table I. The man components used are: S, S : IF 60, D: U 50 L : Core EA, N N turns ltz wre L : Core /, N turns ltz wre The control strategy s the peak current control mplemented wth the UC8A ntegrated controller. The two drve sgnals are generated by a dual power mosfet drver (TC8) commanded by the output of the UC8A through two delay networks. Fgs.8a) and b) show resonant nductor current L, man swtch dran-to-source voltage v DS and gate-to-source voltage v GS waveforms at 00% and about 0% of rated power respectvely. As we can see, soft-swtchng condton s mantaned also at the boundary between dscontnuous and contnuous conducton mode, whch s the most crtcal pont. In fact, at lower output currents, the soft-swtchng condton s ensured by the energy stored also n the transformer magnetzng nductance. Observe that the swtch voltage waveform s very smooth wth just a small rngng at the begnnng of the off nterval due to layout-nduced parastc nductance. Thus, the electromagnetc nose generated s reduced. The voltage and current stresses n the man swtch are 7V and 5.A respectvely. The behavor of the overall effcency ncludng control stage as a functon of the load current s reported n Fg.9. As we can see, t remans above 8% for output currents greater than 50% of the nomnal value. Fg.8 - esonant nductor current L, man swtch dran-to-source voltage V DS [50V/dv] and man swtch gate-to-source voltage V GS [5V/dv]; a) L [5A/dv], I o A; b) L [A/dv], I o 0.8A a) b)

8 EFFICIENCY the analyss done s also applcable to other nsulated DC/DC topologes lke Cuk and Sepc. The power stage s very smple and relable and the control does not need partcular provsons respect to standard W controller. Expermental results of a 00 W-00 khz converter confrmed the theoretcal forecasts showng good performances Load current I o Fg.9 - Overall converter effcency vs. load current CONCLUSIONS A flyback converter wth actve voltage clamp was analyzed revewng ts behavor for both CC and DC operaton modes. Sutable desgn crtera are gven whch allow soft commutaton of all devces from no load to full load. oreover, It s shown that EFEENCES [] K. Yoshda, T. Ish, N. Nagagata, "Zero Voltage Swtchng Approach for Flyback Converter," INTELEC Conf. roc., 99, pp.-9. []. Watson, F. C. Lee, G. C. Hua, "Utlzaton of an Actve-Clamp Crcut to Acheve Soft Swtchng n Flyback Converters," IEEE ower Electroncs Specalsts' Conf. ec., 99, pp []. Watson, G. C. Hua, F. C. Lee, "Characterzaton of an Actve Clamp Flyback Topology for ower Factor Correcton Applcatons," IEEE Appled ower Electroncs Conf. roc., 99, pp. -8.

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