Maximum Circuit Activity Estimation Using Pseudo-Boolean Satisfiability

Transcription

1 Mximum Ciruit Ativity Estimtion Using Pseuo-Boolen Stisfiility Hrth Mngssrin 1 Anres Veneri,2 Sen Sfrpour 1 Fri. jm 1 Mgy S. Air 3 Astrt Disproportionte instntneous power issiption my result in unexpete power supply voltge flututions n permnent iruit mge. Therefore, estimtion of mximum instntneous power is ruil for the reliility ssessment of VLSI hips. Ciruit tivity n onsequently power issiption in CMOS iruits re highly input-pttern epenent, mking the prolem of mximum power estimtion omputtionlly hr. This work proposes novel pseuo-oolen stisfiility se metho tht reports the ext input sequene mximizing iruit tivity in omintionl n sequentil iruits. The metho is lso extene to tke multiple gte trnsitions into ount y integrting ely informtion into the pseuo-oolen optimiztion prolem. An extensive suite of experiments on ISCAS85 n ISCAS89 iruits onfirms the effiieny n roustness of the pproh ompre to simultion se tehniques n enourges further reserh for low-power solutions using oolen stisfiility. I. ITRODUCTIO In the nnometer VLSI er, reliility nlysis of igitl VLSI iruits is tking signifint shre of the esign proess. In view of the roughly ouling omponent filure rte for every 10 o C inrese in operting temperture [1], overheting use y exessive power issiption n egre performne n reue hip lifetime [2]. Lrge instntneous power issiption n lso le to temporry voltge rop on power supply lines, whih n result in soft errors [3]. Hene, urte estimtion of mximum pek power is vitl to the reliility nlysis of iruit. Dynmi power in CMOS iruits is nontrivil funtion of lok frequeny, tehnology prmeters, gte pitnes n elys, iruit topology n primry input vetors. With everything else hel onstnt, the pir of onseutive primry inputs tht mximizes the swithe pitne in the iruit lso mximizes ynmi pek power. Fining this pir mong n exponentil numer of possiilities, or equivlently fining the ssoite iruit tivity, is omintoril optimiztion prolem whose orresponing eision prolem is P-omplete. Reent vnes [13, 14, 15] n ongoing reserh in oolen stisfiility (SAT) hve me it n ttrtive tool for solving theoretilly intrtle prolems in VLSI CAD, in res suh s testing [16], verifition [20], eugging [21] n physil esign [22]. Furthermore, ny improvement to the stte-of-the-rt in SAT solving immeitely enefits ll SAT se solutions. This work proposes pseuo-oolen stisfiility () se metho for generting tight lower ouns on mximum iruit tivity per lok yle. Given enough time, the metho is gurntee to fin the ext input sequene tht mximizes the given iruit tivity moel. The esrie frmework is pplile to oth omintionl n sequentil iruits. It is lso extene to tke glithes into ount y integrting ely into the pseuo-oolen (PB) optimiztion prolem. The ompetitive experimentl results in this pper onfirm the roustness of SAT in low-power nlysis tehniques. Couple with the wie-rnging moeling flexiility offere y SAT, this enourges further reserh in the use of SAT s pltform to solve other low-power prolems. The rest of the pper is orgnize s follows. Setion 2 presents previous work. Setion 3 ontins kgroun informtion on SAT n theory. Setion 4 riefly isusses ssumptions n 1 University of Toronto, ECE Deprtment, Toronto, O M5S 3G4 ({hrth, veneris, sen, njm}@eeg.toronto.eu) 2 University of Toronto, CS Deprtment, Toronto, O M5S 3G4 3 Freesle Semionutor, In., Austin, TX ({M.Air}@freesle.om) preliminries. Setion 5 gives the PB formultions for the mximum tivity prolem in omintionl n sequentil iruits. Setion 6 extens the metho to inorporte unit gte ely. Setion 7 presents optimiztions n heuristis. Setion 8 ontins experiments n Setion 9 onlues the pper. II. PREVIOUS WORK Severl tehniques hve een propose to estimte the mximum pek power issiption of CMOS iruit [6-12]. An nlogous prolem is tht of fining the mximum instntneous urrent [3-5]. In [3, 4], loose upper oun on the mximum instntneous urrent is generte in liner time y propgting the signl unertinty through the iruit. The upper oun is susequently tightene using rnh-n-oun lgorithm y onsiering sptil signl orreltions t gte outputs. Extening the hrteriztion of signl orreltions from [3, 4] n exploiting mutully exlusive gte swithing, the uthors in [5] mnge to generte tighter upper ouns. However, for lrger iruits, the gp etween the generte upper ouns n lower ouns otine using rnom simultions n remin onsierle. In [6], the uthors present n Automti Test Pttern Genertion (ATPG) se greey lgorithm tht strives to mximize the fnoutweighte gte flips of iruit. In [7], the metho is extene to over sequentil iruits s well s glithes. A ontinuous optimiztion metho is put forwr in [8], whih trets the oolen input spe s rel-vlue vetor spe n mkes use of grient se heuristi to estimte the mximum power. A geneti serh lgorithm propose in [9, 10] genertes more roust lower ouns. In [11], the uthors esrie sttistil metho tht rws on the theory of Asymptoti Extreme Orer Sttistis. The proility istriution of the mximum power in rnom smple of fixe size is ompute. The lrgest power vlue with non-zero proility is estimte to etermine the mximum pek power. The pproh tht is losest to this work is given in [12], where the power issiption of iruit is moele s multi-output Boolen funtion in terms of the primry inputs. A isjoint over enumertion s well s rnh-n-oun lgorithm re use to mximize the numer of weighte gte trnsitions. An pproximtion strtegy for upper ouning mximum power is lso propose. However, the esrie tehniques n eome omputtionlly expensive. Furthermore, sequentil iruits re not overe. III. BACKGROUD A. Boolen Stisfiility A propositionl logi formul Φ is logi funtion over set of oolen vriles linke y oolen onnetives suh s (negtion), (onjuntion), + (isjuntion), (implition) n (equivlene). Φ is si to e stisfile or SAT if it hs stisfying ssignment: truth ssignment Π of its vriles tht uses it to evlute to true, enote s Π = Φ. Otherwise, Φ is si to e unstisfile or USAT. The prolem of oolen stisfiility onsists of etermining whether Φ is SAT. In moern SAT solvers, the logi formul Φ is given in Conjuntive orml Form (CF) s onjuntion of luses where eh luse is isjuntion of literls. A literl is n instne of vrile or its negtion. In orer for formul to e SAT, t lest one literl in eh luse must evlute to true. For exmple, the CF formul given in (1) is SAT euse { =1,=0,=1} =Φ. Φ=( + ) ( + + ) () (1) A logi iruit n e onverte to CF formul in liner time [16], suh tht there is one-to-one orresponene etween the vriles of the generte CF formul n the gte outputs of the orresponing iruit, n suh tht stisfying vrile ssignments /DATE EDAA

2 in the CF formul orrespon to vli gte output vlues in the iruit. Hene, iruit n its orresponing SAT formultion re often referre to interhngely in this pper. Moern SAT solvers [13, 14, 15] re le to solve lrge SAT prolems with millions of luses n hunres of thousns of vriles y utilizing vne rnh-n-oun proeures suh s intelligent eision mking, onflit se lerning, n nonhronologil ktrking. During the solving proeure, SAT solvers strive to prune prts of the non-solution serh-spe y nlyzing their mistkes n lerning from them y ppening onflit luses to the originl CF formul. For exmple, onsier the CF formul in (1) n suppose tht the solver hs me the unstisfile vrile ssignments { =0, =1, =1}. A moern SAT solver might etermine tht the rel use of the onflit is the ssignment { =0}, n hene the onflit luse () to Φ in orer to fore { =1}. B. Pseuo-Boolen Stisfiility A pseuo-oolen onstrint is generliztion of CF luse. A PB onstrint over oolen vriles {x i} n 1 is n inequlity of the form: n 1 il i n (2) where { i} n Z n {l i} n 1 re the literls orresponing to {x i} n 1. I.e., li = xi or li = xi. ote tht CF luse is PB onstrint where i =1for 0 i n. A oeffiient i is si to e tivte if its orresponing literl l i is ssigne to true. A PB onstrint is si to e stisfie if (2) hols. A PB formul Ψ is onjuntion of PB onstrints. The prolem of pseuo-oolen stisfiility questions the existene of truth ssignment to {x i} n 1 stisfying ll the PB onstrints in Ψ. The pseuo-oolen optimiztion prolem strives to fin stisfile ssignment to Ψ tht lso minimizes given ojetive funtion: n 1 F(x) = il i (3) where x =< x 0,...,x n 1 > n { i} n 1 Z. For exmple, given Ψ n F s shown in (4) elow, oth { = 1, = 0, = 1} n { = 1, = 0, = 0} re stisfying ssignments. However, only the former minimizes F. Ψ = (2 3 1) ( + + 1) F = +2 (4) There re two types of PB solvers: [18, 19] support PB onstrints ntively, while [17] trnsltes the prolem into SAT prolem n runs stte-of-the-rt SAT solver [15] on the proue SAT instne. The ltter pproh is prtiulrly suite to prolems tht re lmost pure SAT [17] (i.e., onsisting of mostly SAT luses n reltively few PB onstrints), whih is the se in this work. Furthermore, ny vnements in SAT solving iretly enhnes suh strtegy. Optiml trnsltion of onstrints into set of CF luses is urrently n re of tive reserh. The ojetive funtion is minimize s follows. The solver in [17] first runs the SAT solver without onsiering F(x) in orer to get n initil SAT solution x 0,withsyF(x 0)=k, where k is the orresponing initil vlue of the ojetive funtion. The new PB onstrint F(x) k 1 is susequently e to the originl prolem. The SAT solver runs on the upte CF formul n this proess is repete until the prolem eomes USAT. The solution orresponing to the lst k efore the prolem eomes USAT is the optiml solution minimizing the ojetive funtion. IV. ASSUMPTIOS AD PRELIMIARIES In this work, lth-ontrolle synhronous igitl iruits re onsiere. Primry inputs (PIs) n flip-flop (FF) outputs n only swith t the eginning of the lok yle. This ssumption is onsiere vli in relte previous work s well. The verge ynmi power issiption of CMOS iruit is proportionl to the totl swithe pitne: m P C it (g i) (5) where m is the numer of iruit gtes, C i is the pitive lo on gte g i n T (g i) is the output trnsition ount of g i per unit time. Uner the ssumption tht the lok perio is suffiiently smll, it is soun to interpret the verge ynmi power issiption over lok yle s the instntneous ynmi power uring tht lok yle [6-12]. Thus, letting T (g i) in Eq. (5) orrespon to the trnsition ount of g i uring lok yle, P n e viewe s the instntneous ynmi power. In the reminer of this work, instntneous ynmi power is simply referre to s power. The following nottion is use throughout this pper. G enotes the set of gtes ( G = m), I the set of PIs ( I = n) ns the set of FFs ( S = p). FAOUTS(g i) (FAIS(g i)) enotes the set of fnouts (fnins) of g i. Finlly, in ll the exmples n experiments, it is ssume tht C i = FAOUTS(g i) for internl gtes n C i =1 for primry output gtes. V. ZERO-DELAY MAXIMUM ACTIVITY COMPUTATIO USIG A. Mximum Ativity for Comintionl Ciruits Uner zero-ely moel, T (g i) eomes oolen vrile euse g i n flip t most one per lok yle. Aoringly, Eq. (5) n e rewritten s: m ( P C i gi(i) g i(i ) ) (6) where I n I re onseutively pplie PI vetors n g i(x) enotes the stey-stte vlue of g i given PI vetor X. The prolem then trnsltes into fining the pir of onseutive PI vetors <I,I > tht mximizes the right-hn-sie of Eq. (6) n therefore P : m <I,I ( >= rgmx C i gi(i) g i(i ) ) (7) <I,I > {0,1} 2n Ĉ o 1 o 2 i i 1 2 () Zero-ely gte () Zero-ely formultion swithing Fig. 1. Comintionl iruit The solving proeure of Eq. (7) relies on the onstrution of new iruit tht will e use y the solver. The generl proeure is illustrte with the use of n exmple. Consier the prolem of fining the pir of PI vetors mximizing power for the iruit shown in fig. 1(). First, the originl iruit n its PIs re uplite s shown in fig. 1(). ext, every pir of orresponing gtes, g i in C n g i in C, is fe to n XOR gte, xor i, in the new iruit. Sine g i n g i perform the sme logi funtion, lerly xor i = g i(i) g i(i ) eome if n only if the output of gte g i flips uner onseutive input vetors I n I. The weighte sum of these XOR outputs, m Cixori, is equl to the right hn-sie-sie of Eq. (6), whih shoul e mximize. Given tht the iruit itself n e trnsforme to SAT CF whih is set of PB onstrints, the following PB optimiztion prolem strives to mximize the righthn-sie of Eq. (6) n therefore to solve Eq. (7): Ψ = CF() m F = C ixor i (8) C C xor 1 C1 =3 C2 =1 C3 =1 Remrk tht only the trget funtion F in (8) is not in pure SAT formt. The PB formul Ψ is simply the CF of, whih mrkely suits the hoie of the solver [17].

3 Exmple 1 Consier the originl iruit Ĉ n the orresponing onstrution shown in Fig. 1. An optiml solution to the ssoite PB optimiztion prolem given y (8) is <I,I >=<< 0, 0, 0 >,< 1, 1, 1 >>, whih mounts to totl swithe pitne of 6 units y flipping ll four gte outputs s shown in Fig. 1(). B. Mximum Ativity for Sequentil Ciruits Let δ : {0, 1} p {0, 1} n {0, 1} p enote the stte trnsition funtion of given sequentil iruit. Also, let g i(s, X) enote the stey-stte vlue of g i given initil stte S n PI vetor X. Estimting the pek power per yle for sequentil iruits is equivlent to fining triplet <S,I,I > onsisting of n initil stte S n onseutive PI vetors, I n I, tht mximizes the right-hn-sie of Eq. (9): m ( ) ( P C i (g i S, I gi δ(s, I),I )) (9) 0 Ĉ i2 i i 1 o i () Zero-ely swithing Fig. 2. C C xor 1 () Zero-ely formultion Sequentil iruit C1 =2 C2 =1 C3 =1 The generl solving proeure for this prolem is illustrte with the use of n exmple. Consier the sequentil iruit Ĉ shown in Fig. 2(). First, FF inputs (outputs) re trnsforme into iruit pseuo-outputs (pseuo-inputs). This full-snne iruit C is susequently uplite similrly to the omintionl se. Moreover, the pseuo-outputs of the first time-frme C re onnete to the pseuo-inputs of the seon time-frme C sshowninfig.2(). This itertive logi rry (ILA) expnsion of the originl sequentil iruit is referre to s iruit unrolling. In the new iruit, fter feeing orresponing gtes in C n C to XORs, similrly to the omintionl se, it is esily seen tht ( ) ( xor i = g i I,S gi I,δ(S, I) ). The resulting PB optimiztion prolem hs the sme form s (8). Exmple 2 Consier the iruit Ĉ n the orresponing shown in Fig. 2. ot ounting flips t FF outputs (), n optiml solution to the PB optimiztion prolem given y (8) is <S,I,I >=<< 0 >, < 0, 0, 0 >, < 1, 1, 1 >>, whih mounts to totl swithe pitne of 5 units s shown in Fig. 2(). However, this solution might e suoptiml if gte elys re onsiere. Setion VI esries how ely is integrte into the PB optimiztion prolem. The given prolem formultion llows for ny initil stte to e returne in the optiml solution. Rehility nlysis [20] n e susequently performe to verify the rehility of the solution. SAT solvers offer trivil wy to isr unrehle solutions y ing onflit luses. Similrly, omintions of invli PIs n e eliminte using onflit luses. The illustrte frmework n lso e extene to generte pek n-yle power (n 1), whih is the mximum verge power over ontiguous sequene of n lok yles, y unrolling the iruit n +1 times. Eh pir of orresponing gtes in jent yles woul then efetonxorgte. VI. MODELIG DELAY Different input signl rrivl times might use gte to flip severl times uring one lok yle. In ft, glithes ue to gte propgtion elys n often ominte the mximum instntneous power [7,9]. On the other hn, empiril results in [9] show tht unit gte ely moel yiels resonly urte power estimtes. This setion isusses the integrtion of unit gte ely into the prolem formultion. It is lso expline how this n e extene to ritrry ely using liner preproessing step. First, forml reursive efinitions of mx-level L(g) n min-level l(g) re given for g G I S. L(g) n l(g) essentilly enote the lengths of, respetively, the longest n shortest simple pths to g, in terms of numer of gtes, strting from PI or FF output. Definition 1 { mx L(gj)+1 if g G {g L(g) = j FAIS(g)} 0 if g I S Definition 2 { min l(gj)+1 if g G {g l(g) = j FAIS(g)} 0 if g I S Let L = mx g GL(g) esignte the lrgest mx-level in the iruit. Uner unit-ely moel, time t is isrete vrile, meningful in {0,...,L}. Moreover, the signl rrivl time t the output of gte g following ertin pth from PI or FF output is equl to the length of the trvele pth to g. Let G t esrie the set of ll gtes whose mx-levels n minlevels oun t inlusively. Definition 3 G t = { g i G l(g i) t L(g i) } Lemm 1 If every gte hs unit ely, ny gte tht oul potentilly flip t time-step t elongs to G t. Proof: The ontrpositive is prove. If gte g oes not elong to G t, then either l(g) >tor L(g) <t. In the first se, the shortest signl rrivl time from n input or pseuo-input to fnin of g tkes t lest t time-steps. So g n only flip stritly fter time-step t. Similrly, g n only flip stritly efore time-step t. Consier iruit whose gte logi vlues hve stilize given initil stte S n PI vetor I. If PI vetor I is pplie t the strt of new lok yle (t =0),thenletg t (S, I, I ) enote the output of gte g right fter time-step t. ote tht the output vlue of g epens on oth I n I euse if t<l(g), g t (S, I, I )=g(s, I). Aoringly, the totl swithe pitne is given s follows: L ( P C i g t 1 i (S, I, I ) gi(s, t I, I ) ) (10) t=1 g i G t The outer summtion in Eq. (10) s up the totl swithe pitnes ross time-steps. The inner summtion s up the pitnes of the gtes whose outputs flip t time t. Due to Lemm 1, one nee not hek ll the gtes t time-step t, ut only the gtes in G t. The proeure to mximize the right-hn-sie of Eq. (10) relies on the onstrution of new iruit tht will e use y the solver. This is illustrte with the use of n exmple. Consier the sequentil iruit Ĉ shown in Fig. 2(). First, FF inputs (outputs) re trnsforme into iruit pseuo-outputs (pseuo-inputs). Generting the sets {G t} L t=1 for Ĉ tkes liner time using Breth First trversl strting from PIs n pseuo-inputs. For the iruit in Fig. 2(), these sets re s follows: G 1 = {,, }, G 2 = {,, }, G 3 = {, }, G 4 = {} ow, for eh time-step t, for0 t L,time-iruit C t is ssoite, ontining the following time-gtes: { g t } i g i G t if t 1 G(C t )= { } gi 0 g i G(Ĉ) if t =0, (11) s shown in Fig. 3. The new iruit (Fig. 3) ommotes ll these time-iruits {C t } L t=0. ext, the gte interonnetions in re isusse. The gtes of C 0 re interonnete ientilly to the originl full-snne iruit, given pseuo-input vetor S n PI vetor I, s shown in Fig. 3. For the remining time-iruits {C t } L t=1, there re three ses: The given time-gte s fnin ws originlly (in Ĉ) i) nother gte, ii) PI,oriii) FF output. In se i), the given time-gte must e onnete to the most reent time-gte orresponing to the originl

4 i 1 i 2 1 Fig xor C C 1 0 C 2 C 3 C xor 5 xor 6 xor 7 xor 8 xor 9 Unit-ely sequentil formultion C1 =2 C2 =1 C3 =1 C5 =1 C6 =1 C7 =1 C8 =1 C9 =1 fnin gte stritly efore the urrent time-step: o two time-gtes in the sme time-iruit n e onnete euse they n only hnge simultneously. In se ii), the given time-gte must e onnete to the orresponing new PI in I. In se iii), the given time-gte must e onnete to the pseuo-output in C 0 orresponing to the FF to whih it ws originlly onnete. Formlly, onsier gte g Ĉ, suhthtfai(g) ={f,i,s}, where f G(Ĉ),i I(Ĉ),s S(Ĉ). In the new iruit, for eh time-step t 1 where g t exists, it will e onnete to the following fnins: } FAI(g t )= {f mx{j f j G(C j ),j<t},i, FAI(s) 0 where eh fnin orrespons to one of the ifferent ses. It n e shown tht the output every time-gte gi t in is onsistent with its given efinition in Eq. (10). In ft, the outputs of the time-gtes in C 0 represent the stey-stte vlues of the originl iruit Ĉ given initil stte S n PI vetor I. This is onsistent with the given efinition of g 0 (S, I, I ) use in Eq. (10). Furthermore, the onstrution is me suh tht in eh time-iruit, from C 1 to C L, the new signls oming from the pseuo-outputs of C 0 n the new PI vetor I propgte through extly one itionl gte. Therefore, the vlue t the output of time-gte g t in C t will e equl to tht of gte g in Ĉ fter t time-steps, whih is gin onsistent with Eq. (10). The finl step is to n XOR gte for every pir of originlly ientil time-gtes tht re not seprte y nother ientil timegte etween their respetive time-iruits, s shown in Fig. 3. The weighte sum of these XOR gtes yiels: L ( j mx{j g G(C j ),j<t} C i g i (S, I, I ) gi(s, t I, I ) ) t=1 g i G t whih is in ft equivlent to Eq. (10) euse even if mx{j g j G(C j ),j < t} <t 1, time-step mx{j g j G(C j ),j < t} is y efinition the lst time-step efore t in whih gte g i oul hve flippe. Hene, g mx{j gj G(C j ),j<t} i (S, I, I )=g t 1 i (S, I, I ). Therefore, the prolem of mximizing the right-hn-sie of Eq. (10) n e formulte s PB optimiztion prolem of the sme form s (8). Fig Unit-ely gte swithing in sequentil iruit Ĉ o 1 Exmple 3 Consier the iruit Ĉ in Fig. 4 n the orresponing in Fig. 3. Using unit-ely moel n not ounting flips t FF outputs (), n optiml solution to the PB optimiztion prolem given y (8) is <S,I,I >=<< 0 >, < 1, 1, 0 >, < 0, 0, 1 >>, whih mounts to totl swithe pitne of 6 units s shown in Fig. 4. It is notle tht oth the optiml solution n the ssoite iruit tivity re ifferent thn those otine for the sme iruit with the zero-ely moel in Exmple 2. The proeure outline in this setion n e extene to n ritrry ely moel s follows. A liner time preproessing step is esrie in [7], whih genertes, for eh gte, the sequene of time instnts t whih it might flip. For eh gte g, let t i g n t f g respetively enote the first n lst time instnts t whih g might flip. A iruit-level time sequene tht inlues ll possile gte flipping time instnts n e susequently rete. In orer to pply the methoology esrie in this setion to n ritrry ely moel, for eh gte g, l(g) n L(g) shoul e respetively set to the inies of t i g n t f g in the iruit-level time sequene. VII. OPTIMIZATIOS AD HEURISTICS In this setion, optimiztion tehniques to reue the size of the PB prolem n heuristi to guie the serh re presente. i 1 i 2 Fig xor C 0 C 1 C 2 C 3 C xor 5 xor 6 C1 =2 C2 =2 C3 =2 C5 =1 C6 =1 Optimize unit-ely sequentil formultion Optimiztion 1. The efinition of the sets {G t} L t=1 in Def. 3 n e tightene. In ft, it is sometimes known in vne tht ertin gte g will never flip t time-step t even though g G t. This n hppen if l(g) t L(g), ut there exists no pth p of length extly t ( p = t) from PI or FF output to the output of g. For exmple, in the iruit of Fig. 2(), lthough l() =1n L() =4, n never flip t time-step 2. Hene, in Fig. 3, the time-gte 2 is reunnt euse its output will lwys e the sme s tht of 1. The following is tighter efinition of G t. Definition 4 G t = { g i G p : x p g i,x I S, p = t } The sets {G t} L t=1 n e generte in liner time using Breth First trversl of the originl iruit, strting from PIs n pseuoinputs n memorizing the set of newly rehe gtes t eh timestep. In Fig. 5, is optimize to use Def. 4 for {G t} L t=1. Optimiztion 2. Suppose gte g is uffer or n inverter. If the input of g flips, then the output of g flips. Therefore, for every sequene of uffers n/or inverters, it is suffiient to put only one XOR t the input of the first uffer/inverter n to the lo pitnes of the other gtes to tht XOR s originl weight. In Fig. 5, this optimiztion is use to reue the numer of XORs. For lrge iruits with signifint numers of inverters n uffers, this n signifintly reue the size of the onstrute iruit, n therefore the numer of luses in the CF of the PB optimiztion prolem.

5 Heuristi. As esrie in Susetion III-B, the solver grully tightens the upper oun on the ojetive funtion, n therefore the lower oun on mximum iruit tivity (8). This is one until either the solute mximum is foun or the solver is time-out. However, inste of strting from n tivity of 0, it is possile to first run rnom simultions for R seons, reor the generte mximum tivity M n then fore the solver to strt from n tivity of t lest α M, for some user-speifie α [0, 1], using n pproprite onflit luse. If α is lose to 1, this hs the vntge of guiing the solver into prts of the serh-spe tht might potentilly yiel higher iruit tivities, n sves it the time of fining possily mny suoptiml solutions in other prts of the serh-spe. However, this will mke the initil SAT prolem hrer. Therefore fining the first solution tht yiels iruit tivity greter thn α M my tke longer time. Moreover, the solver my hve hrer time lerning from its mistkes. VIII. EMPIRICAL RESULTS Both the zero-ely n unit-ely formultions of the propose se pproh for iruit tivity estimtion re implemente in C++ using MIISAT+ [17] s the unerlying engine. The optimiztions n the heuristi esrie in Setion VII re lso integrte. All experiments re onute on Pentium IV 2.8 GHz Linux pltform with 2 GB of memory. Our pproh () is ompre to prllel-pttern rnom simultions () with 32-it wors (32 simultneous vetor simultions). Sine it is generlly elieve tht the swithing proility of the PIs of iruit is positively orrelte to tht of internl gtes [6], the swithing proility of the PIs is set to 0.9 in. All experiment runs, oth n, re time-out fter 10, 000 seons, n the generte sequene of stritly inresing tivities long with their orresponing run-times is reore for eh. Depening on the size of the iruit, roughly 1, 000, 000 to 40, 000, 000 vetors re simulte in 10, 000 seons for. On the other hn, two sets of experiments re performe, one for α =0n one for α =0.9. Forα =0.9, rnom simultions re first run for R =5 seons to extrt the initil mximum tivity estimte M. Tle 1 shows the experimentl results for ten ISCAS85 n twenty ISCAS89 iruits. The first n seon rows respetively show the iruit nmes n the orresponing numers of gtes. The mximum iruit tivities in Tle 1 re in units of swithe pitne, where C i = FAOUTS(g i) for internl gtes n C i =1for primry output gtes. For eh experiment, the generte mximum tivity vlues re reore fter 100, 1, 000 n 10, 000 seons. For eh iruit n ely moel, tivities re ompre etween the three sets of experiments (,), (PB- SAT,α =0.9) n. The higher tivity fter eh time-perio is highlighte in ol. An empty tle ell inites tht no oun is foun up to tht time. A oun tht remins unhnge from the previous reore time is highlighte in itli. Finlly, next to n tivity vlue inites tht the solver prove tht the generte tivity is in ft the solute mximum. For instne, using unit-ely moel, in iruit s1488, (,α =0) yiels the highest tivity (1450) t100 seons, oth (,α =0)n (,α =0.9) prove the mximlity of 1450 y 1, 000 seons, wheres the mximum tivity generte y remins unhnge (1250) fter the 100 seon mrk. In mny iruits, the estimtion improvement from simultions is onsierly lrge. For instne, using unit-ely moel, in iruit s1423, (,α =0) n(,α =0.9) respetively reor 196% n 177% improvements over onstitutes speil se euse of its isproportiontely lrge numer of levels (L = 164), whih uses, n susequently the CF of the SAT prolem, to e very lrge. Proving mximlity is hr euse it requires virtul exmintion of the omplete serh-spe. For instne, using zeroely moel, in iruit 880, the solver onverges to n tivity of 482 efore the 1, 000 seon mrk, ut only lter proves its mximlity. In 53.3% of zero-ely experiments n 43.3% of unitely experiments, the solver proves mximlity. To the est of our knowlege, this is the first work to ompute the proven mximum tivities for these iruits. For omintionl iruits, our pproh yiels n verge of 13% improvement over simultions with zero-ely moel, n 18% with unit-ely moel, ompring oth methos fter 10, 000 seons. For sequentil iruits, our pproh yiels n verge of 49% improvement over simultions with zero-ely moel, n 42% with unit-ely moel, ompring oth methos fter 10, 000 seons. The greter improvements for sequentil iruits re ue to the lrger n more intrite nture of the serh-spe. Fig. 6 shows the sequenes of stritly inresing tivities generte y our methos n those generte using simultions, plotte ginst exeution time, for the ISCAS89 iruit s713, uner oth zero-ely (Fig. 6()) n unit-ely (Fig. 6()) moels. It n e note tht results, in this se n in most other iruits shown in Tle 1, ten to plteu fter while. In ft, s shown in Fig. 7, whih plots (,) (Fig. 7()) n (,.9) (Fig. 7()) results ginst those of, fter 100 n 1, 000 seons, few points re still elow the 45 o line, ut fter 10, 000 seons, in virtully ll the ses, the tivities generte y our pproh et the ones generte y simultions uring the sme mount of exeution time. Ciruit tivity Mximum tivity (PB SAT,α=0) PB SAT, α=0 prove mximum tivity PB SAT, α=0.9 prove mximum tivity Exeution time (se) () Zero-ely moel Fig. 6. After 100s After 1000s After 10000s 45 o line Mximum tivity () Ciruit tivity PB SAT, α=0 400 PB SAT, α= Exeution time (se) () Unit-ely moel Ativity vs. exeution time for s713 Mximum tivity (PB SAT,α=0.9) Mximum tivity () () (,α =0) vs. () (,α =0.9) vs. Fig. 7. tivities vs. solver tivities x 10 4 After 100s After 1000s After 10000s 45 o line IX. COCLUSIO This work proposes pseuo-oolen stisfiility se frmework, pplile to oth omintionl n sequentil iruits, for fining the input sequene tht mximizes single-yle iruit tivity. The metho n lso tke into ount multiple gte trnsitions uring lok yle. The experimentl results re promising for further reserh in low-power using SAT solvers, espeilly given the tremenous rte of vnement in SAT solvers n solvers. REFERECES [1] C. Smll, Shrinking evies put the squeeze on system pkging, ED, pp , Fe [2] F. jm, A survey of power estimtion tehniques in VLSI iruits, IEEE Trns. on VLSI, Vol. 2, o. 4, pp , De [3] H. Kriplni, F. jm n I. Hjj, Mximum urrent estimtion in CMOS iruits, IEEE DAC, pp. 2-7, [4] H. Kriplni, F. jm, P. Yng n I. Hjj, Resolving signl orreltions for estimting mximum urrents in CMOS omintionl iruits, IEEE DAC, pp. 2-7, [5] C.-T. Hsieh, J.-C. Lin n S.-C. Chng, A vetorless estimtion of mximum instntneous urrent for sequentil iruits, IEEE ICCAD, pp , ov [6] C.-Y Wng n K. Roy, Mximum power estimtion for CMOS iruits using eterministi n sttistil pprohes, IEEE Trns. on VLSI, Vol. 6, pp , 1998.

6 zero ely unit ely.9.9 Ĉ G s s s s s s zero ely unit ely α = {0, 0.9} α = {0, 0.9} Ĉ s208 s298 s344 s382 s386 s444 s526 s820 s832 s953 G s s s s s s s s s zero ely unit ely.9.9 Ĉ s713 s1238 s1423 s1488 s1494 s9234 s13207 s15850 s38417 s38584 G s s s s s s s s s s s s s s TABLE I MAXIMUM ACTIVITIES PER CYCLE OBTAIED BY (,α =0), (,α =0.9) AD, AFTER 100, 1, 000 AD 10, 000 SECODS [7] C.-Y Wng, K. Roy, Estimtion of mximum power for sequentil iruits onsiering spurious trnsitions, IEEE ICCD, pp , [8] C.-Y Wng, K. Roy, COSMOS: ontinuous optimiztion pproh for mximum power estimtion of CMOS iruits, IEEE ICCAD, pp , [9] M. S. Hsio, E. M Runik n J. H. Ptel, Effets of ely moels on pek power estimtion of VLSI sequentil iruits, IEEE ICCAD, pp , ov [10] M. S. Hsio, Pek power estimtion using geneti spot optimiztion for lrge VLSI iruits, IEEE DATE, pp , ov [11] Q. Wu, Q. Qiu n M. Perm, Estimtion of pek power issiption in VLSI iruits using the limiting istriutions of extreme orer sttistis, IEEE Trns. on CAD, Vol. 20, o. 8, pp , Aug [12] S. Devs, K. Keutzer n J. White, Estimtion of power issiption in CMOS omintionl iruits using oolen funtion mnipultion, IEEE Trns. on CAD, pp , Mr [13] J. P. Mrques-Silv n K. A. Skllh, GRASP A serh lgorithm for propositionl stisfiility, IEEE Trns. on omput., Vol. 48, o. 5, pp , My [14] M. H. Moskewiz, C. F. Mign, Y. Zho n L. Zhng, Chff: Engineering n effiient SAT solver, IEEE DAC, pp , jun [15]. Eénn.Sörensson, An extensile SAT-solver, SAT, pp , [16] T. Lrree, Test pttern genertion using oolen stisfiility, IEEE Trns. on CAD, Vol. 11, o. 1, pp. 4-15, [17]. Eén n. Sörensson, Trnslting pseuo-oolen onstrints into SAT, JSAT, Vol. 2, pp. 1-26, [18] F. Aloul, A. Rmni, I. Mrkov n K. Skllh, PBS: A ktrk serh pseuo-oolen solver, SAT, [19] H. Sheini n K. Skllh, Puelo: A hyri pseuo-oolen SAT solver, JSAT, Vol. 2, pp , [20] R. Drehsler, Avne Forml Verifition. Kluwer Aemi Pulishers, [21] A. Smith, A. Veneris, M. F. Ali, n A. Vigls, Fult ignosis n logi eugging using Boolen stisfility, IEEE Trns. on CAD, Vol. 24, o. 10, pp , [22] R. G. Woo n R. A. Rutenr, FPGA routing n routility estimtion vi Boolen stisfiility, IEEE Trns. on VLSI, Vol. 6, o. 1, pp , Jun