Boolean circuits. Figure 1. CRA versus MRA for the decomposition of all non-degenerate NPN-classes of three-variable Boolean functions

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1 The Emerald Research Register for this journal is available at The current issue and full text archive of this journal is available at Reversible modified reconstructability analysis of oolean circuits and its quantum computation Anas N. Al-Rabadi EE Department, Portland State University, Portland, Oregon, USA Martin Zwick Portland State University, Portland, Oregon, USA Keywords ybernetics, oolean functions, Logic Abstract Modified reconstructability analysis (MRA) can be realized reversibly by utilizing oolean reversible (,) logic gates that are universal in two arguments. The quantum computation of the reversible MRA circuits is also introduced. The reversible MRA transformations are given a quantum form by using the normal matrix representation of such gates. The MRA-based quantum decomposition may play an important role in the synthesis of logic structures using future technologies that consume less power and occupy less space. oolean circuits 9. Introduction Decomposition is one methodology to analyze data and identify hidden relationships between variables. One major decomposition technique for discrete static or dynamic systems is reconstructability analysis (RA), which is developed in the systems community to analyze qualitative data (Klir, 98; Krippendorff, 98). A recent short review of RA is given by Zwick (). Logic circuits that realize RA have also been shown (Zwick, 99). This paper develops a methodology for reversible and quantum implementation of RA. Owing to the anticipated failure of Moore s law around the year, quantum computing may play an important role in building more compact and less power consuming computers (Nielsen and huang, ). ecause all quantum computer gates must be reversible (ennett, 9; Fredkin and Toffoli, 98; Landauer, 9; Nielsen and huang, ), reversible computing will also be increasingly important in the future design of regular, minimal-size, and universal systems. The remainder of this paper is organized as follows: a review of our new approach to RA decomposition of logic functions is presented in Section. ackground on reversible logic and the reversible realization of RA-based oolean circuits is presented in Section. The implementation of reversible oolean RA-based circuits using quantum logic is introduced in Section. A more expanded complete discussion of quantum computing is given in Section. onclusions and future work are included in Section. Kybernetes Vol. No. /, pp. 9-9 q Emerald Group Publishing Limited 8-9X DOI.8/899

2 K,/ 9. Reconstructability analysis: conventional versus modified We are concerned here with set-theoretic RA, i.e. the analysis of crisp possibilistic systems (Klir and Wierman, 998). Enhancement of lossless set-theoretic conventional reconstructability analysis (RA) has been presented by Al-Rabadi () and Al-Rabadi et al. (). This new enhanced RA is called modified reconstructability analysis (MRA). The procedure for the lossless MRA decomposition is as follows: for every structure in the lattice of structures, decompose the oolean function for one functional value only (e.g. for value of ) into the simplest error-free decomposed structure. One thus obtains the -MRA decomposition. This model consists of a set of projections which when intersected yield the original oolean function. It has been shown by Al-Rabadi et al. () that lossless MRA yields much simpler logic circuits than the corresponding lossless RA, while retaining all information about the decomposed logic function. Figure from Al-Rabadi et al. () shows the decomposition of all non-degenerate NPN-classes (Hurst, 98) of three-variable oolean functions.. Reversible MRA A(k, k) reversible circuit is a circuit that has the same number of inputs (k), and outputs (k), and is a one-to-one mapping between a vector of inputs and a vector of outputs. Thus, the vector of input states can always be uniquely reconstructed from the vector of output states (ennett, 9; Fredkin and Toffoli, 98; Kerntopf, ; Landauer, 9). As it was proven (Landauer, 9) it is a necessary, but not sufficient condition for not dissipating power in a physical circuit that all sub-circuits must be built using reversible logical components. Many reversible gates have been proposed as building blocks for reversible computing (Kerntopf, ; Nielsen and huang, ). Figure shows some of the gates that are commonly used in the synthesis of reversible oolean logic circuits. It has been shown by Fredkin and Toffoli (98) that for a(k,k) reversible gate to be universal the gate should have at least three inputs (i.e. (, ) gate). (A gate is universal if it can implement all functions for a given number of arguments.) One should note that not all (, ) reversible gates are universal, but each universal reversible gate has at least to be a (, ) gate. oolean reversible (, ) gates which are universal in two arguments have been shown by Kerntopf (). Reversible (, ) gates, that are universal in two arguments, can be used for the construction of reversible MRA circuits. Figure shows one example of a binary (, ) reversible gate which is universal in two arguments. The following example illustrates the use of the reversible gate in Figure for the synthesis of -MRA circuit for class from Figure. The -MRA decomposed oolean circuit of class in Figure can be realized using the binary (, ) reversible circuit in Figure (b). This is done with the reversible circuit shown in Figure, where blocks and are the reversible (, ) gate

3 oolean circuits 9 Figure. RA versus MRA for the decomposition of all non-degenerate NPN-classes of three-variable oolean functions Figure. inary reversible gates: (a) (, ) Feynman gate which uses XOR; (b) (, ) Toffoli gate which uses AND and XOR; and (c) (, ) swap gate which is two permuted wires

4 K,/ 9 Figure. (a) Diagram of the reversible (, ) oolean logic circuit; (b) truth table of this gate; and (c) proof of universality of the gate in two arguments Figure. Reversible (,) oolean circuit that implements the -MRA circuit from class in Figure from Figure (b), and block is the reversible (, ) gate from Figure (b). For, c and thus, is a reversible logic AND gate. Using Figure (c), the oolean reversible circuit in Figure implements the -MRA circuit of class (in Figure ) using the following input settings: a ) Q f ðx %x Þ a ) Q f ðx %x Þ F Q ^ Q f ^ f ðx %x Þ ^ ðx %x Þ x x x þ x x x

5 For block, in Figure, one could alternatively use the gate described in Figure (b): for c output R is the logical AND; in this case, the reversible circuit is fully regular (i.e. made up of only one kind of gate). However, using the Toffoli gate (Figure (b)) for is less complex; in this case, the circuit is semi-regular (i.e. all the gates in the first level are the same, but the AND of the second level is done by a different gate). Using similar substitutions with appropriate input values according to Figure (b), the reversible circuit in Figure can realize all -MRA circuits from classes 8 and in Figure, respectively. The remaining classes from Figure can be realized using analogous techniques, by adding one more block from Figure (b) to the first level of Figure in the case of class, and removing one block from the first level of Figure in the case of classes and, respectively.. Quantum MRA Quantum computing is a recent trend in logic computation that utilizes the atomic structures to perform the logic computation processes (Nielsen and huang, ). Although the underlying principles for quantum computing are the theorems and principles of quantum mechanics (Dirac, 9), it has been shown (Nielsen and huang, ) that the physical quantum evolution processes can be reduced to algebraic matrix equations. Such matrix representation is a pure mathematical representation that can be realized physically using the corresponding quantum devices. Figure shows this matrix formalism, where each evolution matrix is unitary (Nielsen and huang, ). Each matrix representation shown in Figure is obtained through the solution of a set of linearly independent equations that correspond to the mapping of input vector to an output vector. In Figure, the matrix representation is equivalent to the input-output (I/O) mapping representation of quantum gates, as follows. If one considers each row in the input side of the I/O map in Figure as an input vector represented by the natural binary code of index with row index starting from, and similarly for the output row of the I/O map, then the matrix transforms the input vector to the corresponding output vector by transforming the code for the input to the code for the output. For example, the following matrix equation is the I/O mapping using the Feynman matrix from Figure (a): oolean circuits 9 ½Feynman matrixš½input codeš ½output codeš

6 K,/ 9 Figure. I/O mapping and matrix representations of quantum gates: (a) (, ) Feynman gate; (b) (, ) Swap gate; and (c) (, ) Toffoli gate One notes from this example that the Feynman gate, and similarly all quantum gates shown in Figure, are merely permuters, i.e. they produce output vectors which are permutations of the input vectors. Figure shows the quantum evolution matrices for blocks (also ) and in Figure, respectively. Figure. Quantum transformations for the reversible (,) circuit in Figure : (a) input mapping block (also ); and (b) output mapping block. Quantum computing Although the gates in Figure are merely permuters, not all quantum gates do simple permutations (Nielsen and huang, ). The mapping of a set of inputs into any set of outputs in Figure can be obtained in general using quantum computing. The following discussion explains the general principles of quantum computing, and we follow the standard notation that is used in quantum mechanics from Dirac (9). Definition. A binary quantum bit, or qubit, is a binary quantum system, defined over the Hilbert space H with a fixed basis {jl,j l}. Definition. In binary quantum logic system, qubit- and qubit- are defined as follows:

7 qubit ÿ jl ; qubit ÿ jl : oolean circuits 9 Figure shows the process of evolving the input binary qubits using the corresponding quantum circuits. Let us evolve the input binary " qubitjl # " ^ # ; where the tensor product ^ gives the corresponding binary natural code, using the serially interconnected quantum circuit in Figure (a), which is composed of a serial interconnection of two Feynman gates (Figure (a)) connected by a swap gate (Figure (c)). The evolution of the input qubit can be viewed in two equivalent perspectives. One perspective is to evolve the input qubit step-by-step using the serially interconnected gates. The second perspective is to evolve the input qubit using the total quantum circuit at once, since the total evolution transformation [M net ] is equal to the multiplication of the individual evolution matrices [M q ] that correspond to the individual quantum primitives: Y [ ½ M net Š serial ½M q Š: q Figure. Quantum logic circuits

8 Perspective #: ) ) Perspective A Thus, the quantum circuit shown in Figure (a) evolves the qubit jl into the qubit jl. The quantum circuit in Figure (b) is composed of a serial interconnect of two parallel circuits as follows: dashed boxes ((), ()) and ((), ()) are parallel-interconnected, and dotted boxes () and () are serially interconnected. The total evolution transformation [M net ] of the total parallel-interconnected quantum circuit is equal to the tensor (Kronecker) product of the individual evolution matrices [M q ] that correspond to the individual quantum primitives: [ ½ M net Š parallel ^ M q Thus, analogous to the operations of the circuit in Figure (a), the evolution of the input qubit, in Figure (b), can be viewed in two equivalent perspectives, respectively. One perspective is to evolve the input qubit stage-by-stage. The second perspective is to evolve the input qubit using the total quantum circuit at once. Let us evolve the input binary qubit jl using the quantum circuit in Figure (b). The evolution of matrices of the parallel-interconnected dashed boxes in () and () are as follows (where the symbol k means parallel connection): K,/ 98

9 input jl^jl^jl! ^! ^! The evolution matrix for ðþðþjjðþ is: " Feyman ^ wire ^ # T oolean circuits 99 The evolution matrix for ðþðþjjðþ is: " Wire ^ swap # ^

10 Perspective #: input )ðþ )output ; input ð output Þ)ðÞ )output ; jl Perspective #: input )ððþðþþ ) A jl K,/ 9

11 Thus, the quantum circuit shown in Figure (b) evolves the qubit jl into the qubit jl. y applying this formalism to the quantum matrices from Figure, the reversible MRA circuit of Figure is represented compactly by the following transformations: ½ Šjax x l jr P f l ðþ oolean circuits 9 ½ Šjx x al jf P R l ðþ ½ Šjf f l jg FG l where in equation (), the qubit jl is used to generate the AND operation in block (Toffoli gate from Figure (b)) in Figure, and jabgl jal ^ jbl ^ jgl; where a, b, and g are single binary qubits.. onclusions and future work Reversible realization of MRA decomposition and its quantum computation are presented. A comprehensive treatment of reversible MRA and its quantum computing with supplementary materials is provided by Al-Rabadi (). Future work will involve the investigation of other possible reversible realizations of binary and multiple-valued MRA decompositions of logic circuits and their corresponding quantum computations. The use of the natural parallelism of quantum entanglement for the realization of MRA-based circuits will also be investigated. References Al-Rabadi, A.N. (), A novel reconstructability analysis for the decomposition of oolean functions, Technical Report #/, July, Electrical and omputer Engineering Department, Portland State University, Portland, Oregon. Al-Rabadi, A.N. (), Novel methods for reversible logic synthesis and their application to quantum computing, PhD dissertation, Portland State University, Portland, Oregon. Al-Rabadi, A.N., Zwick, M. and Perkowski, M. (), A comparison of enhanced reconstructability analysis and Ashenhurst-urtis decomposition of oolean functions, Kybernetes, Vol. Nos. -, pp ennett,. (9), Logical reversibility of computation, IM Journal of Research and Development, Vol., pp. -. Dirac, P. (9), The Principles of Quantum Mechanics, st ed., Oxford University Press, Oxford. Fredkin, E. and Toffoli, T. (98), onservative logic, International Journal of Theoretical Physics, Vol., pp. 9-. Hurst, S.L. (98), Logical Processing of Digital Signals, rane Russak and Edward Arnold, London and asel. Kerntopf, P. (), A comparison of logical efficiency of reversible and conventional gates, Proc. on rd Symposium on Logic, Design and Learning, Portland, Oregon. ðþ

12 K,/ 9 Klir, G. (98), Architecture of Systems Problem Solving, Plenum Press, New York, NY. Klir, G. and Wierman, M.J. (998), Uncertainty-ased Information: Variables of Generalized Information Theory, Physica-Verlag, New York, NY. Krippendorff, K. (98), Information Theory: Structural Models for Qualitative Data, Sage Publications, New York, NY. Landauer, R. (9), Irreversibility and heat generation in the computational process, IM Journal of Research and Development, Vol., pp Nielsen, M. and huang, I. (), Quantum omputation and Quantum Information, ambridge University Press, ambridge, MA. Zwick, M. (99), ontrol uniqueness in reconstructability analysis, International Journal of General Systems, Vol. No.. Zwick, M. (), Wholes and parts in general systems methodology, in Wagner, G. (Ed.), The haracter oncept in Evolutionary iology, Academic Press, New York, NY.

Regularity and Symmetry as a Base for Efficient Realization of Reversible Logic Circuits

Regularity and Symmetry as a Base for Efficient Realization of Reversible Logic Circuits Marek Perkowski*, Pawel Kerntopf 1, Alan Coppola 2, Andrzej Buller 3, Malgorzata Chrzanowska-Jeske, Alan Mishchenko,