Does soft-decision ECC improve endurance?

Transcription

1 Flash Memory Summit 2015 Does soft-decision ECC improve endurance? Thomas Parnell IBM Research - Zurich

2 Outline Motivation Why do we need more endurance? Capacity What is channel capacity? How can it be used to compare different error-correction techniques? MLC Flash Channel How do we evaluate capacity for MLC Flash devices? Experimental Results + Analysis How much endurance gain can soft-decision ECC offer for real MLC devices? Why does the MLC programming algorithm affect capacity? Conclusion 2

3 Why do we need more endurance? All-flash storage solutions are gaining momentum in the enterprise sector HOW? High performance and rapidly decreasing $/GB WHAT IS DRIVING DOWN COST? LDPC codes can make use of soft information from Flash to enhance reliability Papers on LDPC + Flash listed on IEEE plore In part, the move from SLC emlc cmlc ISN T cmlc VER UNRELIABLE? 2D cmlc has ~3k P/E cycling endurance BUT ENTERPRISE NEEDS >20k? Advanced ECC is required to boost endurance Source: 3

4 Channel Capacity (Shannon 1948) Channel Capacity: Amount of information (in bits) that channel output () contains about channel input () (Maximized over all input distributions) C max P( ) I( ; ) R < C Error-free operation is possible R > C Error-free operation is NOT possible BINAR SMMETRIC CHANNEL 0 1-f 0 Channel capacity can be used in two ways: 1 f f 1-f 1 a) For a given level of channel noise, what ECC rate is required in order to operate reliably? b) For a given ECC rate, how much channel noise can be tolerated? 4

5 AWGN Channel: Hard vs. Soft Information AWGN CHANNEL Binary Input Binary Output ˆ Soft output (Fine quantization) RBER gain in capacity highly correlated with RBER gain for real ECC SOFT CAPACIT HARD CAPACIT C SOFT P( ) max I ; C HARD P( ) max I ˆ ; ECC data sourced from: Tzimpragos et al. A Survey on FEC Codes for 100G and Beyond Optical Networks, IEEE Comm. Surveys & Tutorials,

6 MLC Flash Channel V i, j Soft Output (21 shifted reads from Flash) MLC FLASH CHANNEL Binary Input (2 bits) i, j ( L) i, j x2 + i, j READ (Upper) READ (Lower) i, j ( L) i, j Binary Output (2 bits) WL[i+1] BL[j-1] BL[j] BL[j+1] i 1, j 1 i 1, j i 1, j 1 Read Lower Page ( L) i, j 1 ( L) i, j 0 i, j 1 Read Upper Page i, j 0 i, j 1 WL[i] WL[i-1] i, j 1 i 1, j 1 i, j i 1, j i, j 1 i 1, j V i, j V i, j 6

7 MLC Flash Channel is NOT Memoryless 11 Threshold voltage distribution conditional on state of aggressor cells 10 i, j i j 10, The threshold voltage of a cell depends on the data written to the surrounding cells MLC flash channel is a FSMC: Finite State Markov Channel 7 n1 V V V V Pr,, Pr,,,, i,0 i,1 i, n1 i, j i, j1 i, j i, j1 i1, j i1, j j0 Conditional threshold voltage distributions are extracted from real MLC Flash devices

8 Calculation of Symmetric Capacity SOFT CAPACIT (UPPER PAGE) 1 C I V V V n lim,,..., ;,,..., SOFT i,0 i,1 i, n1 i,0 i,1 i, n1 n V i, j Soft Output Capacity* is calculated recursively using a very long sample from the channel (n=10 7 ) assuming i.u.d input distribution [ICC2015] MLC FLASH CHANNEL Binary Input (2 bits) i, j ( L) i, j x2 + i, j READ (Upper) READ (Lower) i, j ( L) i, j Binary Output (2 bits) HARD CAPACIT (LOWER PAGE) 1 C I n ( L) lim ( L), ( L),..., ( L) ; ( L), ( L),..., ( L) HARD i,0 i,1 i, n1 i,0 i,1 i, n1 n 8

9 Experimental Results Vendor A/B 1y-nm MLC devices with approx. same cell area VENDOR A VENDOR B Gain in capacity due to soft information is much larger for upper pages 9

10 How much endurance can we gain using soft information? Endurance (Balanced ECC) Same ECC rate in upper/lower page: PEC( R) min(pec ( R),PEC ( R)) L U Endurance (Unbalanced ECC) Different ECC rate in upper/lower page: PEC( R) max min(pec ( R ),PEC ( R )) R R 2R L U L L U U VENDOR A (R=0.99) VENDOR B (R=0.99) 14% 21% 11% 21% 10

11 Why do we only see a small increase in capacity for lower pages? INTERMEDIATE READ 1y-nm MLC DEVICE (a) Program LP=1 E x0 V TH LP=0 LP=1 Read LP=1 Read LP=0 (b) Program UP= V TH Degradation of the erase state can lead to errorpropagation during two-stage MLC programming Programming errors are present for the lower page that are difficult to correct even with soft information 11

12 What if we can prevent programming errors? 1x-nm MLC MODEL [ICC2015] Removing programming errors dramatically improves the lower page capacity ~40% endurance gain due to soft information BALANCED ECC (R=0.99) 5% 37% 12

13 Conclusion Does soft-decision ECC improve endurance? Sub-20nm planar MLC device? ES NO Does the device employ two-pass programming? SLC, TLC, and 3D devices have not been studied NO ES ~40% Endurance Gain Same ECC in upper/lower pages? NO ~20% Endurance Gain ES ~10-15% Endurance Gain 13

14 Acknowledgements IBM - Zurich Research Laboratory IBM FlashSystem 900/V9000 IBM Research Zurich IBM Flash Systems Development (Houston) IBM Systems (San Jose, Poughkeepsie, Raleigh) 14