Graph-Based Bit-Wise Soft Channel Estimation for Superposition Mapping

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1 Graph-Based Bit-Wise Soft Chael Estimatio for Superpositio Mappig Zheyu Shi 1, Peter Adam Hoeher 1, Abdullah A. Saed 2 1 Faculty of Egieerig, Uiversity of Kiel Kaiserstr. 2, D Kiel, Germay 2 Faculty of Elect. Egieerig, Uiversity of Mosul Mosul, Iraq {zs, ph}@tf.ui-kiel.de, abdcom_eg2006@yahoo.com ABSTRACT: A ovel chael estimator which performs chael estimatio bit-wise istead of symbol-wise is proposed i this paper. Combied with superpositio mappig (SM), the proposed algorithm is able to provide multiple chael estimates for a sigle chael coefficiet. umerical results idicate that bit-wise soft chael estimatio (BWSCE) is able to outperform symbol-wise soft chael estimatio (SWSCE) eve at lower computatioal cost. Keywords: Graph-Based Receiver, Bit-wise Soft Chael Estimatio, Iterative Receiver, Superpositio Mappig, Mote-Carlo Simulatios, Turbo Chael Codig Received: 30 October 2012, Revised 7 December 2012, Accepted 16 December DLIE. All rights reserved 1. Itroductio Chael estimatio is a challegig task for wireless commuicatio chaels, especially at high vehicular speeds ad/or high carrier frequecies. Iterative processig ca help to improve the system performace. I the past decades, may iterative chael estimatio approaches have show to outperform o-iterative approaches, see e.g. [1] [6]. The cocept of factor graphs [7] is a powerful tool for the desig of iterative estimatio/detectio algorithms. Several graph-based approaches have bee suggested [5], [6], [8]. I [5], a graphbased soft iterative receiver (GSIR) has iitially bee proposed i which joit data detectio, chael estimatio ad chael decodig are itegrated i a sigle factor graph. Utilisig the sum-product algorithm, the messages exchage i the graph is extrisic ad soft. Hece, both chael estimatio ad data detectio ca beefit from chael codig. I [8], the GSIR has bee exteded to higher-order modulatio schemes ad timevaryig chaels. Graph-based soft chael estimatio has show to provide a desirable performace usig less traiig symbols tha covetioal chael estimatio schemes. All of the above metioed algorithms are usig symbol-wise chael estimatio whe cosiderig higherorder modulatio. Thus, their complexities grow expoetioally with umber of bits per symbol. Superpositio mappig (SM) [9] is a recetly developed modulatio/multiplexig/mappig scheme. SM ca geerate a Gaussia distributed trasmit sigal, which has the ability to approach the chael capacity. I this paper, a additioal advatage of SM will be explored. I cojuctio with graphbased iterative processig, the characteristic of SM allows to perform chael estimatio o idividual bits, rather tha o a per symbol basis as i [8]. I this way, ulike symbolwise soft chael estimatio (SWSCE), multiple estimates of oe chael coefficiet will be obtaied at the receiver side. Sice messages are soft, exploitig multiple estimates ca improve chael estimatio by further exploitig codig gai. Moreover, as superpositio is a very Joural of Itelliget Computig Volume 4 umber 1 March

2 atural compositio i commuicatio systems, it is straightforward to exted this algorithm to multiple ateas ad multi-user commuicatios. 2. Fudametals 2.1 Superpositio Mappig The procedure of superpositio mappig is show i Figure 1. The ifo bits are first BPSK mapped oto bipolar atipodal ifo symbols. The, each ifo symbol is multiplied by a weightig factor, ad superimposed to create a complex valued data symbol before trasmissio, represeted i basebad otatio as = x [k] = Σ = 1 Σ = 1 α d [k] α (1 2b [k]), b [k] {0, 1} (1) Figure 1. Block diagram of superpositio mappig with 4 ifo bits per symbol where d [k] deotes the th biary atipodal symbol (chip) at time idex k ad α represets its allocated complex-valued weightig factor. is the umber of ifo bits per symbol. SM provides a degree of freedom of geeratig the symbol costellatio by properly choosig the values of α. For istace, if [α 1, α 2, α 3, α 4 ] = [1 / 10, 1 / 10, 2 / 10, 2 / 10 ] is chose, we will have a 16-QAM costellatio. If α = 1 e jπ / is selected, the symbol costellatio of x[k] is approximately Gaussia distributed. Due to Shao s chael codig theorem, the capacity of a Gaussia chael ca be achieved if ad oly if the chael output is Gaussia distributed. I other words, the chael iput is also required to be Gaussia distributed. For this reaso, SM has the potetial to achieve chael capacity. I additio, the superimposig property of SM provides the foudatio for bit-wise soft chael estimatio. 18 Joural of Itelliget Computig Volume 4 umber 1 March 2013

3 2.2 System Model We cosider bit-iterleaved coded modulatio (BICM) i cojuctio with superpositio mappig. After chael ecoder ad iterleaver, the sigal stream is superpositio mapped before trasmissio. Cocerig a flat fadig sigleiput sigle output (SISO) chael, the relatioship betwee the th chip d [k] ad the chael output y[k] ca be represeted as Σ y[k] = h[k] α d [k] + w[k] (2) = 1 where h[k] is the chael coefficiet, ad w[k] is a additive white Gaussia oise (AWG) sample. Based o (2), a factor graph represetig the joit iterative receiver for coded trasmissio over a time-varyig SISO flat fadig chael with = 2 is illustrated i Figure 2. Each colum represets a differet time idex. A chael ode h[k] carries the soft iformatio of a chael coefficiet. The message exchage betwee eighborig chael coefficiets is carried out by a trasfer ode. A observatio ode y[k] deotes the iformatio of a received symbol. A chip ode d [k] represets the soft iformatio of a trasmitted code bit, which is directly coected to the observatio ode. A deotes a code costrait. As the coderate is 1/3 ad iterleavig is take ito accout, each is radomly coected with three chip odes. I the remaider, the time idex k is dropped to simplify the otatio. Figure 2. Factor graph for the GSIR over a time-varyig chael assumig a rate 1/3 chael code ad 2 ifo bits per symbol 3. Bit-Wise Soft Chael Estimatio (BWSCE) The meaig of soft iformatio i the factor graph is twofolded. Oe is that the soft iformatio of the biary symbols is represeted by log-likelihood ratio (LLR) values. The other is that the soft iformatio of the chael estimates is depicted by the probability desity fuctio (pdf) of h. Approximatig h by a Gaussia variable, h C (µ h, σ 2 ), with h deotig the hard chael estimate ad σ 2 h measurig the reliability of this estimate. The procedure of the iterative receiver works as follows. First, h iitial LLRs ad iitial pdfs of h at the pilot positios are obtaied usig traiig symbols, i.e. referece symbols kow to the receiver. Afterwards, the soft iformatio is spread to the data positios via forward/backward propagatio. Later o durig iteratios, both traiig ad data symbols cotribute to iterative chael estimatio ad data detectio. The message passig algorithm cocerig data detectio has bee elaborated i [8]. Differet from [8] where chael estimatio is performed symbol-wise, i this work the priciple of bit-wise chael estimatio is proposed. For chael estimatio durig iteratios, the goal is to calculate the pair (µ h, σ 2 ) (pdf of h) give the correspodig LLRs from h the chip odes obtaied i the precedig iteratio. Revisitig (2) ad cosiderig a certai chip d, we obtai Joural of Itelliget Computig Volume 4 umber 1 March

4 y = hα d + j = 0; j hα j d j + w (3) ICI The received symbol y is composed of the desired chip, iterchip iterferece (ICI), ad oise w. Accordig to the cetral limit theorem, the iterferig part v = j = 0; j hα j d j + w = j = 0; j ca be approximated by a Gaussia radom variable with mea µ v ad variace σ v 2 if is sufficietly large. Assumig that differet values of γ j = hα j d j are idepedet, the mea ad variace of the iterferig part µ v ad σ 2 are computed as µ r j = 1; j j µ v = γ j + w v (4) (5) where σ 2 = v j = 1; j σ 2 + σ 2 r j w µ r = µ h α j (P j, + 1 P j, 1 ) j σ 2 = σ 2 + 4P j, +1 P j, 1 µ h α j 2 rj h (6) The pair (µ h, σ 2 h ) i (6) is the soft estimate of h obtaied from the previous iteratio. P j, ± 1 stads for the probability of d j = ±1, this ca easily be computed by the LLR of d j from the precedig iteratio. After obtaiig µ v ad σ v 2, the soft estimate of h from the th chip (defied h here) is calculated as follows: 20 Joural of Itelliget Computig Volume 4 umber 1 March 2013 µ h = σ 2 = (y µ h )(P, +1 P, 1 ) α σ 2 + 4P, +1 P, 1 y µ v 2 v h Sice each chip provides oe estimate for oe h, we will have chael estimates for a certai chael coefficiet h. Accordig to the sum-product algorithm, p(h) ca be attaied by multiplicatio of p(h ) with the formula After some derivatios, the pair (µ h, σ 2 ) is of the form h p(h) = Π p(h ) = 1 µ h µ h = = 1 σ 2 h α 2 1, σ 2 = 1 = 1 σ 2 h h 1 = 1 σ 2 h BWSCE has two advatages. First, several observatios cotribute to oe chael estimate. Thus, weaker estimates ca be compesated by stroger estimates through iterleavig ad chael decodig durig iteratios. Secod, BWSCE ivolves a lower computatioal cost. Sice for SWSCE the probability of each complex-valued symbol must be kow a priori, the complexity of SWSCE is expoetial w.r.t., whereas the complexity of BWSCE is liear w.r.t.. 4. umerical Results I order to examie the performace of the BWSCE, Mote Carlo simulatio are coducted. A superpositio mapper with α = 1 Ν e jπ / is chose. A cocateated code composed of a rate 3/4 Turbo code ad a rate 1/3 repetitio code is used for (7) (8) (9)

5 = 6 Symbolwise = 6 Bit-wise = 6 Perfect CSI = 4 Symbolwise = 4 Bit-wise = 4 Perfect CSI Bit Error Ratio E b / 0 i db Figure 3. BER performace betwee SW ad BW chael estimatio, = 4, = 6 Symbolwise = 6 Bit-wise = 4 Symbolwise = 4 Bit-wise 10-1 MSE E b / 0 i db Figure 4. MSE performace betwee SW ad BW chael estimatio, = 4, 6 chael codig. Traiig symbols are iserted every 8 data symbols. The symbols are trasmitted over a Rayleigh time-varyig chael with a maximum Doppler frequecy of f D T S = At the receiver side, a graph-based iterative receiver with 10 iteratios is adopted. The performace of SWSCE [8] ad the receiver kowig perfect chael state iformatio (CSI) with the same simulatio setup is also studied for compariso. From Figure 3, it ca be observed that the MSE for the BWSCE coverges earlier tha that for SWSCE for both = 4 ad = 6. At = 6, there is a cosiderable performace gai of BWSCE over SWSCE for both Joural of Itelliget Computig Volume 4 umber 1 March

6 BER ad MSE results. As is show o the left had side of Figure 2, at BER = 10 5, BWSCE provide a approximately 1 db ad 2 db gai over SWSCE i case of = 4 ad = 6, respectively. Meawhile, the complexity for BWSCE is lowertha SWSCE, especially whe icreases. 5. Coclusio I this paper, a ovel graph-based bit-wise chael estimatio techique has bee proposed. This algorithm ca outperform symbol-wise chael estimatio i may situatios meawhile maitaiig a lower computatioal complexity. Refereces [1] Hsua-Jug Su, Evaggelos Geraiotis. (1999). Performace compariso of iteratively filtered ad decoded MDD ad PSAM systems with liear complexity, I: Proc. IEEE Wireless Commu. etw. Cof. (WCC 99), ew Orleas, LA, Sept. p [2] Qighua Li, Costas. Georghiades, Xiaodog Wag. (2001). A iterative receiver for Turbo-coded pilot-assisted modulatio i fadig chaels, IEEE Commu. Lett., 5 (4) , Apr. [3] Carmela Cozzo, Brai L. Hughes. (2003). Joit chael estimatio ad data detectio i space-time commuicatios, IEEE Tras. Commu., 51 (8) , Aug. [4] Hedrik Schoeeich, Peter Adam Hoeher. (2006). Iterative pilot-layer aided chael estimatio with emphasis o iterleavedivisio multiple access systems, EURASIP Joural o Applied Sigal Processig, V. 2006, Article ID 81729, p. 15. [5] Tiabi Wo, Chuhui Liu, ad Peter Adam Hoeher. (2008). Graph-based soft chael ad data estimatio for MIMO systems with asymmetric LDPC codes, I: Proc. IEEE It. Cof. Commu. (ICC 08), Beijig, Chia, May. [6] Ya Zhu, Dogig Guo, ad Michael L. Hoig. (2009). A message-passig approach for joit chael estimatio, iterferece mitigatio, ad decodig, IEEE Tras. Wireless Commu., 8 (12) , Dec. [7] Frak R. Kschischag, Breda J. Frey, ad Has-Adrea Loeliger. (2001). Factor graphs ad the sum-product algorithm, IEEE Tras. If. Theory, 47 (2) , Feb. [8] Zheyu Shi, Tiabi Wo, Peter Adam Hoeher, Guther Auer. (2010). Graphbased soft iterative receiver for higher-order modulatio, I: Proc. 12 th IEEE Iteratioal Coferece o Commuicatio ad Techology (IEEE ICCT 2010), ajig, Chia, ov. [9] Tiabi Wo, Meelis oemm, Dapeg Hao, ad Peter Adam Hoeher. (2010). Iterative processig for superpositio mappig, Hidawi Joural of Electrical ad Computer Egieerig Special Issue o Iterative Sigal Processig i Commuicatios, V. 2010, Article ID , p Joural of Itelliget Computig Volume 4 umber 1 March 2013

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