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1 3188 IEEE TRANSACTIONS ON COMMUNICATIONS, VOL. 57, NO. 11, NOVEMBER 2009 Parallel Lookahead Algoriths for Pruned Interleavers Mohaad M. Mansour, Senior Meber, IEEE Abstract In this letter, the design of efficient parallel pruned channel and turbo interleavers for Ultra Mobile Broadband (UMB physical layer standard [1] is addressed. Channel interleaving is based on a bit-reversal algorith in which addresses are apped fro linear order into bit-reversed order. Turbo interleaving is based on filling a 2D array row by row, interleaving each row independently using a linear congruential sequence (LCS, bit-reversing the order of the rows, and then reading the interleaved addresses colun by colun. To accoodate for flexible codeword lengths L, interleaving is done using a other interleaver of length M =2 n,wheren is the sallest integer such that L M, such that outlier interleaved addresses greater than L 1 get pruned away. This pruning operation creates a serial bottleneck since the interleaved address of a linear address x is now a function of the interleaving operation as well as the nuber of pruned addresses up to x. A generic parallel lookahead pruned interleaving schee that breaks this dependency is proposed. The efficiency of the proposed schee is deonstrated in the context of both UMB interleavers. An iterative pruned bit-reversal algorith that interleaves any address in O(log L steps is presented. Moreover, an iterative pruned turbo interleaving algorith based on LCSs that interleaves any address in O(log 2 L steps is presented. Index Ters Channel interleavers, pruned interleavers, turbo interleavers, linear congruential sequences, turbo codes. I. INTRODUCTION INTERLEAVERS are eployed in ost odern wireless counications systes to reduce the ipact of noise on counication perforance. For exaple, channel interleaving is utilized to protect against burst errors [2]. A channel interleaver reshuffles encoded sybols fro the output of a channel encoder in such a way that consecutive sybols get spread apart fro each other as far as possible in order to break the teporal correlation between successive sybols involved in a burst of errors. In soe standards, these interleavers eploy soe for of bit-reversal operations in generating the interleaved addresses, and have a prograable size to accoodate for flexible packet lengths. For exaple, the eerging Ultra Mobile Broadband (UMB standard part of the 3rd Generation Partnership Project 2 (3GPP2 [1] eploys a pruned bit-reversal channel interleaver in its physical (PHY layer, which interleaves a packet of length L by apping nbit linear addresses into n-bit bit-reversed addresses, where n = log 2 (L. Linear addresses that ap to addresses greater than L are pruned away. Paper approved by A. H. Banihashei, the Editor for Coding and Counication Theory of the IEEE Counications Society. Manuscript received Deceber 27, 2007; revised Septeber 15, 2008 and February 4, M. M. Mansour was with the Algoriths and Architectures R&D Group, Qualco Flarion Technologies, Bridgewater, NJ, 08807, USA. He is currently with the Departent of Electrical and Coputer Engineering, Aerican University of Beirut, Lebanon (e-ail: ansour@aub.edu.lb. Digital Object Identifier /TCOMM /09$25.00 c 2009 IEEE Interleavers are also eployed in turbo codes [3], which are considered one of the ain coding techniques in ost counications standards due to their excellent perforance at low bit-error rates and low ipleentation coplexity. Coputationally efficient turbo interleaving algoriths are typically based on block interleavers that write a set of linear addresses into a 2D array in one direction (e.g., row-by-row, apply independent pseudo-rando perutations to the row and colun entries, and then read the resulting reshuffled addresses in the other direction (e.g., colun-by-colun. In UMB, the perutations applied to the colun entries are based on linear congruential sequences (LCSs [4], while the perutations applied to the row entries are based on bitreversal perutations. Also, the concept of pruning is utilized in a UMB turbo interleaver to accoodate for flexible packet lengths. Other related pruning techniques for turbo codes are discussed in [5] [8]. A ajor disadvantage of pruned interleavers is that, despite their siplicity, interleaved addresses ust be generated sequentially. That is, in order to generate the interleaved address corresponding to a sybol with linear address x, the interleaved addresses of all previous sybols ust first be generated. This follows fro the fact that the nuber of pruned addresses that have occurred before x ust be known in order to know where the sybol with address x gets apped to. This requireent introduces a latency bottleneck, especially when (de-interleaving and turbo encoding/decoding long packets (e.g. size 16K in UMB [1]. Fig. I(a shows the flowchart of a generic pruned interleaver π that interleaves the addresses fro 0 to L 1 with pruning. Not uch work has been done in the literature to address the disadvantage of pruning latency on interleaver address generation, in particular, the feedback loop in Fig. I(a that keeps track of the nuber of pruned addresses. In this letter, we present a generic schee that enables the generation of pruned interleaved addresses in parallel, thus breaking the feedback loop in Fig. I(a. The schee, as illustrated in Fig. I(b, is based on a lookahead technique that deterines the nuber of pruned addresses in logarithic tie coplexity. In the figure, the set of addresses [0,L 1] to be interleaved is divided into P blocks of size N. Each lookahead block in Fig. I(b, designated by φ, coputes the nuber of pruned addresses in the blocks to its left, thus enabling each block to be interleaved independently fro the preceding blocks. This results in a speedup by a factor of P over the sequential schee in Fig. I(a. The coputations done by the lookahead φ-blocks depend on the underlying interleaving perutation; however, the overall schee applies to any sequentially pruned interleaver. To deonstrate the efficiency of this schee, we present

2 MANSOUR: PARALLEL LOOKAHEAD ALGORITHMS FOR PRUNED INTERLEAVERS L Block 0 x = 0 cnt = 0 (x + cnt < L Y (x, L = (x + cnt x = x + 1 (# of pruned addresses N : perutation : interleaver apping with pruning N Block 1 2N (N 1 (a Block 2 (2N 1 cnt = cnt + 1 (P 1N Block P 1 ( (P 1N 1 into another n-bit nuber y less than L according to the bitreversal rule. The size of the pruned interleaver is L, while the size of other interleaver is M. There are several ways to prune addresses fro the other interleaver. One ethod is to ignore positions beyond L1 in the peruted sequence, which we consider in this letter (see also [7], [11]. Other ethods prune addresses beyond L 1 in the original sequence, or prune a ixture of addresses fro both the original and pruned sequences [7]. We designate the PBRI apping on n bits with paraeter L by the function y = ψ n (x, L. We assue that M 2 <L<M in the reainder of the letter. The apping ψ n (x, L for a given x is coputed sequentially by starting fro w =0and aintaining the nuber of invalid appings φ n (x, L skipped along the way. If w + φ n (x, L aps to a valid nuber (i.e., π n (w + φ n (x, L <L, then w is increented by 1. If w + φ n (x, L aps to an invalid nuber, φ n (x, L is increented by 1. These operations are repeated until w reaches x and π n (x is valid, and hence ψ n (x, L =π n (x + φ n (x, L. (1 (0 : N 1 (N : 2N 1 (2N : 3N 1 (b ( (P 1N : PN 1 Fig. 1. (a Flowchart of the sequential pruned interleaver algorith. (b Parallel pruned interleaver using the proposed lookahead schee. L is the interleaver length, P is the degree of parallelis, and N = L/P. Theφ- blocks copute the nuber of pruned addresses in all blocks to their left. hardware-efficient algoriths for the lookahead φ-blocks for the bit-reversal and LCS perutations eployed in UMB channel and turbo interleavers, respectively. However the sae concepts can be applied to other (turbo interleavers that have a structure based on circular perutations such as the Alost Regular Perutations (ARP [9] and the Dithered Relative Prie (DRP [10] interleavers, aong others. For bit-reversal perutations, the proposed algorith coputes the nuber of pruned addresses in O(log L steps. This algorith is presented in Section II. Moreover, the proposed lookahead schee for UMB turbo interleaving based on LCS perutations coputes an interleaved address in O(log 2 L steps. This algorith is presented in Section III. Both algoriths have siple hardware architectures that can be constructed using basic arithetic blocks. Finally, Section IV provides soe concluding rearks. Due to space liitation, the proofs of all theores have been oitted. The interested reader can contact the author. II. CHANNEL INTERLEAVING FOR UMB A. Sequential Pruned Bit-Reversal Algorith A bit-reversal interleaver (BRI aps an n-bit nuber x into another n-bit nuber y according to a siple bit-reversal rule such that the bits of y appear in the reverse order with respect to x. We designate the BRI apping on n bits by the function y = π n (x. The values taken by x and y range fro 0 to M 1, wherem 2 n is the size of the interleaver. A pruned BRI aps an n-bit nuber x less than L, wherel M, Note that fro the definition of the bit-reversal operation and the condition M 2 < L < M, it follows that two consecutive nubers can not both have invalid appings. We can use this fact to give a recursive definition of φ n (x, L for 0 x<l: φ n (x, L =0if x =0; φ n (x, L =φ n (x 1,L if π n (x + φ n (x 1,L <L; φ n (x, L =φ n (x 1,L+1 otherwise. In addition, note that if x 1 >x 2,thenφ n (x 1,L φ n (x 2,L, and hence φ n is a non-decreasing function. It can be easily shown that the sequential PBRI algorith always perfors M 1 iterations in apping the integers in [0,L1], for any L satisfying M 2 < L < M. That is, the PBRI algorith traverses all the integers in [0, 2 n 2] (excluding the last integer 2 n 1 when apping the integers [0,L 1] independent of L, always pruning M L 1 integers fro the interleaved sequence along the way. Note that M 1 is a palindroe, i.e., π n (M 1 = M 1 L, som 1 aps to an invalid nuber. Hence the algorith terinates before M 1, which leaves only M L 1 invalid integers to be pruned. B. Deterining the Nuber of Invalid Mappings φ n (x, L The tie coplexity of the sequential PBRI algorith is O(M, which follows directly fro the fact that the nuber of invalid appings φ n (x, L that have occurred in apping all integers less than x ust first be coputed in order to deterine what value x aps to. In the following, we present an algorith to deterine φ n (x, L with coplexity O(log 2 M by analyzing the bit-structure of the invalid appings. We first exaine the quantity φ n (x, L in ore detail. Note that φ n (x, L represents the iniu nuber of integers that ust be skipped such that all integers fro 0 to x have valid appings. Equivalently, φ n (x, L represents the iniu nuber that needs to be added to x such that there are exactly x +1 integers in the interval [0,x+ φ n (x, L] that have valid appings. This quantity is not necessarily equal to the nuber of integers less than x that have invalid appings, which we denote by σ(x. In fact, φ n (x, L σ(x. This follows fro

3 3190 IEEE TRANSACTIONS ON COMMUNICATIONS, VOL. 57, NO. 11, NOVEMBER 2009 the fact that for the σ(x integers in the range [0,x] with invalid appings, at least σ 1 (x σ(x ore integers greater than x ust be tried to check if they have valid appings. But the nubers fro x +1 to x + σ(x can in turn have invalid appings that ust be taken into account. So φ n (x, L is at least equal to nuber of invalid appings in the range [0,x + σ 1 (x], which is given by σ 2 (x σ(x + σ 1 (x. Siilarly, the nubers fro x + σ 1 (x +1 to x + σ 2 (x can in turn have invalid appings that ust be taken into account. So φ n (x, L is at least equal to nuber of invalid appings in the range [0,x + σ 2 (x], which is given by σ 3 (x σ(x + σ 2 (x. The process is repeated for k steps until the interval [0,x+ σ k (x] contains exactly x +1 valid appings as ( x + σ k (x+1 σ ( x + σ k (x = x +1,or equivalently until, σ k (x =σ ( x + σ k (x σ k+1 (x. Then, φ n (x, L = σ k (x. The pseudo-code of φ-algorith that coputes φ n (x, L iteratively using σ(x is shown below. By analyzing the axiu nuber of invalid integers added at each step, it can be shown that the φ-algorith converges to φ n (x, L in at ost n 1 iterations. Algorith 1 φ-algorith procedure φ-algorithm(n, L, x k 0 σ 0 (x 0 repeat σ k+1 (x σ ( x + σ k (x k k +1 until ( σ k+1 (x =σ k (x φ n (x, L σ k (x ψ n (x, L π n (x + φ n (x, L end procedure C. Deterining σ(x The proble of deterining φ n (x, L reduces to that of deterining σ(x. We next present an algorith to deterine σ(x by studying the bit representation of the invalid nubers fro L to M 1. Letx = x n1 x n2 x 1 x 0, x i =0or 1, denote the binary representation of x, wherex n1 is the ost significant bit (MSB and x 0 is the least significant bit (LSB. We use the notation x[i : j], i j, to represent the set of consecutive bits x i,x i1,,x j, ordered fro MSB to LSB. The concatenation of two strings x[i 1 : j 1 ] and x[i 2 : j 2 ] is represented as x[i 1 : j 1 ] x[i 2 : j 2 ]. For convenience, we define x[i : j] =0if j>i. Consider the bit representation of the nubers between L and M 1. These nubers can be classified by their ost significant bits according to the bit representation of L 1 as follows. Let z denote the nuber of zero bits in the bit representation of L 1, and I be the index set of those zeros ordered fro ost significant to least significant bit. For exaple, if L 1 = , thenz =4, I = {5, 3, 1, 0}. Then the nubers x can be classified into 4 classes as follows (x represents don t care: C 1 : 11xxxxx (32 nubers; C 2 : 1011xxx (8 nubers; C 3 : x (2 nubers; C 4 : (1 nuber. The MSBs that define these classes are deterined by scanning the bits of L 1 fro left to right, searching for the zero bits. The MSBs of the first class correspond to the MSBs of L 1 up to the first zero, and then flipping the first zero to one. The MSBs of the second class correspond to the MSBs of L 1 up to the second zero, and then flipping the second zero to one. The MSBs of the reaining classes are siilarly obtained. Matheatically, the sallest( nuber in each of the z classes can be expressed as δ i = L1 2 I (i +1 2 I (i, i =1, 2,,z. We are interested in the set of integers, which when bit-reversed, becoe invalid. These integers belong to the above defined classes, but in bit-reversed order. Define δ i π n (δ i,fori =1, 2,,z,andletC i be the corresponding classes. The δ i s represent the classes of invalid nubers in bit-reversed order. Also, let I denote the index set of the zero bits of π n (L 1 ordered fro LSB to MSB. Hence, if x C i,thenπ n (x L and x[i(i :0]=δ i [I(i :0]. The nuber of invalid appings σ(x up to and including x can be deterined by counting the nuber of invalid appings belonging to each class C i,i=1, 2,,z. Denote the nuber of invalid appings belonging to class C i by σ i (x. Then, σ i (x can be deterined using δ i,themsb sofx to the left of the ith zero, x[n 1:I(i+1], and the reaining LSB s of x to the right of and including the ith zero, x[i(i :0],as follows. The ost significant (n I(i 1 bits x[n 1: I(i +1] represent the nuber of integers belonging to C i that have appeared before x, i.e., those integers that have the sae (I(i+1 LSBs as δ i but are less than x[n 1:I(i+ 1] δ i [I(i :0]. The least significant (I(i+1 bits x[i(i :0] are used to check if x x[n 1:I(i+1] δ i [I(i :0],or equivalently, if x[i(i :0] δ i [I(i :0].Thischecksifx itself aps to an invalid integer in C i,orifx aps to an integer greater than the last invalid integer in C i. In either case, σ i (x is increented by 1. Note by convention that x[i : j] is defined to be 0 if j>i. Matheatically, σ i (x can be expressed as: { x[n 1:I(i+1], if x[i(i :0]<δi[I(i :0]; σ i(x = x[n 1:I(i+1]+1, otherwise, (2 and σ(x = z i=1 σ i(x. The pseudo-code of the σ- Algorith for coputing the σ(x is outlined below. Algorith 2 σ-algorith procedure σ-algorithm(n, L, x z nuber of 0 s in π n (L 1 (2 I index set of 0 s in π n (L 1 (2,LSBtoMSB for i 1,z do σ i (x x[n 1:I(i+1] if x[i(i :0] δ i [I(i :0]then σ i (x σ i (x+1 end if end for σ(x z i=1 σ i(x end procedure Exaple 1: Let L 1 = with n = 7. Then π n (L 1 = , z = 4, and the index set is I = {1, 3, 5, 6}. The classes of invalid nubers in bit-reversed order are given by: C 1 : xxxxx11, δ 1 = ; C 2 :

4 MANSOUR: PARALLEL LOOKAHEAD ALGORITHMS FOR PRUNED INTERLEAVERS 3191 xxx1101, δ 2 = ; C 3 : x110101, δ 3 = ; C 4 : , δ 4 = Next, let x = For i =1,wehaveI(1 = 1, x[1 : 0] = 01 (2 <δ 1 [1 : 0] = 11 (2,thenσ 1 (x = x[6 : 2] = 19 (10.Fori = 2, I(2 = 3, x[3 : 0] = 1101 (2 δ 2 [3 : 0] = 1101 (2, then σ 2 (x =x[6:4]+1=5 (10.Fori =3, I(3 = 5, x[5 : 0] = (2 < δ 3 [5 : 0] = (2, then σ 3 (x =x[6] = 1. Finally, for i =4, I(4 = 6, x[6 : 0] = (2 <δ 4 [6 : 0] = (2,thenσ 4 (x =0. Hence, σ(x= =25 (10. III. TURBO INTERLEAVING FOR UMB Turbo codes [3] are eployed in the UMB standard PHY layer to encode data channel packets [1]. Packets are divided into sub-packets of length L between 128 bits and 16,384 bits, and encoded separately using a punctured rate-1/5 turbo code coposed of rate-1/3 constraint-length 4 constituent convolutional codes [1]. The turbo interleaver adopted in UMB is based on linear congruential sequences [12]. It interleaves UMB sub-packets of length between 128 bits and 16,384 bits, but can be applied to any arbitrary sub-packet length. The sequence of interleaver output addresses generated by an LCS turbo interleaver is equivalent to the sequence obtained by the following process. A 2D R C array is filled with a sequence of linear addresses row by row fro top to botto, the entries of the array are shuffled according to a procedure to be described next, and the resulting shuffled entries are read colun by colun fro left to right. It is worth entioning that although in this section we only consider LCS perutations as defined in UMB, the sae concepts can be generalized to other turbo interleavers in the literature defined using circular perutations (e.g., ARP [9] and DRP [10] interleavers, aong others. The shuffling of the array entries is based on applying an independent perutation to the colun entries in every row, and then peruting the order of the rows. First, a sall positive integer r is chosen depending on the eory bank architecture of the interleaver (e.g., r =5in UMB. Next, the sallest positive integer n such that L 2 r+n is deterined. This is equivalent to finding the sallest sized 2 r 2 n array that can hold L entries. The 2 n entries of each row are interleaved independently using an LCS recursion whose paraeters are deterined using a 2D look-up table (LUT based on the row index and n. The result of this operation is a set of new interleaved colun indices. Next, the 2 r rows are shuffled in bit-reversed order. The result of this operation is a set of new interleaved row indices. Finally, the interleaved addresses are fored by concatenating the corresponding interleaved colun and row indices in opposite order with respect to their order in the linear address. The last step is equivalent to reading the interleaved array entries in the opposite order (i.e. colun by colun to which it was filled in (i.e. row by row. If the resulting interleaved address is greater than or equal to L, then it is pruned away and the sae operations are repeated on the next consecutive address in linear order. Let x be an (r + n-bit linear address, and y = ρ r,n (x be its (r + n-bit turbo-interleaved address [12]: ρ r,n (x =2 n π r (x od 2 r + [[( x 2 r +1 od 2 n] ] LUT (x od 2 r,n od 2 n, (3 where π r is the r-bit reversal function defined in Section II-A and LUT is a 2D look-up table that stores the oduli of the 2 r LCS recursions for every n. The sequential turbo interleaving algorith proceeds as illustrated in Fig. I(a, where π is replaced by ρ. Note that fro the property of the bit-reversal function (Section II-A when applied to the r LSBs of x in (3, as well as the condition M 2 < L < M, two consecutive addresses can not both have invalid aps under ρ r,n (x. Exaple 2: Let L =44and r = n =3, so that 6-bit linear addresses fro 0 to 2 6 1=63are filledina array. Assue that the oduli of the 8 LCS recursions are 5, 7, 5, 7, 1, 1, 1, and 7, respectively. Let x = 17 = Then ρ 3,3 (17 = 2 3 π 3 (1 + [3 LUT(1, 3] od 2 3 =37. Due to pruning of addresses, the address generated by ρ r,n (x in (3 is not always valid, and hence not all integers in the interval [0,x] have valid appings. We define the function ψ r,n (x, L that always generates valid addresses under the apping ρ r,n (x for all integers between 0 and x: ψ r,n (x, L = ρ r,n (y where y is the iniu integer such that [0,y] contains exactly x +1 valid appings. This definition is analogous to the definition of ψ n (x, L in (1. Obviously, if L =2 r+n, then there are no pruned addresses and ψ r,n (x, L coincides with ρ r,n (x. However,ifL<2 r+n, this equality no longer holds, but rather ψ r,n (x, L =ρ r,n (x + φ r,n (x, L, (4 where φ r,n (x, L is the iniu nuber of integers to be added to x such that the interval fro 0 to x + φ r,n (x, L contains exactly x +1 valid addresses when apped by (3. The proble again reduces to deterining φ r,n (x, L, siilar to that of deterining φ n (x, L in the previous section. Fro (3, ρ r,n (x involves both a bit-reversal apping and a linear congruential sequence apping. In Section II, the proble was solved for bit-reversal apping. In the following sub-sections, we solve the proble for linear congruential sequence appings, and cobine the results to deterine φ r,n (x, L. A. Linear Congruential Sequences A linear congruential sequence is defined by the recursion: Y i+1 =(ay i + c od; i 0, (5 where >0isthe odulus, a is the ultiplier (0 a<, and c is the increent (0 c<. In [4], it was shown that a LCS generates all the nubers in [0, 1] (i.e. has a full period of length if and only if: 1 c and are relatively prie, 2 (a 1 is a ultiple of every prie divisor of, and 3 if is a ultiple of 4, then (a 1 is a ultiple of 4. In UMB turbo interleavers, the LCSs eployed have a =1 and =2 n, while the increents c are odd constants stored in a look-up table [1],[12]. The initial value of the sequence Y 0 is chosen to be c, but the choice can be arbitrary. It

5 3192 IEEE TRANSACTIONS ON COMMUNICATIONS, VOL. 57, NO. 11, NOVEMBER 2009 is obvious that this choice of the odulus, ultiplier and increents satisfies the above three conditions and hence the corresponding linear congruential sequences have a full period. In this case, the sequence values are siply given by Y i = s(c,, i with a =1and Y 0 = c, wheres( is defined by the following equation: s(c,, x =c (x +1od ; 0 x<. (6 Generating addresses in hardware according to (6 requires siply an n-bit adder and an n-bit unsigned ultiplier. Siilar to the sequential PBRI algorith, the sequential pruned turbo interleaving algorith eploying (3, which uses the LCS in (6, requires M 1 iterations to interleave L addresses. Referring to (6, we are interested in deterining the nuber of integers in [0,α for soe α 0 whose iage under (6 fall in [0,β for soe β 0. Using the direct approach of counting the nuber of such integers as we step through the sequence values in (6 by coparing s(c,, x to α for all 0 x<α, has tie coplexity proportional to x. In the following, we present an algorith that solves this proble in tie coplexity proportional to log(x. Define I to be the set I(c,, α, β ={x : 0 x<α, 0 s(c,, x <β}, (7 where α 0, β 0. The following theore counts the nuber of eleents in I. Theore 1: Let a LCS be as defined by (6 such that c>0, >0, andgcd(c, =1,andletI be the set of integers as defined by (7. Then the nuber of eleents in I is given by 1 ( x α x I(c,, α, β = kβ + x=0 ( s(c,, x β s(c,, x, if β<,and I = α otherwise, where is the integer floor function, α = α od, andk = α. B. Generalized Dedekind Sus Fro Theore 1, it is sufficient to copute the su 1 ( x α x S(c,, α, β = x=0 ( s(c,, x β s(c,, x, for 0 α<,0 β<, and hence { α β + S(c,, α od, β, I = α, if β<; otherwise. (8 (9 (10 This suation involves integer floor functions and does not have a known closed-for expression. However, if we represent (9 using the saw-tooth" function ((x x x δ(x instead of the floor function, where δ(x =1if x is an integer and 0 otherwise, then we can express (9 using the well-known generalized Dedekind sus [4] and benefit fro their properties. A generalized Dedekind su d(h, k, c is defined using the saw-tooth function as k1 (( j d(h, k, c =12 k j=0 (( h j + c k. (11 Theore 2: The suation defined in (9 is equal to S(c,, α, β = αβ (d(c,, c + αc β 12 (12 d(c,, c + αc+d(c,, c d(c,, c β + E, where E is o(1/ and can be evaluated using a 13-entry LUT. Intuitively, the result of Theore 2 can be thought of as 1 ( x α S(c,, α, β = x x=0 ( s(c,, x β s(c,, x + ε, where ε is the error between the forula in (12 and the suation in (9 evaluated without using integer floors. We next present an optiized iterative algorith for coputing the cobination of the four Dedekind sus in (12. In [4], Knuth presented a recursive algorith for coputing a Dedekind su based on the reciprocity property which states that d(h, k, c =f(h, k, c d(k od h, h, c od h, (13 for 0 <h k, 0 c<k,andgcd(h, k =1. The function f(h, k, c is defined by (19 on page 84 in [4]. Equation (13 can be applied recursively to evaluate d(h, k, c using a process that reduces the arguents in a fashion siilar to the Euclidean algorith when coputing the greatest coon divisor (gcd. Referring to (12, the four Dedekind sus differ only in their third arguent, and hence their linear cobination, d (h, k, c 1 12 (d(h, k, c 1 d(h, k, c 2 + (14 d(h, k, c 3 d(h, k, c 4, can be expressed recursively as d (h, k, c =f (h, k, c d (h od h, h, c 1 od h, c 2 od h, c 3 od h, c 4 od h, (15 where c =[c 1,c 2,c 3,c 4 ], c 1 = c + αc β, c 2 = c + αc, c 3 = c, c 4 = c β, and f (h, k, c 4 (1 i+1 i=1 ( c 2 i 2hk 1 2 ci 1 h 4 e(h, c i. (16 We define a procedure that applies (15 recursively and reduces the arguents odulo h. We also assue that (15 converges in t steps, i.e., the first arguent of d reaches zero

6 MANSOUR: PARALLEL LOOKAHEAD ALGORITHMS FOR PRUNED INTERLEAVERS 3193 after t steps. At step j of the procedure, we copute the quantities: h[j] a[j] =, (17 h[j +1] h[j +2]=h[j] odh[j +1], ci [j] b i [j] =, i =1,, 4, (18 h[j +1] c i [j +1]=c i [j] odh[j +1], i =1,, 4, (19 for j = 1,,t, with initial conditions h[1] = k, h[2] = h, andc i [1] = c i,i =1,, 4. Collecting the interediate results generated by (16 throughout the t steps in (15, we obtain t 4 d (h, k, c = (1 i+j+2 ( j=1 i=1 c i [j] 2 2h[j]h[j +1] b i[j] 2 e(h[j +1],c i[j] 4. (20 We can siplify further the first ratio in suation (20 to avoid non-integer arithetic by defining the auxiliary quantity p[j] a[j]p[j 1] + p[j 2], wherep[0] = 1 and p[1] = a[1]. We have the following theore: Theore 3: The cobination of the four Dedekind sus in (12 can be evaluated iteratively in at ost log 2 k steps using (14 with the following forula using integer arithetic, assuing h[1] is a power of 2: t 4 d (h, k, c = (1 i+j+2 j=1 i=1 ( bi[j](c i[j] +c i[j +1]p[j 1] 2h[1] bi[j] 2 e(h[j +1],ci[j]. 4 (21 The pseudo-code of the optiized algorith for coputing (21 is outlined below. Equation (12 can then be evaluated as S(c,, α, β = αβ 2 + d (c,, c + αc β,c + αc,c,c β+e. (22 C. Deterining Invalid Turbo-Interleaved Addresses in an Interval Let x be an (r + n-bit linear address, and ρ r,n (x be the corresponding (r + n-bit turbo-interleaved address as defined in (3. We next deterine the nuber of integers in [0,x] which have invalid appings under ρ r,n using the results of Sections II-B and III-B. Let H(r, n, α, β be the set of integers x in [0,α 1] such that ρ r,n (x β, whereα 0, β 0: H(r, n, α, β ={0 x<α: ρ r,n (x β}, (23 and let σ r,n (α, β be its size. We assue that α, β are represented as unsigned binary nubers using (r + n bits. The integers in the set H(r, n, α, β can be deterined by considering the action of the bit-reversal ap π r on the r least significant bits of x in (3, as well as the action of the Algorith 3 D-algorith for coputing (21 procedure D-ALGORITHM(H, K, C 1,C 2,C 3,C 4 Initialization: A 0, T 0, B 0 h H, k K c i C i od K, i =1,, 4 p 1, p 0 s 1 Reduction: while h>0 do Divide: a k/h b i c i /h, r i c i od h, i =1,, 4 Accuulate: A A (b 1 b 2 + b 3 b 4 s T T (e(h, c 1 e(h, c 2 +e(h, c 3 e(h, c 4 s B B p(b 1 (c 1 + r 1 b 2 (c 2 + r 2 +b 3 (c 3 + r 3 b 4 (c 4 + r 4 s Update h, k, c i,p,p,s: t k ah, k h, h t c i r i, i =1,, 4 t ap + p, p p, p t s s end while D A/2+T/4+B/2K end procedure LCS ap of (6 on the n ost significant bits of x in (3. Obviously, any integer less than α whose r LSBs, when bitreversed, for an r-bit nuber that is strictly greater than the nuber fored by the r MSBs of β, belongs to H. Denote by H (r, n, α, β the set of all such integers: H (r, n, α, β = { } β 0 x<α: π r (x od 2 r > 2 n, (24 and let σ r,n (α, β be its size. Then σ r,n (α, β is deterined by the following theore. Theore 4: The total nuber of integers in the set H (r, n, α, β is given by ( α 1 β σ r,n(α, β = 2 r 2 r 2 n 1 + β φ r ((α 1 od 2 r, 2 n +1. (25 We next consider the action of the LCS ap of (6 on the n MSBs of x in (3. The reaining integers in H that are not included in H are those integers less than α whose r LSBs, when read in bit-reversed order, overlap with the r MSBs of β, and whose n MSBs,whenappedbyanLCS ap with odulus 2 n and an appropriate ultiplier c, for an n-bit nuber that is greater than or equal to the nuber that corresponds to the n LSBs of β. LetH (r, n, c, α, β be

7 3194 IEEE TRANSACTIONS ON COMMUNICATIONS, VOL. 57, NO. 11, NOVEMBER 2009 the set of such integers, { H (r, n, c, α, β = 0 x<α: π r (x od 2 r ( x s c, 2 n, 2 r β od 2 n}, β 2 n, (26 where s(c,, x is defined in (6, and let σ r,n (c, α, β denote its size. The following theore deterines σ r,n (c, α, β. Theore 5: The total nuber of integers in the set H (r, n, c, α, β is equal to σ r,n(α, β =α I(c, 2 n,α,β, (27 ( ( where c = LUT π β r 2,n ; α = α1 n 2 +1 if ( r π β r 2 (α 1 od 2 r,andα = α1 n 2 otherwise; r β = β od 2 n +1. Cobining the previous results, the total nuber of integers in H(r, n, α, β =H (r, n, α, β H (r, n, c, α, β is σ r,n (α, β =σ r,n(α, β+σ r,n(α, β. (28 D. Turbo Interleaver Addresses To deterine where an integer x gets apped by ρ r,n (x in the presence of pruning for an interleaver of length L, such that n = log 2 (L/2 r, wefirst deterine the nuber of pruned addresses in [0,x] using (28 as σ r,n (x +1,L. Then, the interval is expanded to x + σ r,n (x +1,L in order to include these pruned addresses, and the nuber of pruned addresses in the interval fro 0 to x + σ r,n (x +1,L is deterined. The process is repeated until a iniu sized interval that includes exactly x valid addresses, is reached. This process is the sae as the φ-algorith described in Section II-B. Let σ r,n(x (k +1,L be the nuber of addresses pruned at the kth iteration. Then the nuber of pruned addresses at iteration ( (k +1 is given by σ r,n (k+1 (x + 1,L = σ r,n x + σ r,n(x (k +1,L+1,L. The process is repeated until σ (k+1 r,n (x +1,L=σ (k r,n(x +1,L. The pseudo-code of the φ-algorith for coputing φ r,n (x, L, defined in (4 to be the iniu nuber of integers to be added to x such that the interval fro 0 to x + φ r,n (x, L contains exactly x +1 valid addresses, is the sae as the one given in Algorith 1 for the bit reversal ap π n (x, with σ k (x replaced by σ r,n(x+1,l, (k φ n (x, L by φ r,n (x, L, π n (x by ρ r,n (x, andψ n (x, L by ψ r,n (x, L. The φ-algorith for the ap ρ r,n (x, L converges in at ost log(l 1 iterations based on the sae observation that two consecutive addresses generated by ρ r,n (x in (3 can not both be invalid due to the bit-reversal ap on the r LSBs. Moreover, each iteration of the φ-algorith involves coputing σ r,n (x, L according to (28. Fro (25, σ r,n(x, L requires at ost log(l/2 n steps to converge using the φ-algorith for (x, L requires at ost log(l/2 r steps to converge. Cobining the two results, σ r,n (x, L requires at ost log(l in(r, n steps to converge. Hence the tie coplexity of the φ-algorith π r (x. Fro (27, and using Theore 3, σ r,n is O(log 2 (L. For the choice of L between 2 7 and 2 14 as defined in UMB [1], it can be shown through siulations that the algorith converges in at ost 45 iterations. Referring to the parallel lookahead interleaving schee in Fig. I(b, if the φ-block ipleents the φ-algorith as described above for ρ r,n, then the lookahead interleaver would correspond to a parallel UMB turbo interleaver. IV. CONCLUSION A parallel lookahead pruned interleaving schee that eliinates the serial bottleneck of sequential pruned interleavers has been presented, and its efficiency in parallelizing channel and turbo interleavers for UMB has been deonstrated. For 1D interleavers based on bit-reversal perutations, an interleaving algorith that interleaves an address in O log(l steps has been proposed. For 2D interleavers eploying linear congruential colun perutations and bit-reversal row perutations, an algorith that interleaves an address in O log 2 (L steps has been proposed. Both algoriths have hardware-efficient architectures that can be constructed using siple logic gates. They can be utilized to design efficient parallel pruned interleavers for UMB, and therefore reduce interleaving latency on the transitter side and de-interleaving latency on the receiver side. The proposed lookahead interleaving schee can be generalized to interleaver structures eploying various underlying perutations θ other than π and ρ considered in this work. The lookahead coputations would then have to deterine the nuber of addresses within a certain interval [0,α] that ap under θ to addresses that are greater than soe threshold β, whereα and β depend on the interleaver length L and on the desired degree of parallelis P. REFERENCES [1] 3rd Generation Partnership Project 2 (3GPP2, Physical layer for ultra obile broadband (UMB air interface specification," [2] S. Lin and D. J. Costello, Error Control Coding, 2nd ed. Upper Saddle River, NJ: Prentice Hall, [3] C. Berrou, A. Glavieux, and P. Thitiajshia, Near Shannon liit error-correcting coding and decoding: turbo codes, in Proc. IEEE Conf. Coun., 1993, pp [4] D. E. Knuth, The Art of Coputer Prograing - Seinuerical Algoriths, 3rd ed. Reading, MA: Addison-Wesley, [5] F. Daneshgaran and P. Mulassano, Interleaver pruning for construction of variable-length turbo codes, IEEE Trans. Inf. Theory, vol. 50, pp , Mar [6] M. Eroz and A. R. Haongs Jr., On the design of prunable interleavers for turbo codes, in Proc. IEEE Veh. Technol. Conf., July 1999, vol. 2, pp [7] L. Dinoi and S. Benedetto, Design of fast-prunable s-rando interleavers, IEEE Trans. Wireless Coun., vol. 4, no. 5, pp , Sep [8] L. Dinoi and S. Benedetto, Variable-size interleaver design for parallel turbo decoder architectures, IEEE Trans. Coun., vol. 53, no. 11, pp , Nov [9] C. Berrou et al., Designing good perutations for turbo codes: towards a single odel, in Proc. IEEE Conf. Coun., June 2004, pp [10] S. Crozier and P. Guinand, High-perforance low-eory interleaver banks for turbo-codes, in Proc. IEEE Veh. Technol. Conf. (Fall, Oct. 2001, pp [11] M. Ferrari, F. Scalise, and S. Bellini, Prunable S-rando interleavers, in Proc. IEEE Conf. Coun., Oct. 2002, vol. 3, pp [12] F. Ling and D. N. Rowitch, Turbo code interleaver using linear congruential sequence, Oct. 2001, U.S. Patent

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