FDY3NZ Single N-Channel 2.5V Specified PowerTrench MOSFET General Description This Single N-Channel MOSFET has been designed using Fairchild Semiconductor s advanced Power Trench process to optimize the R DS(ON) @ V GS = 2.5v. Applications Li-Ion Battery Pack D Absolute Maximum Ratings Features TA=25 o C unless otherwise noted January 27 6 ma, 2 V R DS(ON) = 7 mω @ V GS = 4.5 V ESD protection diode (note 3) RoHS Compliant R DS(ON) = 85 mω @ V GS = 2.5 V Symbol Parameter Ratings Unit s V DSS Drain-Source Voltage 2 V V GSS Gate-Source Voltage ± 2 V I D Drain Current Continuous (Note a) a) 6 ma Pulsed P D Power Dissipation (Steady State) (Note a) a) 625 mw T J, T STG S G Operating and Storage Junction Temperature Range G S (Note b) 446 2 January 27 55 to +5 C 3 D tm Thermal Characteristics R θja Thermal Resistance, Junction-to-Ambient (Note a) a) 2 C/W R θja Thermal Resistance, Junction-to-Ambient (Note b) 28 Package Marking and Ordering Information Device Marking Device Reel Size Tape width Quantity C FDY3NZ 7 8 mm 3 units 27 Fairchild Semiconductor Corporation
Electrical Characteristics T A = 25 C unless otherwise noted Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BV DSS Drain Source Breakdown Voltage V GS = V, I D = 25 µa 2 V BVDSS T J Breakdown Voltage Temperature Coefficient I D = 25 µa, Referenced to 25 C 5 mv/ C I DSS Zero Gate Voltage Drain Current V DS = 6 V, V GS = V µa I GSS Gate Body Leakage, V GS = ± 2 V, V DS = V ± µa V GS = ± 4.5 V, V DS = V ± µa On Characteristics (Note 2) V GS(th) Gate Threshold Voltage V DS = V GS, I D = 25 µa.6..3 V V GS(th) T J Gate Threshold Voltage Temperature Coefficient I D = 25 µa, Referenced to 25 C 3 mv/ C R DS(on) Static Drain Source V GS = 4.5 V, I D = 6 ma.24.7 Ω On Resistance V GS = 2.5 V, I D = 5 ma.36.85 V GS =.8 V, I D = 5 ma.7.25 V GS = 4.5 V, I D=6mA, T J = 25 C.35. g FS Forward Transconductance V DS = 5 V, I D = 6 ma.8 S Dynamic Characteristics C iss Input Capacitance V DS = V, V GS = V, 6 pf C oss Output Capacitance f =. MHz 2 pf C rss Reverse Transfer Capacitance pf Switching Characteristics (Note 2) t d(on) Turn On Delay Time V DD = V, I D = A, 6 2 ns t r Turn On Rise Time V GS = 4.5 V, R GEN = 6 Ω 8 6 ns t d(off) Turn Off Delay Time 8 6 ns t f Turn Off Fall Time 2.4 4.8 ns Q g Total Gate Charge V DS = V, I D = 6 ma,.8. nc Q gs Gate Source Charge V GS = 4.5 V.6 nc Q gd Gate Drain Charge.26 nc Drain Source Diode Characteristics and Maximum Ratings V SD Drain Source Diode Forward V GS = V, I S = 5 ma (Note 2).7.2 V Voltage t rr Diode Reverse Recovery Time I F = 6 ma, 8 ns Diode Reverse Recovery Charge di F/dt = A/µs nc Q rr Notes:. R θja is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R θjc is guaranteed by design while R θca is determined by the user's board design. a) 2 C/W when mounted on a in 2 pad of 2 oz copper b) 28 C/W when mounted on a minimum pad of 2 oz copper Scale : on letter size paper 2. Pulse Test: Pulse Width < 3µs, Duty Cycle < 2.% 3. The diode connected between the gate and source serves only as protection againts ESD. No gate overvoltage rating is implied.
Typical Characteristics I D, DRAIN CURRENT (A) R DS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE.8.6.4.2.6.4.2.8 V GS = 4.5V 3.V 3.5V 2.5V.25.5.75 V DS, DRAIN-SOURCE VOLTAGE (V) 2.V Figure. On-Region Characteristics. I D = 6mA V GS = 4.5V.6-5 -25 25 5 75 25 5 T J, JUNCTION TEMPERATURE ( o C) Figure 3. On-Resistance Variation with Temperature. R DS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE R DS(ON), ON-RESISTANCE (OHM) 2.6 2.4 2.2 2.8.6.4.2 V GS = 2.V 2.5V 3.V 3.5V.8.2.4.6.8.9.8.7.6.5.4.3 I D, DRAIN CURRENT (A) 4.5V Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. T A = 25 o C T A = 25 o C.2 2 3 4 5 V GS, GATE TO SOURCE VOLTAGE (V) I D = 3mA Figure 4. On-Resistance Variation with Gate-to-Source Voltage. I D, DRAIN CURRENT (A).5 V T A = -55 o 25 o DS = 5V C C.2 25 o C.9.6.3.5.5 2 2.5 3 V GS, GATE TO SOURCE VOLTAGE (V) I S, REVERSE DRAIN CURRENT (A) V GS = V. T A = 25 o C. 25 o C -55 o C...2.4.6.8.2 V SD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature.
Typical Characteristics I D, DRAIN CURRENT (A) V GS, GATE-SOURCE VOLTAGE (V) 5 4 3 2 I D = 6mA V DS = 5V V.2.4.6.8 Q g, GATE CHARGE (nc) 5V Figure 7. Gate Charge Characteristics.. R DS(ON) LIMIT V GS = 4.5V SINGLE PULSE R θja = 28 o C/W T A = 25 o C s DC ms ms s.. V DS, DRAIN-SOURCE VOLTAGE (V) ms Figure 9. Maximum Safe Operating Area. CAPACITANCE (pf) P(pk), PEAK TRANSIENT POWER (W) 9 8 7 6 5 4 3 2 C oss C iss C rss 4 8 2 6 2 3 25 2 5 5 V DS, DRAIN TO SOURCE VOLTAGE (V) f = MHz V GS = V Figure 8. Capacitance Characteristics..... t, TIME (sec) SINGLE PULSE R θja = 28 C/W T A = 25 C Figure. Single Pulse Maximum Power Dissipation. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE. D =.5.2..5.2. SINGLE PULSE..... t, TIME (sec) RθJA(t) = r(t) * RθJA RθJA =28 C/W P(pk) t t 2 T J - T A = P * RθJA(t) Duty Cycle, D = t / t 2 Figure. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note b. Transient thermal response will change depending on the circuit board design.
Dimensional Outline and Pad Layout.98.78 (.5).43.28 3.7.5 2.35.25.5..7.5.78.58.54.34.4.5 SEE DETAIL A.5.66.5.8 LAND PATTERN RECOMMENDATION.2.4.. DETAIL A SCALE 2 : NOTES: UNLESS OTHERWISE SPECIFIED A) THIS PACKAGE CONFORMS TO EIAJ SC89 PACKAGING STANDARD. B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR EXTRUSIONS.
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