Low-Power Dual-Channel Logic-Level Translator

Transcription

1 EVALUATION KIT AVAILABLE General Description The is a dual-channel, bidirectional logiclevel translator designed specifically for low power consumption making it suitable for portable and batterypowered equipment. Externally applied voltages, and, set the logic levels on either side of the device. A logic signal present on the side of the device appears as the same logic signal on the side of the device, and vice-versa. The device is optimized for the I 2 C bus as well as the management data input/output (MDIO) bus where often high-speed, open-drain operation is required. When is high, the device allows the pullup to be connected to the I/O port that has the power. This allows continuous I 2 C operation on the powered side without any disruption while the level translation function is off. The part is specified over the extended -4NC to +85NC temperature range, and is available in 8-bump WLP and 8-pin TDFN packages. Applications Portable and Battery-Powered Electronics Devices with I 2 C Communication Devices with MDIO Communication General Logic-Level Translation Benefits and Features S Meets Industry Standards I 2 C Requirements for Standard, Fast, and High* Speeds MDIO Open Drain Above 4MHz* S Allows Greater Design Flexibility Down to.9v Operation on Side Supports Above 8MHz Push-Pull Operation S Ultra-Low Power Consumption 7µA Supply Current 3µA Supply Current S Provides High Level of Integration Pullup Resistor Enabled with One Side Power Supply when Is High 12kI (max) Internal Pullup Low Transmission Gate R ON : 17I (max) S Saves Space 8-Bump,.4mm Pitch,.8mm x 1.6mm WLP Package 8-Pin, 2mm x 2mm TDFN Package *Requires external pullups. Ordering Information appears at end of data sheet. For related parts and recommended products to use with this part, refer to Typical Operating Circuit = +1.2V.1µF 1µF = +3.V +1.2V SYSTEM CONTROLLER EN * * +3V SYSTEM SDA * IOVL1 IOVCC1 * SDA SLK IOVL2 IOVCC2 SLK * PULLUPS ARE OPTIONAL FOR HIGH-SPEED, OPEN-DRAIN OPERATION. For pricing, delivery, and ordering information, please contact Maxim Direct at , or visit s website at ; Rev ; 12/11

2 ABSOLUTE MAXIMUM RATINGS Voltages referenced to.,,...-.5v to +6V IOVCC1, IOVCC V to +( +.5V) IOVL1, IOVL V to +( +.5V) Short-Circuit Duration IOVCC1, IOVCC2, IOVL1, IOVL2 to...continuous, IOVCC_ Maximum Continuous Current at +11NC...1mA IOVL_ Maximum Continuous Current at +11NC...4mA TDFN Junction-to-Ambient Thermal Resistance (B JA )...162NC/W Junction-to-Case Thermal Resistance (B JC )...2NC/W Maximum Continuous Current at +11NC...7mA Continuous Power Dissipation (T A = +7NC) TDFN (derate 6.2mW/NC above +7NC)...496mW WLP (derate 11.8mW/NC above +7NC)...944mW Operating Temperature Range... -4NC to +85NC Storage Temperature Range NC to +15NC Lead Temperature (TDFN only, soldering, 1s)...+3NC Soldering Temperature (reflow)...+26nc Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. PACKAGE THERMAL CHARACTERISTICS (Note 1) WLP Junction-to-Ambient Thermal Resistance (B JA )...85NC/W Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to ELECTRICAL CHARACTERISTICS ( = +1.65V to +5.5V, = +.9V to min( +.3V, +3.6V), T A = -4NC to +85NC, unless otherwise noted. Typical values are at = +3V, = +1.2V, and T A = +25NC.) (Notes 2, 3) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNI POWER SUPPLY Power Supply Range V Supply Current I CC IOVCC_ =, IOVL_ =, = 7 15 FA Supply Current I L IOVCC_ =, IOVL_ =, = 3 6 FA =.4 1 Shutdown Supply Current I CC-SHDN =, =, IOVCC_ = unconnected.4 1 FA =.1 1 Shutdown Supply Current I L-SHDN =, =, IOVL_ = unconnected.1 1 FA IOVCC_, IOVL_ Three-State Leakage Current I LEAK T A = +25NC, =.1 1 FA Input Leakage Current I LEAK_ T A = +25NC 1 FA Shutdown Threshold V TH_VCC =, falling V Shutdown Threshold V TH_VL =, falling, =.9V V Above Shutdown Threshold V TH_VL-VCC rising above, = +1.65V V IOVL_ Pullup Resistor R VL_PU Inferred from V OHL measurements ki IOVCC_ Pullup Resistor R VCC_PU Inferred from V OHC measurements ki IOVL_ to IOVCC_ DC Resistance R IOVL-IOVCC Inferred from V OLx measurements 6 17 I 2

3 ELECTRICAL CHARACTERISTICS (continued) ( = +1.65V to +5.5V, = +.9V to min( +.3V, +3.6V), T A = -4NC to +85NC, unless otherwise noted. Typical values are at = +3V, = +1.2V, and T A = +25NC.) (Notes 2, 3) LOGIC LEVELS PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNI IOVL_ Input-Voltage High V IHL IOVL_ rising, = +.9V, = +1.65V (Note 4) IOVL_ Input-Voltage Low V ILL IOVL_ falling, = +.9V, = +1.65V (Note 4) IOVCC_ Input-Voltage High V IHC IOVCC_ rising, = +.9V, = +1.65V (Note 4) IOVCC_ Input-Voltage Low V ILC IOVCC_ falling, = +.9V, = +1.65V (Note 4) V.15 V V.2 V Input-Voltage High V IH rising, = +.9V or +3.6V, > -.15 V Input-Voltage Low V IL falling, = +.9V or +3.6V, >.2 V IOVL_ Output-Voltage High V OHL IOVL_ source current 2FA, V IOVCC_ = to ( R ).7 x V IOVL_ Output-Voltage Low V OLL IOVL_ sink current 5mA, V IOVCC_ P.5V.2 V IOVCC_ Output-Voltage High V OHC IOVCC_ source current 2FA, V IOVL_ =.7 x V IOVCC_ Output-Voltage Low V OLC IOVCC_ sink current 5mA, V IOVL_ P.5V.25 V RISE/FALL TIME ACCELERATOR STAGE Accelerator Pulse Duration = +.9V, = +1.65V ns IOVL_ Output Accelerator = +.9V, IOVL_ =, = +1.65V 26 Source Impedance = +3.3V, IOVL_ =, = +5V 6.8 I IOVCC_ Output Accelerator = +1.65V, IOVCC_ = 26 Source Impedance = +5V, IOVCC_ = 6.5 I THERMAL PROTECTION Thermal Shutdown T SHDN +15 NC Thermal Hysteresis T HYST 1 NC 3

4 TIMING CHARACTERISTICS ( = +1.65V to +5.5V, = +.9V to +3.6V, R, =, C VCC = 1FF, C VL =.1FF, C IOVL_ P 1pF, C IOVCC_ P 1pF, T A = -4NC to +85NC, unless otherwise noted. Typical values are at = +3V, = +1.2V and T A = +25NC. All timing is 1% to 9% for rise time and 9% to 1% for fall time.) (Note 5) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNI Turn-On Time for Q1 t ON V = V to (see the Block Diagram) 16 4 Fs IOVCC_ Rise Time IOVCC_ Fall Time IOVL_ Rise Time IOVL_ Fall Time Propagation Delay (Driving IOVL_) Propagation Delay (Driving IOVCC_) t RCC t FCC t RL t FL t PD_LCC t PD_CCL Push-pull driving, = +1.2V, = +3V (Figure 1) Open-drain driving, = +1.2V, = +3V (Figure 2) Push-pull driving, = +1.2V, = +3V (Figure 1) Open-drain driving, = +1.2V, = +3V (Figure 2) Push-pull driving, = +1.2V, = +3V (Figure 3) Open-drain driving, = +1.2V, = +3V (Figure 4) Push-pull driving, = +1.2V, = +3V (Figure 3) Open-drain driving, = +1.2V, = +3V (Figure 4) Push-pull driving, = +1.2V, = +3V (Figure 1) Push-pull driving, = +1.2V, = +3V (Figure 3) 8 22 Note 2: All devices are 1% production tested at T A = +25NC. Limits over the operating temperature range are guaranteed by design and not production tested. Note 3: must be less than or equal to during normal operation. However, can be greater than during startup and shutdown conditions. Note 4: V IHL, V ILL, V IHC, and V ILC are intended to define the range where the accelerator triggers. Note 5: Guaranteed by design. Note 6: External pullup resistors are required Rising Falling 3 9 Rising 3 5 Falling Channel-to-Channel Skew t SKEW Input rise time/fall time < 6ns 1.5 ns Maximum Data Rate Push-pull operation 8 Open-drain operation (Note 6) 4 MHz ns ns ns ns ns ns 4

5 R S 5I IOVL_ IOVCC_ C L 2pF C L 2pF IOVL_ IOVCC_ R S 5I t RCC t FCC t RL t FL 9% 9% 5% 5% 1% 5% 5% 1% 5% 9% 5% 5% 1% 9% 5% 1% t PD_LCC t PD_LCC t PD_CCL t PD_CCL Figure 1. Push-Pull Driving IOVL_ Figure 3. Push-Pull Driving IOVCC_ 1kI 1kI 1kI 1kI IOVL_ IOVCC_ IOVL_ IOVCC_ R DSON 5I C L 2pF C L 2pF R DSON 5I t RCC t FCC t RL t FL 9% 9% 1% 5% 5% 1% 1% 9% 5% 9% 5% 1% t PD_LCC t PD_LCC t PD_CCL t PD_CCL Figure 2. Open-Drain Driving IOVL_ Figure 4. Open-Drain Driving IOVCC_ 5

6 Typical Operating Characteristics ( = +3V, = +1.5V, R L = 1MI, C L = 15pF, push-pull driving data rate = 8Mbps, T A = +25NC, unless otherwise noted.) VCC SUPPLY CURRENT (µa) VL SUPPLY CURRENT (µa) DYNAMIC SUPPLY CURRENT vs. VCC SUPPLY VOLTAGE (OPEN-DRAIN DRIVING ONE IOVL_) toc1 VL SUPPLY CURRENT (µa) DYNAMIC SUPPLY CURRENT vs. VCC SUPPLY VOLTAGE (PUSH-PULL DRIVING ONE IOVCC_) (V) (V) (V) DYNAMIC SUPPLY CURRENT vs. VL SUPPLY VOLTAGE (OPEN-DRAIN DRIVING ONE IOVCC_) toc4 VL SUPPLY CURRENT (µa) DYNAMIC SUPPLY CURRENT vs. TEMPERATURE (OPEN-DRAIN DRIVING ONE IOVL_) toc2 toc5 VCC SUPPLY CURRENT (µa) VL SUPPLY CURRENT (µa) DYNAMIC SUPPLY CURRENT vs. VL SUPPLY VOLTAGE (PUSH-PULL DRIVING ONE IOVL_) DYNAMIC SUPPLY CURRENT vs. TEMPERATURE (PUSH-PULL DRIVING ONE IOVCC_) (V) TEMPERATURE ( C) TEMPERATURE ( C) toc3 toc6 VL SUPPLY CURRENT (µa) DYNAMIC SUPPLY CURRENT vs. CAPACITIVE LOAD (OPEN-DRAIN DRIVING ONE IOVL_) toc7 VCC SUPPLY CURRENT (ma) DYNAMIC SUPPLY CURRENT vs. CAPACITIVE LOAD (PUSH-PULL DRIVING ONE IOVL_) CAPACITIVE LOAD (pf) CAPACITIVE LOAD (pf) toc8 RISE/FALL TIME (ns) RISE/FALL TIME vs. CAPACITIVE LOAD (PUSH-PULL DRIVING ONE IOVL_) R S = 5Ω t FCC t RCC CAPACITIVE LOAD (pf) toc9 6

7 Typical Operating Characteristics (continued) ( = +3V, = +1.5V, R L = 1MI, C L = 15pF, push-pull driving data rate = 8Mbps, T A = +25NC, unless otherwise noted.) PROPAGATION DELAY (ns) PROPAGATION DELAY vs. CAPACITIVE LOAD (PUSH-PULL DRIVING ONE IOVL_) 16 R S = 5Ω t PD_LCC_RISE t PD_LCC_FALL 2 toc1 RISE/FALL TIME (ns) RISE/FALL TIME vs. CAPACITIVE LOAD (PUSH-PULL DRIVING ONE IOVCC_) R S = 5Ω t FL t RL toc11 PROPAGATION DELAY (ns) PROPAGATION DELAY vs. CAPACITIVE LOAD (PUSH-PULL DRIVING ONE IOVCC_) 8 R S = 5Ω 7 6 t PD_CCL_FALL t PD_CCL_RISE 1 toc CAPACITIVE LOAD (pf) CAPACITIVE LOAD (pf) CAPACITIVE LOAD (pf) RIOVL-IOVCC (Ω) R IOVL-IOVCC vs. = 1.65V = 3.3V = 5.5V (V) V IOVL_ =.5V I IOVCC_ = 3.3mA toc13 RAIL-TO-RAIL DRIVING (PUSH-PULL DRIVING ONE IOVL_) ( = +1.5V, = +3.3V, C L = 15pF, R L = 1MΩ, R S = 5Ω) toc14 4ns/div IOVL_ 1V/div IOVCC_ 1V/div RAIL-TO-RAIL DRIVING (OPEN-DRAIN DRIVING ONE IOVL_) ( = +1.5V, = +3.3V, C L = 1pF, R L = 5Ω, R S = 5Ω, PULLUP ON IOVL_/IOVCC_ = 1kΩ) toc15 EXITING SHUTDOWN MODE ( = 1.2V, = 3.V, IOVCC_ = V, C L = 1pF, R PU_VL = 5Ω) toc16 IOVL_ 1V/div 5mV/div IOVCC_ 1V/div IOVL_ 5mV/div 4ns/div 4µs/div 7

8 Pin Configurations TOP VIEW BUMPS ON BOTTOM IOVCC2 IOVCC A + IOVL2 IOVL1 B IOVCC2 IOVCC1 WLP IOVL2 IOVL1 TDFN Pin Description WLP BUMP/PIN TDFN NAME FUNCTION A1 1 Logic Supply Voltage, +.9V to min( +.3V, +3.6V). Bypass to with a.1ff ceramic capacitor as close as possible to the device. A2 2 IOVL2 Input/Output 2. Reference to. A3 3 IOVL1 Input/Output 1. Reference to. A4 4 Active Low Three-State Input. Drive low to place the device in shutdown mode with high-impedance output and internal pullup resistors disconnected. Drive high for normal operation. B1 8 Power-Supply Voltage, +1.65V to +5.5V. Bypass to with a 1FF ceramic capacitor as close as possible to the device. B2 7 IOVCC2 Input/Output 2. Reference to. B3 6 IOVCC1 Input/Output 1. Reference to. B4 5 Ground 8

9 Block Diagram ONE-SHOOT BLOCK ONE-SHOOT BLOCK EN CONTROL BLOCK GATE DRIVE IOVL_ N Q1 IOVCC_ Detailed Description The is a dual-channel, bidirectional level translator. The device translates low voltage down to +.9V on the side to high voltage on the side and vice-versa. The device is optimized for open-drain and high-speed operation, such as I 2 C bus and MDIO bus. The device has low on-resistance (17I max), which is important for high-speed, open-drain operation. The device also features internal pullup resistors that are active when the corresponding power is on and is high. Level Translation For proper operation, ensure that +1.65V P P +5.5V, and +.9V P P. When power is supplied to VL while is less than, the device automatically disables logic-level translation function. Also, the device enters shutdown mode when =. High-Speed Operation The device meets the requirements of high-speed I 2 C and MDIO open-drain operation. The maximum data rate is at least 4MHz for open-drain operation with the total bus capacitance equal to or less than 1pF. Three-State Input The device features a three-state input that can put the device into high-impedance mode. When is low, IOVCC_ and IOVL_ are all high impedance and the internal pullup resistors are disconnected. When is high, the internal pullup resistors are connected when the corresponding power is in regulation, and the resistors are disconnected at the side that has no power on. In many portable applications, one supply is turned off but the other side is still operating and requires the pullup resistors to be present. This feature eliminates the need for external pullup resistors. The level translation function is off until both power supplies are in range. Thermal-Shutdown Protection The device features thermal-shutdown protection to protect the part from overheating. The device enters thermal shutdown when the junction temperature exceeds +15NC (typ), and the device is back to normal operation again after the temperature drops by approximately 1NC (typ). When the device is in thermal shutdown, the level translator is disabled. 9

10 Ordering Information PART TOP MARK PIN-PACKAGE ETA+T BNT 8 TDFN EWA+T AAE 8 WLP Note: All devices are specified over -4 C to +85 C operating temperature range. +Denotes a lead(pb)-free/rohs-compliant package. T = Tape and reel. PROCESS: BiCMOS Chip Information Package Information For the latest package outline information and land patterns (footprints), go to Note that a +, #, or - in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. PACKAGE TYPE PACKAGE CODE OUTLINE NO. LAND PATTERN NO. 8 TDFN T822CN WLP W8A Refer to Application Note

11 REVISION NUMBER REVISION DATE DESCRIPTION Revision History PAGES CHANGED 12/11 Initial release cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a product. No circuit patent licenses are implied. reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance. 16 Rio Robles, San Jose, CA USA Products, Inc. and the logo are trademarks of Products, Inc.

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