BLOCK DIAGRAM. fig.block
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1 ug.00 KC0 KC0 BLOCK DIGRM fig.block 0
2 ug.00 KC0 KC0 CIRCUIT BORD (SHEET BORD) fig.apcb
3 ug.00 KC0 KC0 CIRCUIT BORD (SHEET B BORD) fig.bpcb
4 ug.00 KC0 KC0 KC0 CIRCUIT DIGRM (/) fig.kc0sch MP Board R.k R.k R Q S R 00 R R MOF/W C E0/00 D N00G C VCC WP W WP WP WP Q SCO Q SC W from PS BORD CN CN BBPHK R 0 R.k C C0p 0.dBu /.V Q0 SC0GR Q C R SC E0/0BP JW R 0 R k C C0 C00p R 0 S0GR Q R k R k R k Q SC0GR R 0 R 0 S0GR Q R k C C C Cp F0.0 C R Cp.k R k R0 k C F0.0 C R CB/W k Q S0GR R0.k C F.0 R.k Q SCGR R CB/W k MOF/W R R R MOF/W R FUSE MRT00m R0 MOF/W R R MOF/W 0 R CEMENTW 0R R CEMENTW 0R R MOF/W 0 R MOF/W R FUSE MRT00m R C CEMENTW./0VDCJ(MFF) WP R MOF/W C F0.0 C F0.0 R CEMENTW 0R W TWEETER ohm WOOFER ohm 0.dBu /.0V Q SC Q S.V (No signal).v (Rated Power) VCC R.k R.k C F0.0P R.k R0.K VR0 C R 00 R R MOF/W C0 E0/00 C D0 N00G VCC WP WP WP WP0 W Q SO 00V TER PT00 0./0VDCJ(MFF) C BD PBPC0 R WP R CB/W 0k C E00/00 VCC WP WP W E00/00 C VCC VCC C0 E/00 C0 E/00 VCC C E/0 R R k R k R 00 C C0p W V 0V 0V TER PT00 W0 WP TER PT00 C IN HOT TER PT00 C IN COMMON POWER SW JWMRKK FUSE W0 WP 00V/V FUSE C CFMLO TL 0V CN BPVH W CN BPVH TER PT00 TER PT00.V.V TRNSFORMER VCC (Rated Power) (No signal) CN BPVH FUSE, T00mL 0V FUSE C ECMH FUSE BD W0G R k R CB/W k VCC.V(No signal).0v(rated Power) C E00/ C0 E00/ Q SD R R CB/W.k D RDEB D RDEB CB/W.k R E0/ C C R E0/ CB/W.k CB/W 0k C E0/ C E0/ CN BBPHK W to PRE BORD CN 0V/0V TL 0V TER PT00 C IN N.C. R0.k R.k D SS D SS R 00k.0V (Rated Power) VCC.V (No signal) R Q S0GR C E/0 R0 R Q0 S0GR Q SB C E/ R MUTE_FET R Q S0GR R MUTE_TR R R Q SCGR R CB/W.k PS Board (PS Sect.) PS Board
5 ug.00 KC0 KC0 KC0 CIRCUIT DIGRM (/) fig.kc0sch PRE BORD MIN R C C0p R0.k IC0B ML.dBu / mv R.k TONE CONTROL LOW MIDDLE HIGH RKK 0kBcc R0 VR VR.k RKK 0kBcc VR RKK 0kBcc C C R R F0. R F0.0 0 C C000p R0.k VOLUME C IC0 E0/ ML R. k C E0/ R0 0.0dBu C Cp /.V R IC ML C C0. C C0. 0 R k C0 0 C F0. R0 F0.00 k C F0.0 VR RKK 0kB R.k Q SC0GR R.k Q SC0GR PS BORD(EQ Sect.) C E0/ R PSWB SPUP00 SHPE ON R 0k R SHPE OFF LOW MIDDLE R0 k R0 k R0 k R0 R.k k R C R C.k F0..k F0.0 R C R C k F0. k F0.00 HIGH R0.k R 0 C F0.00 SHPE 0.0dBu 0.0dBu /.V C C0p R0 PSW k C0 SPUP00 E0/ SHPE ON ICB ML R SHPE OFF R CN B0BPHK 0 C0 E0/ C0 E0/ WP 0 W C 0.0dBu R /.V.k R 0k C0 R k LOW MIDDLE HIGH_ HIGH_ R.k R k C F0. R k R.k R.k R0 0 R k C F0. R k R.k R.k R.k C R0 C F0. k F0.0 C C F0.00 F0. C 0.dBu C /.0V C00p R ICB ML C E0/ R R JW Q SK0TMGR R R D M SS CN BBPHK C C0. W to MP BORD CN R0 R.k Q SC0GR R.k Q SC0GR R.k LED C0 C0. LMBD C0 C0. C0 C0. CN BBPHK C W from PS BORD CN Q SC0GR R.k C E0/ Q R SC0GR.k.dBu / 0mV R C.k Cp R Q.k R SC 0 IC R ML k R.k SUB_OUT C00 C C C0. C C0. ICC ML C C0. C C0. C0 C0. IC0C ML C C0. ICC ML C0 C0.
6 G G ug.00 KC0 KC0 KC0 CIRCUIT DIGRM (/) fig.kc0sch PRE BORD LOUTL.dBu / 0mV C0 C00p R k IC ML inside area "" C0 R R IC R R R R0 Q Q D D D D inside area "" C00 R C0 R R C0 R C0 SSW C C0 JK JCK BORD (OUTPUT) LOUTR.dBu / 0mV C0 C00p R k ICB ML R C R ICB R R R0 R Q Q D D D D CN BBPHK C W WP C C0. C0 C R R R C0 R C SSWB C C JK C0. R Q D0 0 SC SS D SS R.k C C0. C E/0 R k R.k C C0P JK0 YKB0 C C0. LINE OUT L(MONO).dBu / / mv C C0p R 0 R0.k Q SC D SS D SS C0 E/0 R k R.k C C0P JK YKB0 C C0. LINE OUT R.dBu / MIN L MIN R R 0k C JW R.k IC ML C C0p R 0k ICB ML R.k R 0 R.k Q SC D D D D C C0. CN BBPHK W WP C E0/ C E0/ R 00 C0 C0P R k R0 k R 00 C C0P JK YKB0 C C0. JK YKB0 C C0. STEREO LINK IN STEREO LINK OUT.0dBu / "PS BORD(LINK Sect.)" UX IN R UX IN L D D D D C C0. SUB_OUT C E/0 C E0/ C E0/ R k R 00 C C0p R 00 C C0p R 00 C0 C0P R k R k JK YKB0 C C0. C C0. B SUBWOOFER OUT.dBu / JKB YKC0 JK YKC0 JKC UX IN R khz sine wave.dbu /.0mV UX IN L khz sine wave.dbu /.0mV C C0 C0. C C C0. C0. C C0. ICC ML C ICC C C0. ICC ML
7 ug.00 KC0 KC0 KC0 CIRCUIT DIGRM (/) fig.kc0sch MP Board R.k R.k R Q S R 00 R R MOF/W C E0/00 D N00G C VCC WP W WP WP WP Q SCO Q SC W from PS BORD CN CN BBPHK R 0 R.k C C0p 0.dBu /.V Q0 SC0GR Q C R SC E0/0BP JW R 0 R k C C0 C00p R 0 S0GR Q R k R k R k Q SC0GR R 0 R 0 S0GR Q R k C C C Cp F0.0 C R Cp.k R k R0 k C F0.0 C R CB/W k Q S0GR R0.k C F.0 R.k Q SCGR R CB/W k MOF/W R R R MOF/W R FUSE MRT00m R0 MOF/W R R MOF/W 0 R CEMENTW 0R R CEMENTW 0R R MOF/W 0 R MOF/W R FUSE MRT00m R C CEMENTW./0VDCJ(MFF) WP R MOF/W C F0.0 C F0.0 R CEMENTW 0R W TWEETER ohm WOOFER ohm 0.dBu /.0V Q SC Q S.V (No signal).v (Rated Power) VCC R.k R.k C F0.0P R.k R0.K VR0 C R 00 R R MOF/W C0 E0/00 C D0 N00G VCC WP WP WP WP0 W Q SO 00V TER PT00 0./0VDCJ(MFF) C BD PBPC0 R WP R CB/W 0k C E00/00 VCC WP WP W E00/00 C VCC VCC C0 E/00 C0 E/00 VCC C E/0 R R k R k R 00 C C0p W V 0V 0V TER PT00 W0 WP TER PT00 C IN HOT TER PT00 C IN COMMON POWER SW JWMRKK FUSE W0 WP 00V/V FUSE C CFMLO TL 0V CN BPVH W CN BPVH TER PT00 TER PT00.V.V TRNSFORMER VCC (Rated Power) (No signal) CN BPVH FUSE, T00mL 0V FUSE C ECMH FUSE BD W0G R k R CB/W k VCC.V(No signal).0v(rated Power) C E00/ C0 E00/ Q SD R R CB/W.k D RDEB D RDEB CB/W.k R E0/ C C R E0/ CB/W.k CB/W 0k C E0/ C E0/ CN BBPHK W to PRE BORD CN 0V/0V TL 0V TER PT00 C IN N.C. R0.k R.k D SS D SS R 00k.0V (Rated Power) VCC.V (No signal) R Q S0GR C E/0 R0 R Q0 S0GR Q SB C E/ R MUTE_FET R Q S0GR R MUTE_TR R R Q SCGR R CB/W.k PS Board (PS Sect.) PS Board 0
CP 52 Page In & Zone Sensitivity
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