Scalable Store-Load Forwarding via Store Queue Index Prediction

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1 Scalable Store-Load Forwarding via Store Queue Index Prediction Tingting Sha, Milo M.K. Martin, Amir Roth University of Pennsylvania {shatingt, milom, addr addr addr (CAM) predictor addr (RAM) data (RAM) data ==

2 Four Aspects of OoO Load/Store Execution The four aspects 1. Commit stores in order 2. Detect memory-ordering violations 3. Reduce memory-ordering violations 4. Forward from stores to loads and state-of-the-art implementations 1. Age ordered store queue (SQ) 2. Age ordered load queue (LQ) + associative search Proposed: in-order load re-execution [Cain+ 04] 3. Dependence prediction [Kessler+ 94, Moshovos+ 97, Chrysos+ 98 ] 4. Associative store queue search We consider the first three aspects solved [ 2 ]

3 The Problem addr D$ addr (CAM) age logic data (RAM) data Age-ordered associative search is not scalable Simple associative search: CAM is slow, difficult to pipeline But can be partitioned (to reduce wire delay) Age-ordered associative search: CAM and age logic are slow And age logic makes partitioning difficult Load queue load re-execution [Cain+ 04] Store queue? [ 3 ]

4 Possible Solutions Engineer around associative search Put your best designer on the store queue Longer access latency than D$ nasty scheduler, replays Put your best designer on the scheduler Proposed: reduce associative search Reduce bandwidth Bloom-filtered SQ [Sethumadhavan+ 03] Reduce number of stores searched Pipelined/chained SQ [Park+ 03] Hierarchical/filtered SQ [Srinivasan+ 04, Ghandi+ 05, Torres+ 05] Decomposed SQ [Roth 05; Baugh+ 04] Why not just eliminate associative search? [ 4 ]

5 addr Our Solution addr SQ index predictor D$ addr (CAM) age logic NOT SCALABLE data (RAM) D$ == addr (RAM) data (RAM) data data Replace associative search with indexed access Replace address CAM + age logic with address RAM Predict one SQ index per load Predictor (e.g., Store Sets) is not on load critical path Keep address match allow false positives boost accuracy [ 5 ]

6 Verification Speculative indexed access requires verification In-order load re-execution prior to commit [Cain+ 04] Store Vulnerability Window (SVW) re-execution filter [Roth 05] + On average 3% of loads re-execute almost free + Works unmodified for speculative indexed SQ (address check) Re-execution + Indexed store queue = CAM-free load/store unit [ 6 ]

7 Outline Introduction and background Forwarding index prediction Mechanism Evaluation Delay index prediction Mechanism Evaluation Conclusion [ 7 ]

8 SSNs: A Naming System for Dynamic Stores SSNs (Store Sequence Numbers) Required for SVW and more convenient than store queue indices + Can name committed stores + Fewer wrap-around issues Monotonically increasing SSN commit : youngest committed store SSN dispatch : youngest dispatched store (SSN commit + SQ.NUM) From SSN to store queue index? If st.ssn > SSN commit, st.index = (st.ssn % SQ.SIZE) [ 8 ]

9 Indexed Forwarding Pipeline Actions Fetch Decode Rename Issue Execute Execute SVW Re-exec Commit address D$ forwarding predictor SSN fwd SQ = MUX data & Decode/rename: predict forwarding store (SSN fwd ) Issue: wait for load address, SSN fwd to execute Unify: SSN fwd used for both forwarding and scheduling Execute: index SQ, forward if address matches SVW/re-execute: verify forwarding Commit: train predictor [ 9 ]

10 Forwarding Index Predictor Decode Rename Load PC FSP PC fwd1 PC fwd2 predictor SAT SSN fwd1 SSN fwd2 MAX SSN fwd Forwarding Store Predictor (FSP) Maps load PC to small set of likely-to-forward store PCs (Load) PC-indexed, set-associative, entry={tag, (2) store PCs} Store Alias Table (SAT) Maps store PC to its most recent store instance (SSN) (Store) PC-indexed, direct-mapped, entry={ssn} SSN fwd : largest SSN (youngest in-flight store) Design inspired by Store Sets [Chrysos+ 98] Used for load scheduling and forwarding [ 10 ]

11 Working Example: Forwarding (Store Part) PC Z: store 8, A PC Z: PC W: store 8, A ld A Fetch Decode Rename Issue Execute W-back SVW Re-exec Commit FSP SAT W X Y Z Z Predictor 19 Z 18 A B Y 5 6 B 4 Data cache SSN commit = 17 tail tail head SQ [ 11 ]

12 Working Example: Forwarding (Store Part) PC Z: store 8, A PC Z: PC W: store 8, A ld A Fetch Decode Rename Issue Execute W-back SVW Re-exec Commit FSP SAT W X Y Z Z Predictor A B Z Y 5 6 A B 8 4 SQ tail head Data cache SSN commit = 17 [ 12 ]

13 Working Example: Forwarding (Load Part) PC fwd =? PC W: ld A PC Z: PC W: store 8, A ld A Fetch Decode Rename Issue Execute W-back SVW Re-exec Commit FSP SAT W X Y Z Z Predictor A B Z Y 5 6 A B 8 4 SQ tail head Data cache SSN commit = 17 [ 13 ]

14 Working Example: Forwarding (Load Part) SSN fwd =? PC fwd = Z PC W: ld A PC Z: PC W: store 8, A ld A Fetch Decode Rename Issue Execute W-back SVW Re-exec Commit FSP SAT W X Y Z Z Predictor A B Z Y 5 6 A B 8 4 SQ tail head Data cache SSN commit = 17 [ 14 ]

15 Working Example: Forwarding (Load Part) SSN fwd = 19 PC W: ld A PC Z: PC W: store 8, A ld A Fetch Decode Rename Issue Execute W-back SVW Re-exec Commit FSP SAT W X Y Z Z Predictor A B Z Y 5 4 A B 8 4 tail head Data cache SSN commit = 18 SQ [ 15 ]

16 Working Example: Verification (Store Part) PC Z: store 8, A PC W: ld A, 8 PC Z: store 8, A Fetch Decode Rename Issue Execute W-back SVW Re-exec Commit FSP SAT W X Y Z Z Predictor 19 Z Y A B 8 4 SQ head tail A B 58 4 Data cache SSN commit = 19 [ 16 ]

17 Working Example: Verification (Load Part) PC Z: store 8, A PC W: ld A, 8 Successful Forwarding PC W: ld A Fetch Decode Rename Issue Execute W-back SVW Re-exec Commit A B FSP SAT Z Y 8 4 W X Y Z A Z B Data cache 8 4 Predictor SQ head tail SSN commit = 19 [ 17 ]

18 Forwarding Index Predictor Training Forwarding Store Predictor (FSP) Train on every load at commit Address-indexed tables track PCs, SSNs of last committed stores if (SSN fwd == committed_store_ssn[load.addr]) correct -> re-inforce else if (load.pc fwd!= committed_store_pc[load.addr]) wrong -> learn new load-store pair else wrong -> unlearn existing store-load pair (later) Store Alias Table (SAT) Not a predictor, analogous to RAT (register alias table) [ 18 ]

19 So Far, How Well Are We Doing? What we care about Forwarding prediction accuracy Performance vs. associative SQ Basic setup Simulator: simplescalar Alpha 8-way superscalar, 19 stage pipe, 512-entry ROB Benchmarks: SPEC2000, Mediabench (only show 9 benchmarks) Important Parameters 64KB D$: 3 cycles 64-entry SQ: associative 3 & 5 cycles, indexed 3 cycles CACTI 3.2: 90nm, 1.1V, 3GHz FSP: 4K-entry, 2-way Bigger than Store Sets: all dependences, not just violations Probably OK: PC-indexed, in-order front-end, only 8KB [ 19 ]

20 Forwarding Index Prediction Accuracy 100 Percent of loads lucas jpeg.e perl.s apsi gsm.e eon.c vortex wupwise mesa.t 99.5%+ accuracy (better than branch prediction), why? ~88% loads don t forward Address check these ~88% are right by design ~12% loads forward Forwarding patterns are stable [Moshovos+, 97] [ 20 ]

21 First Things First: Baseline Performance Relative execution time lucas jpeg.e perl.s apsi gsm.e eon.c vortex wupwise mesa.t Baseline: 3 cycle associative SQ and perfect scheduling + (slightly modified) Store Sets scheduling Store sets is basically a perfect scheduler + 5 cycle associative SQ (forwarding triggers replays) Latency/replays cause extra 1-10% slowdown [ 21 ]

22 Indexed Forwarding Performance Relative execution time lucas jpeg.e perl.s apsi gsm.e eon.c vortex wupwise mesa.t 3 cycle indexed SQ (with unified scheduling) + Forwarding accuracy high outperforms 5-cycle associative Forwarding accuracy low slowdowns [ 22 ]

23 Sources of Low Forwarding Prediction Accuracy FSP limitation Our FSP: 2 stores per load eon.c and vortex gsm.e eon.c vortex wupwise mesa.t Not-most-recent forwarding Example:for (;;) { X[J] = A * X[J 2]; } WhenJ = 5, loadx[5 2] depends on storex[3] but SAT tracks the most recent store instance (X[4]) mesa.t [ 23 ]

24 Delay Index Prediction for Difficult Loads Uniform solution to low forwarding prediction accuracy Convert flush (really bad) to scheduling delay (less bad) Delay load until uncertain stores commit, get value from cache Fetch Decode Rename Issue Execute W-back SVW Re-exec Commit address D$ forwarding predictor SSN fwd SQ = MUX data delay predictor SSN delay & Decode/rename: predict + delay store (SSN delay ) Issue: wait for + SSN delay to commit [ 24 ]

25 Delay Index Predictor Decode Rename Load PC FSP SAT MAX DDP Distance Delay delay predictor Delay Distance Predictor (DDP) SSN dispatch SUB Maps load PC to distance (in stores) to forwarding store PC-indexed, set-associative table, entry = {tag, distance} SSN fwd SSN delay SSN delay = SSN dispatch Distance delay Example: not-most-recent forwarding (forj=5) SSN dispatch (X[4]) Distance delay (1) SSN delay (X[3]) Inspired by Exclusive Collision Predictor [Yoaz+ 99] See our paper for training [ 25 ]

26 Indexed Forwarding (with Delay) Performance Relative execution time lucas jpeg.e perl.s apsi gsm.e eon.c vortex wupwise mesa.t [ 26 ]

27 Indexed Forwarding (with Delay) Performance Relative execution time lucas jpeg.e perl.s apsi gsm.e eon.c vortex wupwise mesa.t 3 cycle indexed SQ + delay Forwarding prediction is good: not much impact (sometimes ±1%) + FSP 2-store limitation: a few short delays ± Not-most-recent forwarding: many long delays Better than flushing but not much [ 27 ]

28 Performance Summary Relative execution time lucas jpeg.e perl.s apsi gsm.e eon.c vortex wupwise mesa.t 3 cycle indexed SQ + delay + On average 3% slower than 3 cycle associative SQ (black) + On average as fast as 5-cycle associative SQ (blue) [ 28 ]

29 Problem Conclusion Scalability of store-load forwarding Approach Keep age-ordered store queue Replace associative search with indexed access Adapted Store-Sets predictor predicts forwarding index Adapted Exclusive Collision predictor delays difficult loads Effectiveness + As fast as realistic 5 cycle associative SQ + But simpler: unified scheduler, no forwarding replays, Indexed store queue + load re-execution = CAM free in-flight load/store unit [ 29 ]

30 The End Thank you! [ 30 ]

Issue = Select + Wakeup. Out-of-order Pipeline. Issue. Issue = Select + Wakeup. OOO execution (2-wide) OOO execution (2-wide)

Issue = Select + Wakeup. Out-of-order Pipeline. Issue. Issue = Select + Wakeup. OOO execution (2-wide) OOO execution (2-wide) Out-of-order Pipeline Buffer of instructions Issue = Select + Wakeup Select N oldest, read instructions N=, xor N=, xor and sub Note: ma have execution resource constraints: i.e., load/store/fp Fetch Decode