Eddy Current Effects in Film Capacitors and their Impact on Interconnect Systems in High Power Applications

Transcription

1 2009 Motor, Drive & Automation Systems Conference Eddy Current Effects in Film Capacitors and their Impact on Interconnect Systems in High Power Applications Presented by: Terry Hosking, V.P. Engineering SBE Inc. Power Ring Division March 3 rd, 2009 Orlando, Florida 1

2 Topics of Discussion Review of 2008 research conducted on Polypropylene film characteristics Eddy Currents; Definition & Explanation Asymmetric bus current flow; aka Current Hogging Interconnect systems to minimize Eddy Current effects Design concepts and considerations Future work 2

3 2008 Review 2008 work focused on characterizing Polypropylene film at higher temperatures Testing of High Crystalline Structure Polypropylene (HCPP) performed to compare to traditional industry standard Biaxially Oriented Polypropylene (BOPP) Purpose to compare results, in particular at temperatures above +105 C 3

4 Polypropylene Polypropylene resin is composed of 2 parts: Atactic material which is non-crystalline (amorphous) Isotactic material which is crystalline Highly isotactic material has a higher melting point Highly isotactic polypropylene is referred to as High Crystallinity Polypropylene (HCPP) All capacitor grade polypropylene film, including HCPP, is produced by stretching in two directions, Biaxially Oriented Polypropylene (BOPP) 4

5 2008 Test Comparisons 1100 DC Voltage Breakdown HCPP BOPP Temperature (deg C) 5

6 2008 Test Comparisons 1000 Relative Leakage 100 HCPP BOPP Temperature (deg C) 6

7 2008 Conclusions Advancements in quality of base polypropylene resin have closed the gap between BOPP and HCPP as shown by data To minimize internal temperature rise, the form factor of the wound capacitor section becomes a critical parameter in the design, regardless of choice of Polypropylene grade! Polypropylene film capacitors will not be rated to operate at +150 C, HOWEVER, further research is needed to better understand what the upper limits are Current research taking place at SBE under a Phase II DoE grant Finally, interfacing with the capacitor needs careful consideration to achieve ultimate performance 7

8 Eddy Currents & Capacitor Interconnect Need to start with the phenomenon of Eddy Current What is Eddy Current? What impact does Eddy Current have on the capacitor? How are Eddy Currents tied to capacitor design? 8

9 Test Unit 9

10 Test Setup Photo 250 Arms, ~90 KHz 10

11 Eddy Current Heating Effects, Bottom View 11

12 Eddy Current Heating Effects, Top View 12

13 Eddy Current Heating Effects, Side View 13

14 Test Setup Notes 250 Arms, ~90 KHz 2.7µF (15 x 0.18µF in //) ~ 1000 µf Pearson Pierson HF Current Transformer Acquisition 14

15 Eddy Current Eddy Current occurs if a conductor is exposed to a changing magnetic field 15

16 Eddy Current Concepts Applied Varying Magnetic Field: Induced Voltage Time Varying B Field V B V _ Conductive Loop 16

17 Eddy Current Concepts Applied Varying Magnetic Field: Induced Current Induced current opposes applied field, so B through the loop reduced V B I V B Time Varying B Field V _ Conductive Loop I R V + + _

18 Eddy Current Concepts As applied to conductor sheets Dissipation gets worse as square gets larger Reason why iron transformer & motor magnetic cores are laminated R + P=V^2/4R P = V2 4R P=8V^2/5R 5V P T = 2 P=V^2/2R 3R 2V P T = 2 R 18

19 Eddy Current Concepts As applied to conductor sheets [without derivations]: Induced current depends on B and sheet resistance Power dissipated is proportional to: B 2 *R S Sheet current generates counter B field For a capacitor the number of layers penetrated by the B field is a function of sheet resistance 19

20 Eddy Current Concepts As applied to capacitors: Current Input No perpendicular component to film; thus no heating Location where field has a perpendicular component to film (occurs on opposite side of unit as well) 20

21 Eddy Current Concepts Eddy Current Heating 21

22 Eddy Current Summary Discovered Eddy Current heating could be a major issue The ring form factor design has reduced capacitor losses to the point where Eddy Current effects & other second order losses become important considerations Eddy Current effects visually seen in a 250 Amp RMS test at ~90 KHz 22

23 An Unknowing Improvement 23

24 An Unknowing Improvement First high current test: 240 ARMS at 100 KHz (from 2007 conference presentation) Goal: to create uniform current density 24

25 Test unit Interconnect Also designed to create uniform current density in a smaller form factor 25

26 Current Hogging Symptom: Reason: Cause: For bus and capacitor assemblies, the capacitors closest to the switches heat more than those further away Non-uniform current in buscapacitor assemblies Impedance differences between capacitor elements and current source/sink 26

27 Bus System A Distributed Element A C Z1 C1 Z2 C2 C2 ESL B Bus L D 27

28 Bus System A Distributed Element Bus inductance creates a larger impedance to C2 C1 will hog part of the current that is desired to flow in C2 C1 will run hotter than calculated as a result A Z1 C1 Z2 C2 C C2 ESL These impedances are very low and difficult to measure using conventional test equipment B Bus L D 28

29 Power Ring not Immune to Asymmetry Multiple connections between bus and power ring A C Z1 Z2 C1 Power ring ESL B Bus L D 29

30 Power Ring not Immune to Asymmetry ESL of each connection to the Power Ring is very low Multiple connections between bus and power ring A C Multiple connections reduce the ESL still further Z1 Z2 C1 Power ring ESL Minimizes, but does not eliminate, the tendency for terminals closest to current source to draw more than their share of current B Bus L D 30

31 Power Ring not Immune to Asymmetry Uniform axial current Magnetic field parallel to capacitor film No eddy current Non uniform axial current Magnetic field component perpendicular to film Eddy current heating some areas Magnetic field lines Higher current Connections between power ring and "outside world" 31

32 Power Ring not Immune to Asymmetry Power Ring is not immune from current hogging, but far less affected than multiple discrete capacitors Power Ring internal interconnect enhances current sharing by working in parallel with the application s bus structure Uniform axial current Magnetic field parallel to capacitor film No eddy current Non uniform axial current Magnetic field component perpendicular to film Eddy current heating some areas Magnetic field lines Higher current Connections between power ring and "outside world" 32

33 Mitigation Time! A + L1 switch and charge current converter/inverter switches B - L2 + - DC Supply 33

34 Mitigation Time! Capacitor charge and discharge currents flow in the same terminals Higher terminal current, and more localized eddy current effects No attenuation of EMI generated by switches A + L1 switch and charge current converter/inverter switches B - L2 + - DC Supply 34

35 Mitigation Time! Capacitor is not as capable as it could be at removing ripple voltage from the DC supply due to the total ESL A + L1 switch and charge current converter/inverter switches B - L2 + - DC Supply 35

36 Mitigation Time! A + L1 L3 + C switch current charging current converter/inverter switches DC Supply B - L2 L4 - D 36

37 Mitigation Time! L1 through L4; very low inductance for coplanar bus A L3 + L1 + C switch current charging current converter/inverter switches DC Supply B - L2 L4 - D 37

38 Mitigation Time! Capacitor charge and discharge current separated; reducing local eddy current and terminal heating Capacitor and bus assembly act as L/C filter for ripple and EMI reduction A + L1 L3 + C switch current converter/inverter switches charging current DC Supply B - L2 L4 - D 38

39 An improvement, but not optimal 39

40 Mitigation Time Divides charge and discharge eddy current Reduces localized heating Better EMI control than if DC connected at switches 40

41 Coaxial Geometry Option 41

42 Mitigation Time Note coplanar bus structure 42

43 Mitigation Time Coaxial Geometry Pros: Dramatically reduces eddy current heating effects Capacitor tightly coupled to bus structure Low inductance at capacitor terminals Cons: RMS current handling is center terminal dependent Terminals not as close to switches as desirable due to OD of the capacitor 43

44 Crown Terminal Design 44

45 Crown Terminal Design 45

46 Mitigation Time Crown Terminal Design Pros: Capacitor internal interconnect is in parallel with bus structure; resulting in lower bus impedance Much higher current ratings! Terminals closer to switches, LOWEST INDUCTANCE SOLUTION Cons: Size, bus width Complexity Some minimal current hogging 46

47 Crown Terminal Design Terminal design improvements More parallel with coplanar bus Current Crown Terminal Improved Crown C Concept 47

48 Hardware Considerations And before I forget Consider brass fastening hardware for high current connections 48

49 Hardware Considerations Relative Eddy Current heating difference, Brass vs. Ferrous hardware Ferrous TEMP Brass time 49

50 Hardware Considerations Brass vs. Ferrous hardware At ~80 KHz eddy current heating in ferrous hardware is ~4.5 times that of brass Heating is proportional to B squared IGBT terminals are small, relatively high flux Hardware is in parallel with interconnect resistance, which brass can help reduce 50

51 Closing Comments Bus/interconnect losses can easily exceed those within the capacitor Consider thermal imaging at cold start to determine bus heat sources Avoid thinking of the Power Ring as a two terminal device! By doing so, you fail to take full advantage of it s capabilities 51

52 Future Work Improved Interconnect and Packaging Options Bus Resonance Mitigation 52

53 Thank You! Thank you! Please visit us in Booth #202 53